On Fri, 19 Jun 2020 16:04:39 +0200, Frederic Barrat wrote: > Some opencapi FPGA images allow to control if the FPGA should be reloaded > on the next adapter reset. If it is supported, the image specifies it > through a Vendor Specific DVSEC in the config space of function 0.
Applied to powerpc/next.
[1/1] ocxl: control via sysfs whether the FPGA is reloaded on a link reset
https://git.kernel.org/powerpc/c/87db7579ebd5ded337056eb765542eb2608f16e3
cheers
