Grant Likely wrote:
> On Thu, Mar 26, 2009 at 4:14 PM, Wolfgang Grandegger
> wrote:
>> Anton Vorontsov wrote:
>>> On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
In other words, this device is not register-level compatible with the
fsl,upm-nand device. Give the node a new
On Thu, Mar 26, 2009 at 05:22:36PM -0600, Grant Likely wrote:
[...]
> That said, I won't oppose it if you go this route. However at the
> very least, please change the nand node's compatible list to be:
>
> compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand";
Yeah, that's definitely a good idea.
On Thu, Mar 26, 2009 at 4:14 PM, Wolfgang Grandegger
wrote:
> Anton Vorontsov wrote:
>> On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
>>> In other words, this device is not register-level compatible with the
>>> fsl,upm-nand device. Give the node a new compatible value
>>> (tqc,t
Anton Vorontsov wrote:
> On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
> []
Here is another thought. The binding is describing that address lines
are used to activate CS lines. Offset for chip access purposes is
derived from the address line, but it doesn't directly
On Thu, Mar 26, 2009 at 11:02:06AM -0600, Grant Likely wrote:
[]
> >> Here is another thought. The binding is describing that address lines
> >> are used to activate CS lines. Offset for chip access purposes is
> >> derived from the address line, but it doesn't directly describe the
> >> hardware
On Thu, Mar 26, 2009 at 10:35 AM, Wolfgang Grandegger
wrote:
> Grant Likely wrote:
>> On Thu, Mar 26, 2009 at 9:33 AM, Wolfgang Grandegger
>> wrote:
>>> Grant Likely wrote:
Does using the reg property give the driver enough information to
reliably program the MAR for NAND connections
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 9:33 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> Does using the reg property give the driver enough information to
>>> reliably program the MAR for NAND connections that use the address
>>> line chip select scheme? Related to that, sh
On Thu, Mar 26, 2009 at 9:33 AM, Wolfgang Grandegger
wrote:
> Grant Likely wrote:
>> Does using the reg property give the driver enough information to
>> reliably program the MAR for NAND connections that use the address
>> line chip select scheme? Related to that, should the binding include
>
>
Grant Likely wrote:
> On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
>>> wrote:
Grant Likely wrote:
> For the chip offset, it's not clear what the meaning is. First, does
> the UPM contr
On Thu, Mar 26, 2009 at 1:42 AM, Wolfgang Grandegger
wrote:
> Grant Likely wrote:
>> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
>> wrote:
>>> Grant Likely wrote:
For the chip offset, it's not clear what the meaning is. First, does
the UPM controller support access of multip
Grant Likely wrote:
> On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
> wrote:
>> Grant Likely wrote:
>>> For the chip offset, it's not clear what the meaning is. First, does
>>> the UPM controller support access of multiple chips simultaneously?
>> The offset drives the corresponding addre
On Wed, Mar 25, 2009 at 2:48 PM, Wolfgang Grandegger
wrote:
> Grant Likely wrote:
>> For the chip offset, it's not clear what the meaning is. First, does
>> the UPM controller support access of multiple chips simultaneously?
>
> The offset drives the corresponding address lines, which are used t
Grant Likely wrote:
> (cc'ing devicetree-discuss)
>
> On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger
> wrote:
>> This patch adds documentation for the new NAND FSL UPM bindings for:
>>
>> NAND: FSL-UPM: add multi chip support
>> NAND: FSL-UPM: Add wait flags to support board/chip specifi
(cc'ing devicetree-discuss)
On Wed, Mar 25, 2009 at 4:08 AM, Wolfgang Grandegger
wrote:
> This patch adds documentation for the new NAND FSL UPM bindings for:
>
> NAND: FSL-UPM: add multi chip support
> NAND: FSL-UPM: Add wait flags to support board/chip specific delays
>
> Signed-off-by: Wolf
On Wed, Mar 25, 2009 at 11:08:20AM +0100, Wolfgang Grandegger wrote:
> This patch adds documentation for the new NAND FSL UPM bindings for:
>
> NAND: FSL-UPM: add multi chip support
> NAND: FSL-UPM: Add wait flags to support board/chip specific delays
>
> Signed-off-by: Wolfgang Grandegger
> -
This patch adds documentation for the new NAND FSL UPM bindings for:
NAND: FSL-UPM: add multi chip support
NAND: FSL-UPM: Add wait flags to support board/chip specific delays
Signed-off-by: Wolfgang Grandegger
---
.../powerpc/dts-bindings/fsl/upm-nand.txt | 39 +++-
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