On Thu, Aug 30, 2007 at 09:56:16AM -0500, Kumar Gala wrote:
> It don't feel its a mishmash of crap its just how things are
> defined. Maybe the SOC node was a mistake, but I think we are past
> the point of return on that.
The node itself wasn't a mistake -- the IMMR is relocatable, so it sho
On Aug 30, 2007, at 12:56 AM, Scott Wood wrote:
> On Wed, Aug 29, 2007 at 05:41:17PM -0500, Kumar Gala wrote:
>> NACK.
>>
>> I don't want pq2 to be the only platform that has the PCI bus
>> separate from the PCI controller.
>
> Could you articulate the reasons why you'd rather have a mishmash
>
On Wed, Aug 29, 2007 at 05:41:17PM -0500, Kumar Gala wrote:
> NACK.
>
> I don't want pq2 to be the only platform that has the PCI bus
> separate from the PCI controller.
Could you articulate the reasons why you'd rather have a mishmash of crap
in the soc node's ranges property?
-Scott
On Aug 28, 2007, at 3:19 PM, Scott Wood wrote:
> 1. PCI and reset are factored out into pq2.c. I renamed them from
> m82xx
> to pq2 because they won't work on the Integrated Host Processor
> line of
> 82xx chips (i.e. 8240, 8245, and such).
>
> 2. The PCI PIC, which is nominally board-specif
1. PCI and reset are factored out into pq2.c. I renamed them from m82xx
to pq2 because they won't work on the Integrated Host Processor line of
82xx chips (i.e. 8240, 8245, and such).
2. The PCI PIC, which is nominally board-specific, is used on multiple
boards, and thus is used into pq2ads-pci-p
