On Oct 5, 2009, at 2:15 AM, Mahajan Vivek-B08308 wrote:
From: Gala Kumar-B11780
Sent: Friday, September 25, 2009 12:08 AM
+ mbar(1);
why isn't eieio() sufficient here?
When I initially added / tested cache SRAM for P2020RDB, its RM talked
about using mbar() though mbar(1) is identica
> From: Gala Kumar-B11780
> Sent: Friday, September 25, 2009 12:08 AM
> > + mbar(1);
>
> why isn't eieio() sufficient here?
When I initially added / tested cache SRAM for P2020RDB, its RM talked
about using mbar() though mbar(1) is identical to eieio() opcode-wise.
Also as cache-sram works onl
On Sep 24, 2009, at 2:10 AM, Vivek Mahajan wrote:
This adds QorIQ based Cache-SRAM support as under:-
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Defines FSL_85XX_CACHE_SRAM and its bas
This adds QorIQ based Cache-SRAM support as under:-
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Defines FSL_85XX_CACHE_SRAM and its base address
Signed-off-by: Vivek Mahajan
---
Resending
This adds QorIQ based Cache-SRAM support as under:-
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Defines FSL_85XX_CACHE_SRAM and its base address
Signed-off-by: Vivek Mahajan
---
arch/pow