On May 19, 2008, at 9:26 PM, Jin Zhengxiong wrote:
-Original Message-
From: Michael Ellerman [mailto:[EMAIL PROTECTED]
Sent: Monday, May 19, 2008 10:09 AM
To: Jin Zhengxiong
Cc: [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org;
[EMAIL PROTECTED]
Subject: Re: [PATCH 2/4 V5] MSI support on
> -Original Message-
> From: Michael Ellerman [mailto:[EMAIL PROTECTED]
> Sent: Monday, May 19, 2008 10:09 AM
> To: Jin Zhengxiong
> Cc: [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org;
> [EMAIL PROTECTED]
> Subject: Re: [PATCH 2/4 V5] MSI support on 83xx/85xx/86xx board
n Zhengxiong
> Cc: [EMAIL PROTECTED]; linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH 2/4 V5] MSI support on 83xx/85xx/86xx board
>
> Hi Jason,
>
> Just a couple of comments. All of which you may ignore. :-)
>
> On Fri, 16 May 2008 17:50:45 +0800 Jason Jin
> &l
Hi Jason,
Just a couple of comments. All of which you may ignore. :-)
On Fri, 16 May 2008 17:50:45 +0800 Jason Jin <[EMAIL PROTECTED]> wrote:
>
> +static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
> +{
> + if ((len % 0x8) != 0) {
why not (len % (2 * sizeof(u32))) ?
> + /* Format
On Fri, 2008-05-16 at 17:50 +0800, Jason Jin wrote:
> This MSI driver can be used on 83xx/85xx/86xx board.
> In this driver, virtual interrupt host and chip were
> setup. There are 256 MSI interrupts in this host, Every 32
> MSI interrupts cascaded to one IPIC/MPIC interrupt.
> The chip was treated
This MSI driver can be used on 83xx/85xx/86xx board.
In this driver, virtual interrupt host and chip were
setup. There are 256 MSI interrupts in this host, Every 32
MSI interrupts cascaded to one IPIC/MPIC interrupt.
The chip was treated as edge sensitive and some necessary
functions were setup for
