Dan Malek wrote on 2011/06/14 20:11:18:
>
> Hi Joakim.
>
> On Jun 14, 2011, at 11:00 AM, Joakim Tjernlund wrote:
>
> > I don't have a mpc850, do you?
>
> I have to say I do :-)
>
> > Probably but that is another matter. You could continue with that
> > if you like but I am stopping here ATM.
>
> O
Joakim Tjernlund/Transmode wrote on 2011/06/14 20:00:09:
> From: Joakim Tjernlund/Transmode
>
> Dan Malek wrote on 2011/06/14 18:06:45:
> >
> >
> > Hi Joakim.
> >
> > On Jun 14, 2011, at 6:54 AM, Joakim Tjernlund wrote:
> >
> > > Various kernel asm modifies SRR0/SRR1 just before executing
> > > a
Dan Malek wrote on 2011/06/14 20:11:18:
>
>
> Hi Joakim.
>
> On Jun 14, 2011, at 11:00 AM, Joakim Tjernlund wrote:
>
> > I don't have a mpc850, do you?
>
> I have to say I do :-)
Good, you get to beat the crap out of it then :)
>
> > Probably but that is another matter. You could continue with t
Hi Joakim.
On Jun 14, 2011, at 11:00 AM, Joakim Tjernlund wrote:
I don't have a mpc850, do you?
I have to say I do :-)
Probably but that is another matter. You could continue with that
if you like but I am stopping here ATM.
Oh, come on... I've been thinking about this for years, wouldn
Dan Malek wrote on 2011/06/14 18:06:45:
>
>
> Hi Joakim.
>
> On Jun 14, 2011, at 6:54 AM, Joakim Tjernlund wrote:
>
> > Various kernel asm modifies SRR0/SRR1 just before executing
> > a rfi. .
>
> I'm going to argue we can easily visually inspect for this
> since the code is static with just a
Hi Joakim.
On Jun 14, 2011, at 6:54 AM, Joakim Tjernlund wrote:
Various kernel asm modifies SRR0/SRR1 just before executing
a rfi. .
I'm going to argue we can easily visually inspect for this
since the code is static with just a couple of RFIs in these
exception handlers.
Some 8xx proce
Various kernel asm modifies SRR0/SRR1 just before executing
a rfi. If such code crosses a page boundary you risk a TLB miss
which will clobber SRR0/SRR1. Avoid this by always pinning
kernel instruction TLB space.
Signed-off-by: Joakim Tjernlund
---
arch/ppc/kernel/head_8xx.S |9 +
1
