RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-28 Thread Tang Yuantian-B29983
Thanks for your review. > -Original Message- > From: Wood Scott-B07421 > Sent: 2013年10月29日 星期二 11:26 > To: Tang Yuantian-B29983 > Cc: Wood Scott-B07421; Mark Rutland; devicet...@vger.kernel.org; > linuxppc-dev@lists.ozlabs.org; Li Yang-Leo-R58472 > Subject: Re: [PATC

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-27 Thread Tang Yuantian-B29983
> > +1. Clock Block Binding > > + > > +Required properties: > > +- compatible: Should include one or more of the following: > > + - "fsl,-clockgen": for chip specific clock block > > + - "fsl,qoriq-clockgen-[1,2].x": for chassis 1.x and 2.x clock > > +- reg: Offset and length of the clock regis

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-21 Thread Tang Yuantian-B29983
Thanks for your review. > -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: 2013年10月21日 星期一 17:15 > To: Tang Yuantian-B29983 > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; > devicet...@vger.kernel.org; Li Yang-Leo-R58472 >

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-20 Thread Tang Yuantian-B29983
> > > > > > > > > > It's still selecting from multiple PLLs. > > > > > > > > > > > I don't know whether "divider" module exists or not. If it > > > > > > exists, it should be part of PLL or between PLL and MUX. > > > > > > wherever it was, the > > > > > device tree binding is appropriate. > > > > >

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-17 Thread Tang Yuantian-B29983
> On Wed, 2013-10-16 at 21:08 -0500, Tang Yuantian-B29983 wrote: > > > > > That shows the dividers as being somewhere in between the PLL > > > > > and the > > > MUX. > > > > > The MUX is where the divider is selected. There's nothin

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-16 Thread Tang Yuantian-B29983
> > > That shows the dividers as being somewhere in between the PLL and the > MUX. > > > The MUX is where the divider is selected. There's nothing in the > > > PLL's programming interface that relates to the dividers. As such > > > it's simpler to model it as being part of the MUX. > > > > > > -S

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-15 Thread Tang Yuantian-B29983
> > > > > > > > > The device tree makes that quite clear. > > > > > > You chose to model it that way in the device tree; that doesn't make > > > it clear that the hardware works that way or that it's a good way to > > > model it. > > > > > > > Each PLL has several output which MUX node can take fro

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-14 Thread Tang Yuantian-B29983
> -Original Message- > From: Wood Scott-B07421 > Sent: 2013年10月15日 星期二 6:13 > To: Tang Yuantian-B29983 > Cc: Wood Scott-B07421; Mark Rutland; devicet...@vger.kernel.org; > linuxppc-dev@lists.ozlabs.org; Li Yang-Leo-R58472 > Subject: Re: [PATCH v5] powerpc/mpc85xx: U

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-11 Thread Tang Yuantian-B29983
Thanks for your review. > > > > > > > +- reg: Offset and length of the clock register set > > > > +- clock-frequency: Indicates input clock frequency of clock block. > > > > + Will be set by u-boot > > > > > > Why does the fact this is set by u-boot matter to the binding? > > > > > OK, I wi

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-11 Thread Tang Yuantian-B29983
Thanks for your review. > -Original Message- > From: Wood Scott-B07421 > Sent: 2013年10月12日 星期六 3:08 > To: Tang Yuantian-B29983 > Cc: ga...@kernel.crashing.org; devicet...@vger.kernel.org; linuxppc- > d...@lists.ozlabs.org > Subject: Re: [PATCH v5] powerpc/mpc85xx: U

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-11 Thread Tang Yuantian-B29983
Thanks for your review. > -Original Message- > From: Wood Scott-B07421 > Sent: 2013年10月12日 星期六 3:07 > To: Mark Rutland > Cc: Tang Yuantian-B29983; devicet...@vger.kernel.org; linuxppc- > d...@lists.ozlabs.org; Li Yang-Leo-R58472 > Subject: Re: [PATCH v5] powerpc/mpc8

RE: [PATCH v5] powerpc/mpc85xx: Update the clock nodes in device tree

2013-10-10 Thread Tang Yuantian-B29983
Thanks for your review. See my reply inline > -Original Message- > From: Mark Rutland [mailto:mark.rutl...@arm.com] > Sent: 2013年10月10日 星期四 18:04 > To: Tang Yuantian-B29983 > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; > devicet...@vger.kernel.org;

RE: [PATCH v4] powerpc/mpc85xx: Update the clock device tree nodes

2013-09-17 Thread Tang Yuantian-B29983
> > > On Wed, 2013-09-11 at 20:31 -0500, Tang Yuantian-B29983 wrote: > > > > > -Original Message- > > > > > From: Wood Scott-B07421 > > > > > Sent: 2013年9月12日 星期四 9:10 > > > > > To: Tang Yuantian-B29983 &

RE: [PATCH v4] powerpc/mpc85xx: Update the clock device tree nodes

2013-09-12 Thread Tang Yuantian-B29983
> -Original Message- > From: Wood Scott-B07421 > Sent: 2013年9月12日 星期四 22:44 > To: Tang Yuantian-B29983 > Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc- > d...@lists.ozlabs.org; devicet...@vger.kernel.org; Li Yang-Leo-R58472 > Subject: Re: [PATCH v4] po

RE: [PATCH v4] powerpc/mpc85xx: Update the clock device tree nodes

2013-09-11 Thread Tang Yuantian-B29983
> -Original Message- > From: Wood Scott-B07421 > Sent: 2013年9月12日 星期四 9:10 > To: Tang Yuantian-B29983 > Cc: ga...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; > devicet...@vger.kernel.org; Li Yang-Leo-R58472 > Subject: Re: [PATCH v4] powerpc/mpc85xx: Update

RE: [v3] powerpc/mpc85xx: Update the clock device tree nodes

2013-09-10 Thread Tang Yuantian-B29983
OK, will update per your suggestions. Thanks, Yuantian > -Original Message- > From: Wood Scott-B07421 > Sent: 2013年9月11日 星期三 5:47 > To: Tang Yuantian-B29983 > Cc: Wood Scott-B07421; ga...@kernel.crashing.org; > devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.o

RE: [PATCH] powerpc: Add I2C bus multiplexer node for B4 and T4240QDS

2013-09-05 Thread Tang Yuantian-B29983
> -Original Message- > From: Wood Scott-B07421 > Sent: 2013年9月6日 星期五 2:41 > To: Tang Yuantian-B29983 > Cc: Yang,Wei; Jia Hongtao-B38951; Wood Scott-B07421; linuxppc- > d...@lists.ozlabs.org > Subject: Re: [PATCH] powerpc: Add I2C bus multiplexer node for B4 and &

RE: [PATCH] powerpc: Add I2C bus multiplexer node for B4 and T4240QDS

2013-09-03 Thread Tang Yuantian-B29983
Hi, I noticed that there are already some nodes in i2c bus. You should at least move the existing node into PCA9547. Thanks, Yuantian > -Original Message- > From: Linuxppc-dev [mailto:linuxppc-dev- > bounces+b29983=freescale@lists.ozlabs.org] On Behalf Of Jia Hongtao- > B38951 > Sent

RE: [PATCH] powerpc: Add I2C bus multiplexer node for B4 and T4240QDS

2013-09-03 Thread Tang Yuantian-B29983
Hi, These eeproms are never used by kernel. So no need to add them. Thanks, Yuantian > -Original Message- > From: Linuxppc-dev [mailto:linuxppc-dev- > bounces+b29983=freescale@lists.ozlabs.org] On Behalf Of Yang,Wei > Sent: 2013年9月4日 星期三 9:27 > To: Jia Hongtao-B38951 > Cc: Wood Scot

RE: [v3] powerpc/mpc85xx: Update the clock device tree nodes

2013-08-26 Thread Tang Yuantian-B29983
> > > > + }; > > > > + pll1: pll1@820 { > > > > + #clock-cells = <1>; > > > > + reg = <0x820>; > > > > + compatible = "fsl,core-pll-clock"; > > > > + clocks = <&clockgen>; > > > > +

RE: [v3] powerpc/mpc85xx: Update the clock device tree nodes

2013-08-25 Thread Tang Yuantian-B29983
> > > > clockgen: global-utilities@e1000 { > > - compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0"; > > + compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0", > > + "fixed-clock"; > > + clock-output-names = "sysclk"; >

RE: [PATCH v2] of/base: release the node correctly in of_parse_phandle_with_args()

2013-04-16 Thread Tang Yuantian-B29983
> -Original Message- > From: Timur Tabi [mailto:ti...@tabi.org] > Sent: 2013年4月17日 11:31 > To: Tang Yuantian-B29983 > Cc: Grant Likely; devicetree-discuss; linuxppc-dev@lists.ozlabs.org; lkml; > Rob Herring > Subject: Re: [PATCH v2] of/base: release

RE: [PATCH v2] of/base: release the node correctly in of_parse_phandle_with_args()

2013-04-16 Thread Tang Yuantian-B29983
> -Original Message- > From: Timur Tabi [mailto:ti...@tabi.org] > Sent: 2013年4月16日 19:37 > To: Tang Yuantian-B29983 > Cc: Grant Likely; devicetree-discuss; linuxppc-dev@lists.ozlabs.org; lkml; > Rob Herring > Subject: Re: [PATCH v2] of/base: release

RE: RE: [PATCH v3] clk: add PowerPC corenet clock driver support

2013-04-16 Thread Tang Yuantian-B29983
OK, thanks. Thanks, Yuantian > -Original Message- > From: Mike Turquette [mailto:mturque...@linaro.org] > Sent: 2013年4月17日 6:27 > To: Tang Yuantian-B29983; Tang Yuantian-B29983 > Cc: linus.wall...@linaro.org; viresh.ku...@linaro.org; > shawn@linaro.org; ulf.hans...

RE: [PATCH v3] clk: add PowerPC corenet clock driver support

2013-04-15 Thread Tang Yuantian-B29983
Hi Mike, I really appreciate if you can spend some times to review this patch. Thanks, Yuantian > -Original Message- > From: Tang Yuantian-B29983 > Sent: 2013年4月9日 16:46 > To: mturque...@linaro.org > Cc: linus.wall...@linaro.org; viresh.ku...@linaro.org; > sh

RE: [PATCH v2] of/base: release the node correctly in of_parse_phandle_with_args()

2013-04-15 Thread Tang Yuantian-B29983
Hi Grant.likely, I really preciate if you can spend some times to review this patch. Thanks, Yuantian > -Original Message- > From: Tang Yuantian-B29983 > Sent: 2013年4月10日 11:37 > To: grant.lik...@secretlab.ca > Cc: rob.herr...@calxeda.com; devicetree-disc...@lists.oz

RE: [PATCH] of: remove the unnecessary of_node_put for of_parse_phandle_with_args()

2013-04-10 Thread Tang Yuantian-B29983
> -Original Message- > From: Stephen Rothwell [mailto:s...@canb.auug.org.au] > Sent: 2013年4月10日 17:03 > To: Tang Yuantian-B29983 > Cc: grant.lik...@secretlab.ca; devicetree-disc...@lists.ozlabs.org; > linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; > ro

RE: [PATCH v4] cpufreq: powerpc: Add cpufreq driver for Freescale e500mc SoCs

2013-04-09 Thread Tang Yuantian-B29983
Thanks, you make my code look better each review. Thanks, Yuantian > -Original Message- > From: Viresh Kumar [mailto:viresh.ku...@linaro.org] > Sent: 2013年4月9日 17:47 > To: Tang Yuantian-B29983 > Cc: r...@sisk.pl; cpuf...@vger.kernel.org; linux...@vger.kernel.o

RE: [PATCH 08/17] powerpc/85xx: add support to JOG feature using cpufreq interface

2013-04-06 Thread Tang Yuantian-B29983
Also send this patch to cpuf...@vger.kernel.org and linux...@vger.kernel.org And better to rebase it on git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git Thanks, Yuantian > -Original Message- > From: Linuxppc-dev [mailto:linuxppc-dev- > bounces+b29983=freescale@lists.

RE: [PATCH v3] cpufreq: Add cpufreq driver for Freescale e500mc SoCs

2013-03-31 Thread Tang Yuantian-B29983
> -Original Message- > From: cpufreq-ow...@vger.kernel.org [mailto:cpufreq-ow...@vger.kernel.org] > On Behalf Of Viresh Kumar > Sent: 2013年3月30日 21:52 > To: Tang Yuantian-B29983 > Cc: Rafael J. Wysocki; cpuf...@vger.kernel.org; Linux PM list; linuxppc- > d...@list

RE: [PATCH 2/2 v2] cpufreq: Add cpufreq driver for Freescale e500mc SoCs

2013-03-28 Thread Tang Yuantian-B29983
> -Original Message- > From: Viresh Kumar [mailto:viresh.ku...@linaro.org] > Sent: 2013年3月29日 11:17 > To: Tang Yuantian-B29983 > Cc: r...@sisk.pl; cpuf...@vger.kernel.org; linux...@vger.kernel.org; > linuxppc-dev@lists.ozlabs.org; Li Yang-R58472 > Subject: Re: [PATCH

RE: [PATCH 2/2 v2] cpufreq: Add cpufreq driver for Freescale e500mc SoCs

2013-03-28 Thread Tang Yuantian-B29983
> > +static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy) { > > + unsigned int cpu = policy->cpu; > > + struct device_node *np; > > + int i, count; > > + struct clk *clk; > > + struct cpufreq_frequency_table *table; > > + struct cpu_data *data; > >

RE: [PATCH 3/3] cpufreq: Add cpufreq driver for Freescale e500mc SOCs

2013-03-27 Thread Tang Yuantian-B29983
> > + return ret; > > + > > + pr_info("Freescale PowerPC corenet CPU frequency scaling driver\n"); > > + > > + return ret; > > +} > > + > > +static void __exit ppc_corenet_cpufreq_exit(void) { > > + cpufreq_unregister_driver(&ppc_corenet_cpufreq_driver); > > +} > > + > > +module_ini

RE: [PATCH][V2] powerpc: remove the PPC_CLOCK dependency

2013-03-07 Thread Tang Yuantian-B29983
> Subject: Re: [PATCH][V2] powerpc: remove the PPC_CLOCK dependency > > > On Mar 6, 2013, at 3:16 AM, > wrote: > > > From: Tang Yuantian > > > > config FSL_SOC and CPM do not really depend on PPC_CLOCK. So remove it. > > PPC_CLOCK also keeps powerpc archtecture from supporting COMMON_CLK. > >

RE: Cannot boot an kernel version other than 2.6.35 on P2020RDB-PCA

2012-06-04 Thread Tang Yuantian-B29983
Hi Cedric MAUSSIRE, P2020RDB-PCA Board gets supported since kernel 3.3 in mainline code. Are you sure the board works on kernel 2.6.35? Regards, Yuantian From: linuxppc-dev-bounces+b29983=freescale@lists.ozlabs.org [mailto:linuxppc-dev-bounces+b29983=freescale@lists.ozlabs.org] On Beha

RE: [PATCH 1/2 V3] powerpc/85xx: Add P1024rdb dts support

2012-02-13 Thread Tang Yuantian-B29983
> I'm curious how fsl_pq_mdio_probe returns successfully when probing the > phys on the first pass (mdio@24000). I don't have a P1024 to test with, > but I believe it has the same ETSEC configuration as the P1010 that I > work with. > > Inside the fsl_pq_mdio_probe routine (fsl_pq_mdio.c), a su

RE: [PATCH] powerpc/85xx: Add P1024rdb dts support

2012-01-10 Thread Tang Yuantian-B29983
> > > > P1020rdb has vitesse-7385 switch. > > I'm talking about the SoC, not the board. > > > fsl/p1020si-post.dtsi can be used for both boards. > > What are you basing this on? Has someone looked over both manuals in > detail and concluded that every device described is 100% compatible? > I

RE: [PATCH] powerpc/85xx: Add P1024rdb dts support

2012-01-09 Thread Tang Yuantian-B29983
> On 01/09/2012 02:37 AM, b29...@freescale.com wrote: > > +/include/ "p1024rdb.dtsi" > > +/include/ "fsl/p1020si-post.dtsi" > > Is p1024 100% software-compatible with p1020? > > They have different manuals... > > -Scott P1020rdb has vitesse-7385 switch. fsl/p1020si-post.dtsi can be used for bo