From: Wang Dongsheng
When the DIU enable, only through the way of indirect access
to read/write pixis register. So add direct and indirect for
pci slot reset.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c
b/arch/powerpc/platforms/85xx/p1022_ds.c
index 371df
From: Wang Dongsheng
RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.
Add this for freescale powerpc platform and layerscape platform.
Signed-off-by: Chenhui Zhao
Signed-off-by: Tang Yuantian
Signed-of
From: Wang Dongsheng
This issue caused on 'commit 990486c8af04 ("strscpy: zero any trailing
garbage bytes in the destination")'.
zero_bytemask is not implemented on PowerPC. So copy the zero_bytemask
of BIG_ENDIAN implementation from include/asm-generic/word-at-a-time.h
to arch/powerpc/include/a
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
---
*v3*: Add "fsl,#rcpm-wakeup-cells" for rcpm node.
*v2*: No changes.
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496..ac5f9a2 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls102
From: Wang Dongsheng
RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.
Add this for freescale powerpc platform and layerscape platform.
Signed-off-by: Chenhui Zhao
Signed-off-by: Tang Yuantian
Signed-of
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
---
*v2*: No changes.
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496..deb1271 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -139,6 +139,7 @@
From: Wang Dongsheng
RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.
Add this for freescale powerpc platform and layerscape platform.
Signed-off-by: Chenhui Zhao
Signed-off-by: Tang Yuantian
Signed-of
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 973a496..deb1271 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -139,6 +139,7 @@
sdhci,auto-cmd12;
From: Wang Dongsheng
RCPM is the Run Control and Power Management module performs all
device-level tasks associated with device run control and power
management.
Add this for freescale powerpc platform and layerscape platform.
Signed-off-by: Chenhui Zhao
Signed-off-by: Tang Yuantian
Signed-of
From: Jason Jin
In u-boot, when set the video as console, the name 'vga' is used
as a general name for the video device, during the fdt_fixup_stdout
process, the 'vga' name is used to search in the dtb to setup the
'linux,stdout-path' node. Though the P1022 DIU is not VGA-compatible
device, to me
From: Jason Jin
For deep sleep, the diu module will power off, when wake up
from the deep sleep, the registers need to be reinitialized.
Signed-off-by: Jason Jin
Signed-off-by: Wang Dongsheng
---
*v2*
Changes:
- int i -> unsigned int i.
Rmove:
- struct mfb_info *mfbi;
diff --git a/drivers/vi
From: Wang Dongsheng
SCFG provides SoC specific configuration and status registers for
the chip. Add this for powerpc platform.
Signed-off-by: Wang Dongsheng
---
*V2*
- Remove scfg description in board.txt and create scfg.txt for scfg.
- Change "fsl,-scfg" to "fsl,-scfg"
diff --git a/Documenta
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
---
*V2*
No changes.
diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
index 9e9f7e2..9770d02 100644
--- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1040si-
From: Wang Dongsheng
Move fsl_diu_init into diu probe function, because it should be
initialized when system get diu device tree node, not always do
initialization.
Signed-off-by: Wang Dongsheng
---
Changes:
Rebase original patch for upstream because fsl-diu-fb.c has moved to fbdev dir.
This p
From: Wang Dongsheng
QIXIS System Logic FPGA support to manage system power. So we
through QIXIS to power off freescale SOC.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c
b/arch/powerpc/platforms/85xx/corenet_generic.c
index 1f309cc..e1a1eb5 100644
-
From: Wang Dongsheng
U-boot put non-boot cpus into an low power state(PW10/PW20 or DOZE) when cpu
powered up. To exit low power state kernel will send DOORBELL or MPIC-IPI
signal to all those CPUs.
e500/e500v2 use mpic to send IPI signal.
e500mc and later use doorbell to send IPI signal.
This f
From: Wang Dongsheng
Kernel cannot bring up Non-boot cpus always get "Processor xx is stuck".
this issue bring by http://patchwork.ozlabs.org/patch/418912/ (powerpc:
Secondary CPUs must set cpu_callin_map after setting active and online)
We need to take timebase after bootup cpu give the timebase
From: Wang Dongsheng
At T104x platfrom the timer clock will be changed from platform_clock
to sys_ref_clock when system going to deep sleep.
So before system going to deep sleep, we need to change time to adapt
to the new frequency that is sys_ref_clock. And after resume from deep
sleep, restore
From: Wang Dongsheng
Add set_pm_suspend_state & pm_suspend_state functions to set/get
suspend state. When system going to sleep or deep sleep, devices
can get the system suspend state(STANDBY/MEM) through pm_suspend_state
function and to handle different situations.
Signed-off-by: Wang Dongsheng
From: Wang Dongsheng
Move fsl_diu_init into diu probe function, because it should be
initialized when system get diu device tree node, not always do
initialization.
Signed-off-by: Wang Dongsheng
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index e8758b9..75ab20e 100644
From: Wang Dongsheng
Root cause is pcie power management state transition need a delay.
The delay time define in "PCI Bus Power Management Interface Specification".
D0, D1 or D2 --> D3 need to delay 10ms.
D3 --> D0 need to delay 10ms.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/sy
From: Wang Dongsheng
PCI controller disable PME message report feature, that shouldn't
have happened. Fix it and enable PME message report feature.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 3f415e2..4bd091a 100644
--- a/arch/
From: Wang Dongsheng
Corenet_generic is a generic platform initialization. Those based on
the corenet_generic board maybe need a particular initialize to
enable/set some IP-Blocks. So add "Fix Generic Initialization" to solve
this kind of special cases.
Signed-off-by: Wang Dongsheng
---
*v2*
1
From: Wang Dongsheng
T104x Platforms based on corenet_generic. The platforms DIU-block
that need a special initialization to solve some callback functions,
those functions depend on platform handle.
Signed-off-by: Wang Dongsheng
---
This patch is *depends on* Prabhakar Kushwaha support T104x pa
From: Wang Dongsheng
At T104x platfrom the timer clock will be changed when system going to
deep sleep. Add suspend function to switch timer time before system
going to deep sleep, and recovery the time after resume from deep sleep.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/sysde
From: Wang Dongsheng
Add set_pm_suspend_state & pm_suspend_state functions to set/get suspend state.
When system going to sleep, devices can get the system suspend
state(STANDBY/MEM)
through pm_suspend_state function and handle different situations.
Signed-off-by: Wang Dongsheng
diff --git a/
ev/null
+++ b/drivers/cpuidle/cpuidle-e500.c
@@ -0,0 +1,194 @@
+/*
+ * CPU Idle driver for Freescale PowerPC e500 family processors.
+ *
+ * Copyright 2014 Freescale Semiconductor, Inc.
+ *
+ * Author: Dongsheng Wang
+ *
+ * This program is free software; you can redistribute it and/or modify
+ *
From: Wang Dongsheng
If softirq use hardirq stack, we will get kernel painc when a hard irq coming
again
during __do_softirq enable local irq to deal with softirq action. So we need to
switch
satck into softirq stack when invoke soft irq.
Task--->
| Task stack
|
Interr
From: Jason Jin
For deep sleep, the diu module will power off, when wake up
from the deep sleep, the registers need to be reinitialized.
Signed-off-by: Jason Jin
Signed-off-by: Wang Dongsheng
diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c
index e8758b9..7ec780c 100644
--
From: Wang Dongsheng
If we do nothing in suspend/resume, some platform PCIe ip-block
can't guarantee the link back to L0 state from sleep, then, when
we read the EP device will hang. Only we send pme turnoff message
in pci controller suspend, and send pme exit message in resume, the
link state wi
From: Wang Dongsheng
Add suspend/resume and device_init_wakeup to enable ds3232 as
wakeup source, /sys/class/rtc/rtcX/wakealarm for set wakeup alarm.
Signed-off-by: Wang Dongsheng
diff --git a/drivers/rtc/rtc-ds3232.c b/drivers/rtc/rtc-ds3232.c
index b83bb5a5..a3c40d5 100644
--- a/drivers/rtc/
From: Wang Dongsheng
Use fsl_cpu_state_save/fsl_cpu_state_restore to save/restore registers.
Use the functions to save/restore registers, so we don't need to
maintain the code.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/kernel/swsusp_booke.S
b/arch/powerpc/kernel/swsusp_booke.S
i
From: Wang Dongsheng
Add fsl_cpu_state_save/fsl_cpu_state_restore functions, used for deep
sleep and hibernation to save/restore core registers. We abstract out
save/restore code for use in various modules, to make them don't need
to maintain.
Currently supported processors type are E6500, E5500
From: Wang Dongsheng
E500MC and E5500 PVR will be used in subsequent save/restore core
state patches.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 62b114e..cd7b630 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc
From: Wang Dongsheng
The new suspend/resume implementation, send pme turnoff message
in suspend, and send pme exit message in resume.
Add a PME handler, to response PME & message interrupt.
Change platform_driver->suspend/resume to syscore->suspend/resume.
pci-driver will call back EP device, t
From: Wang Dongsheng
the root port bus->self always NULL, so put root port pci device
into root port bus->self.
Signed-off-by: Wang Dongsheng
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 38e403d..7f2d1ab 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1472,6 +147
From: Wang Dongsheng
On P3041, P1020, P1021, P1022, P1023 eLBC event interrupts are routed
to Int9(P3041) & Int3(P102x) while ELBC error interrupts are routed to
Int0, we need to call request_irq for each.
Signed-off-by: Shaohui Xie
Signed-off-by: Wang Dongsheng
Signed-off-by: Kumar Gala
dif
From: Wang Dongsheng
P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0 interrupt.
The corresponding lbc general interrupt is internal IRQ3.
Signed-off-by: Wang Dongsheng
From: Wang Dongsheng
Currently MPIC provides .mask, but not .disable. This means that
effectively disable_irq() soft-disables the interrupt, and you get
a .mask call if an interrupt actually occurs.
I'm not sure if this was intended as a performance benefit (it seems common
to omit .disable on
From: Wang Dongsheng
When the timer GTCCR toggle bit is inverted, we calculated the rest
of the time is not accurate. So we need to ignore this bit.
Signed-off-by: Wang Dongsheng
---
v2:
No change.
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index 22d7d57..
From: Wang Dongsheng
In some cases tmp_sec may be greater than ticks, because in the process
of calculation ticks and tmp_sec will be rounded.
Signed-off-by: Wang Dongsheng
---
v2:
Add the new patch in v2.
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index 7
From: Wang Dongsheng
When the timer GTCCR toggle bit is inverted, we calculated the rest
of the time is not accurate. So we need to ignore this bit.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index 22d7d57..0fb70c9 100644
---
From: Wang Dongsheng
make Freescale platform use pci_platform_pm_ops struct.
Signed-off-by: Wang Dongsheng
---
If device's not set power state, we will use this interface to put the
device's into the correct state.
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 9c91ecc..48f8b1a 1006
From: Wang Dongsheng
Add an external interrupt for rtc node.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi
b/arch/powerpc/boot/dts/p1022ds.dtsi
index 5725058..957e0dc 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -1
From: Wang Dongsheng
RTC Hardware(ds3232) and rtc compatible string does not match.
Change "dallas,ds1339" to "dallas,ds3232".
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi
b/arch/powerpc/boot/dts/p1022ds.dtsi
index 873da35..5725058 100644
--- a/arch/powerpc/bo
From: Wang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait time interface:(Nanoseco
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec
idle patches.
Signed-off-by: Wang Dongsheng
---
*v3:
Add bit definitions for PWRMGTCR0.
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/include/asm/reg_booke.h | 9 +
2 files changed, 1
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Thursday, November 07, 2013 10:13 AM
> To: Wood Scott-B07421
> Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Orig
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, November 07, 2013 9:20 AM
> To: Wang Dongsheng-B40534
> Cc: Bhushan Bharat-R65777; Wood Scott-B07421; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Wednesday, November 06, 2013 1:25 PM
> To: Wang Dongsheng-B40534; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Orig
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 05, 2013 5:52 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; Bhushan Bharat-R65777; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 05, 2013 7:48 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; Bhushan Bharat-R65777; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Monday, October 21, 2013 11:11 AM
> To: Wood Scott-B07421
> Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Original
From: Wang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait time interface:(Nanosecond)
/sys/dev
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec
idle patches.
Signed-off-by: Wang Dongsheng
---
*v3:
Add bit definitions for PWRMGTCR0.
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/include/asm/reg_booke.h | 9 +
2 files changed, 1
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait time interface:(Nanosecond)
/sys/dev
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec
idle patches.
Signed-off-by: Wang Dongsheng
---
*v3:
Add bit definitions for PWRMGTCR0.
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/include/asm/reg_booke.h | 9 +
2 files changed, 1
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Add a sys interface to enable/diable pw20 state or altivec idle, and
control the wait entry time.
Enable/Disable interface:
0, disable. 1, enable.
/sys/devices/system/cpu/cpuX/pw20_state
/sys/devices/system/cpu/cpuX/altivec_idle
Set wait entry bit interface:
bit value range
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec
idle patches.
Signed-off-by: Wang Dongsheng
---
*v3:
Add bit definitions for PWRMGTCR0.
arch/powerpc/include/asm/reg.h | 2 ++
arch/powerpc/include/asm/reg_booke.h | 9 +
2 files changed, 1
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
E6500 PVR and SPRN_PWRMGTCR0 will be used in subsequent pw20/altivec idle
patches.
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 64264bf..d4160ca 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powe
From: Wang Dongsheng
Using hardware features make core automatically enter PW20 state.
Set a TB count to hardware, the effective count begins when PW10
is entered. When the effective period has expired, the core will
proceed from PW10 to PW20 if no exit conditions have occurred during
the period.
From: Wang Dongsheng
Each core's AltiVec unit may be placed into a power savings mode
by turning off power to the unit. Core hardware will automatically
power down the AltiVec unit after no AltiVec instructions have
executed in N cycles. The AltiVec power-control is triggered by hardware.
Signed
From: Wang Dongsheng
Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).
SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE
From: Wang Dongsheng
Add cpuidle support for e500 family, using cpuidle framework to
manage various low power modes. The new implementation will remain
compatible with original idle method.
Initially, this supports PW10, and subsequent patches will support
PW20/DOZE/NAP.
Signed-off-by: Wang Don
From: Wang Dongsheng
After __cpuidle_register_device, the cpu incs are added up, but decs
are not, thus the module refcount is not match. So the module "exit"
function can not be executed when we do remove operation. Move
module_put into __cpuidle_register_device to fix it.
Signed-off-by: Wang D
From: Wang Dongsheng
Export cpuidle_idle_call symbol, make this function can be invoked
in the module.
Signed-off-by: Wang Dongsheng
---
Branch: pm-cpuidle
drivers/cpuidle/cpuidle.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index
From: Wang Dongsheng
The module can not be removed when execute "rmmod". rmmod not use
"--force".
Log:
root:~# rmmod cpuidle-e500
incs[9], decs[1]
rmmod: can't unload 'cpuidle_e500': Resource temporarily unavailable
Signed-off-by: Wang Dongsheng
---
Branch: pm-cpuidle
drivers/cpuidle/cpuidle
From: Wang Dongsheng
Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).
SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE
From: Wang Dongsheng
Signed-off-by: Wang Dongsheng
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index 6f3887d..0a8d0cb 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -138,6 +138,7 @@ extern const char *pow
From: Wang Dongsheng
move wait instructions from idle_e500.S to idle_book3e.S
idle_e500.S: rename e500_idle to e500_idle_ph.
idle_book3e.S: rename BOOK3E to E500, this file not only use 64bit
mode.
Next we will modify the current cpu idle running way, and will use
cpuidle framework. Distinguish
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