From: Wang Dongsheng <dongsheng.w...@freescale.com>

Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).

SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE to
translate virtual address to real address.

More registers are saved in BookE-64bit.(TCR, SPRG1)

Signed-off-by: Wang Dongsheng <dongsheng.w...@freescale.com>
---
v2:
* Remove: Save SPRG0, SPRG2-SPRG7.
  SPRG1 should be saved, the paca will be saved here.

* Add: Invaild tlbs.

* Modify: Code style, add whitespace after commas.

diff --git a/arch/powerpc/kernel/swsusp_asm64.S 
b/arch/powerpc/kernel/swsusp_asm64.S
index 86ac1d9..f530350 100644
--- a/arch/powerpc/kernel/swsusp_asm64.S
+++ b/arch/powerpc/kernel/swsusp_asm64.S
@@ -46,10 +46,19 @@
 #define SL_r29         0xe8
 #define SL_r30         0xf0
 #define SL_r31         0xf8
-#define SL_SIZE                SL_r31+8
+#define SL_SPRG1       0x100
+#define SL_TCR         0x108
+#define SL_SIZE                SL_TCR+8
 
 /* these macros rely on the save area being
  * pointed to by r11 */
+
+#define SAVE_SPR(register)             \
+       mfspr   r0, SPRN_##register     ;\
+       std     r0, SL_##register(r11)
+#define RESTORE_SPR(register)          \
+       ld      r0, SL_##register(r11)  ;\
+       mtspr   SPRN_##register, r0
 #define SAVE_SPECIAL(special)          \
        mf##special     r0              ;\
        std     r0, SL_##special(r11)
@@ -103,8 +112,15 @@ _GLOBAL(swsusp_arch_suspend)
        SAVE_REGISTER(r30)
        SAVE_REGISTER(r31)
        SAVE_SPECIAL(MSR)
-       SAVE_SPECIAL(SDR1)
        SAVE_SPECIAL(XER)
+#ifdef CONFIG_PPC_BOOK3S_64
+       SAVE_SPECIAL(SDR1)
+#else
+       SAVE_SPR(TCR)
+
+       /* Save SPRG1, SPRG1 be used save paca */
+       SAVE_SPR(SPRG1)
+#endif
 
        /* we push the stack up 128 bytes but don't store the
         * stack pointer on the stack like a real stackframe */
@@ -151,6 +167,7 @@ copy_page_loop:
        bne+    copyloop
 nothing_to_copy:
 
+#ifdef CONFIG_PPC_BOOK3S_64
        /* flush caches */
        lis     r3, 0x10
        mtctr   r3
@@ -167,6 +184,7 @@ nothing_to_copy:
        sync
 
        tlbia
+#endif
 
        ld      r11,swsusp_save_area_ptr@toc(r2)
 
@@ -208,16 +226,39 @@ nothing_to_copy:
        RESTORE_REGISTER(r29)
        RESTORE_REGISTER(r30)
        RESTORE_REGISTER(r31)
+
+#ifdef CONFIG_PPC_BOOK3S_64
        /* can't use RESTORE_SPECIAL(MSR) */
        ld      r0, SL_MSR(r11)
        mtmsrd  r0, 0
        RESTORE_SPECIAL(SDR1)
+#else
+       /* Restore SPRG1, be used to save paca */
+       ld      r0, SL_SPRG1(r11)
+       mtsprg  1, r0
+
+       RESTORE_SPECIAL(MSR)
+
+       /* Restore TCR and clear any pending bits in TSR. */
+       RESTORE_SPR(TCR)
+       lis     r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
+       mtspr   SPRN_TSR, r0
+
+       /* Kick decrementer */
+       li      r0, 1
+       mtdec   r0
+#endif
        RESTORE_SPECIAL(XER)
 
        sync
 
+       /* Invalidate all tlbs */
+       bl      _tlbil_all
+
        addi    r1,r1,-128
+#ifdef CONFIG_PPC_BOOK3S_64
        bl      slb_flush_and_rebolt
+#endif
        bl      do_after_copyback
        addi    r1,r1,128
 
-- 
1.8.0


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