isaku.yamah...@intel.com writes:
> From: Isaku Yamahata
>
> Move processor compatibility check from kvm_arch_processor_compat() into
^
kvm_arch_check_processor_compat()
> kvm_arch_hardware_setup(). The check doe
Le 23/09/2022 à 08:08, Rohan McLure a écrit :
> On creation and clearing of a page table mapping, instrument such calls
> by invoking page_table_check_pte_set and page_table_check_pte_clear
> respectively. These calls serve as a sanity check against illegal
> mappings.
>
> Enable ARCH_SUPPORTS_P
Le 23/09/2022 à 08:08, Rohan McLure a écrit :
> Add the following helpers for detecting whether a page table entry
> is a leaf and is accessible to user space.
>
> * pte_user_accessible_page
> * pmd_user_accessible_page
> * pud_user_accessible_page
>
> Also implement missing pud_user defi
On Tue Sep 20, 2022 at 4:41 PM AEST, Christophe Leroy wrote:
> This partialy reapply commit ef5b570d3700 ("powerpc/irq: Don't
> open code irq_soft_mask helpers") which was reverted by
> commit 684c68d92e2e ("Revert "powerpc/irq: Don't open code
> irq_soft_mask helpers"")
>
> irq_soft_mask_set_retur
On 22/09/22 22:15, Arnaldo Carvalho de Melo wrote:
> Em Wed, Sep 21, 2022 at 10:38:38PM +0530, Athira Rajeev escreveu:
>> The perf test named “build id cache operations” skips with below
>> error on some distros:
>
> I wonder if we shouldn't instead state that bash is needed?
>
> ⬢[acme@toolbox p
On Fri Sep 23, 2022 at 3:46 PM AEST, Christophe Leroy wrote:
>
>
> Le 23/09/2022 à 05:30, Nicholas Piggin a écrit :
> > This adds basic POWER10_CPU option, which builds with -mcpu=power10.
> >
> > Signed-off-by: Nicholas Piggin
> > ---
> > There's quite a lot of asm and linker changes slated for
On Fri Sep 23, 2022 at 3:34 PM AEST, Christophe Leroy wrote:
>
>
> Le 23/09/2022 à 05:25, Nicholas Piggin a écrit :
> > Using a 32-bit constant for this marker allows it to be loaded with
> > two ALU instructions, like 32-bit. This avoids a TOC entry and a
> > TOC load that depends on the r2 value
Prior to this commit, pud_pfn was implemented with BUILD_BUG as the inline
function for 64-bit Book3S systems but is never included, as its
invocations in generic code are guarded by calls to pud_devmap which return
zero on such systems. A future patch will provide support for page table
checks, th
Add the following helpers for detecting whether a page table entry
is a leaf and is accessible to user space.
* pte_user_accessible_page
* pmd_user_accessible_page
* pud_user_accessible_page
Also implement missing pud_user definitions for both Book3S/E 64-bit
systems.
Signed-off-by: Rohan McL
On creation and clearing of a page table mapping, instrument such calls
by invoking page_table_check_pte_set and page_table_check_pte_clear
respectively. These calls serve as a sanity check against illegal
mappings.
Enable ARCH_SUPPORTS_PAGE_TABLE_CHECK for all ppc64, and 32-bit
platforms implemen
Le 23/09/2022 à 05:30, Nicholas Piggin a écrit :
> This adds basic POWER10_CPU option, which builds with -mcpu=power10.
>
> Signed-off-by: Nicholas Piggin
> ---
> There's quite a lot of asm and linker changes slated for the next merge
> window already so I may leave the pcrel patch for next tim
Le 23/09/2022 à 05:25, Nicholas Piggin a écrit :
> Using a 32-bit constant for this marker allows it to be loaded with
> two ALU instructions, like 32-bit. This avoids a TOC entry and a
> TOC load that depends on the r2 value that has just been loaded from
> the PACA.
>
> This changes the value
successfully.
More configs may be tested in the coming days.
gcc tested configs:
um i386_defconfig
um x86_64_defconfig
powerpc allnoconfig
arc randconfig-r043-20220922
sh
On Thu, 2022-09-22 at 09:04 +, Christophe Leroy wrote:
>
> Le 22/09/2022 à 10:29, Haren Myneni a écrit :
> > DSI error will be generated when the paste operation is issued on
> > the suspended NX window due to NX state changes. The hypervisor
> > expects the partition to ignore this error duri
This adds basic POWER10_CPU option, which builds with -mcpu=power10.
Signed-off-by: Nicholas Piggin
---
There's quite a lot of asm and linker changes slated for the next merge
window already so I may leave the pcrel patch for next time. I think we
can add the basic POWER10 build option though.
T
The interrupt entry code carefully saves a minimal number of registers,
so in some places the TOC is required, it is loaded into a different
register, so provide a macro that can supply an alternate TOC register.
This continues to use got addressing because TOC-relative results in
"got/toc optimiz
A later change stops the kernel using r2 and loads it with a poison
value. Provide a PACATOC loading abstraction which can hide this
detail.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/ppc_asm.h | 6 ++
arch/powerpc/kernel/exceptions-64e.S | 12 ++-
There is no need to use GOT addressing within the kernel.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/boot/ppc_asm.h| 3 ++-
arch/powerpc/include/asm/ppc_asm.h | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/ppc_asm.h b/arch/powerpc/boot/ppc_
Use helper macros to access global variables, and place them in .data
sections rather than in .toc. Putting addresses in TOC is not required
because the kernel is linked with a single TOC.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/boot/opal-calls.S | 6 +++---
arch/powerpc/bo
Using a 32-bit constant for this marker allows it to be loaded with
two ALU instructions, like 32-bit. This avoids a TOC entry and a
TOC load that depends on the r2 value that has just been loaded from
the PACA.
This changes the value for 32-bit as well, so both have the same
value in the low 4 by
This is a cleaned up set of the initial prep patches from the pcrel
series, dealing with regularising addressing variables from asm
and using helper macros more consistently.
Nothing really new, this is more complete, splits out the changes
more logically, adds changelog/comments, and avoids touch
On Mon, 2022-08-15 at 15:46 +1000, Michael Ellerman wrote:
> Guenter Roeck writes:
> > On Wed, Jul 06, 2022 at 12:21:48PM +0200, Pali Rohár wrote:
> > > Other Linux architectures use DT property 'linux,pci-domain' for
> > > specifying
> > > fixed PCI domain of PCI controller specified in Device-T
On Thu, 2022-09-01 at 13:53 +1000, Michael Ellerman wrote:
> >
> > I sent two patches which do another steps to achieve it:
> > https://lore.kernel.org/linuxppc-dev/20220817163927.24453-1-p...@kernel.org/t/#u
> >
> > Main blocker is pci-OF-bus-map which is in direct conflict with
> > CONFIG_PPC_P
On 9/22/22 19:26, John Hubbard wrote:
>
> Reviewed-by: John Hubbard
>
I forgot to mention that I had applied your fix to Akira's
issue, before reviewing. So that fix works and builds and
looks nice too.
thanks,
--
John Hubbard
NVIDIA
On 9/20/22 05:23, David Hildenbrand wrote:
> [1]
> https://lkml.kernel.org/r/CAHk-=wiEAH+ojSpAgx_Ep=nkpwhu8ado3v56bxccsu97oyj...@mail.gmail.com
> [2]
> https://lore.kernel.org/r/CAHk-=wg40eazofo16eviaj7mfqdhz2gvebvfsmf6gyzsprj...@mail.gmail.com
> [2]
> https://lkml.kernel.org/r/CAHk-=wit-dmhmfqe
On 9/22/22 19:11, Joe Perches wrote:
>> Should this be a separate patch? Adding a bunch of exceptions to the BUG()
>> rules is
>> a separate and distinct thing from adding VM_BUG_ON() and other *BUG*()
>> variants to
>> the mix.
>
> Not in my opinion.
OK, then. :)
>
>>> m
On Thu, 2022-09-22 at 19:05 -0700, John Hubbard wrote:
> On 9/20/22 05:23, David Hildenbrand wrote:
> > checkpatch does not point out that VM_BUG_ON() and friends should be
> > avoided, however, Linus notes:
> >
> > VM_BUG_ON() has the exact same semantics as BUG_ON. It is literally
> > no
On 9/20/22 05:23, David Hildenbrand wrote:
> checkpatch does not point out that VM_BUG_ON() and friends should be
> avoided, however, Linus notes:
>
> VM_BUG_ON() has the exact same semantics as BUG_ON. It is literally
> no different, the only difference is "we can make the code smaller
>
On Thu, Sep 22, 2022 at 3:38 PM Nathan Lynch wrote:
>
> The error injection facility on pseries VMs allows corruption of
> arbitrary guest memory, potentially enabling a sufficiently privileged
> user to disable lockdown or perform other modifications of the running
> kernel via the rtas syscall.
On Thu, Sep 22, 2022 at 3:38 PM Nathan Lynch wrote:
>
> The /proc/powerpc/ofdt interface allows the root user to freely alter
> the in-kernel device tree, enabling arbitrary physical address writes
> via drivers that could bind to malicious device nodes, thus making it
> possible to disable lockdo
On Thu, Sep 22, 2022 at 12:15 PM Arnaldo Carvalho de Melo
wrote:
>
> Em Wed, Sep 21, 2022 at 10:38:38PM +0530, Athira Rajeev escreveu:
> > The perf test named “build id cache operations” skips with below
> > error on some distros:
>
> I wonder if we shouldn't instead state that bash is needed?
>
>
Hi,
Minor nits on section title adornments.
See inline comments below.
On Tue, 20 Sep 2022 14:23:00 +0200, David Hildenbrand wrote:
> Linus notes [1] that the introduction of new code that uses VM_BUG_ON()
> is just as bad as BUG_ON(), because it will crash the kernel on
> distributions that enab
On Fri, Sep 02, 2022 at 02:16:34AM +0800, Zhuo Chen wrote:
> Statements clearing AER error status in aer_enable_rootport() has the
> same function as pci_aer_raw_clear_status(). So we replace them, which
> has no functional changes.
>
> Signed-off-by: Zhuo Chen
> ---
> drivers/pci/pcie/aer.c | 7
On Thu, 2022-09-22 at 14:10 -0700, Daniel Walker wrote:
> On Thu, Sep 22, 2022 at 05:03:46PM -0400, Sean Anderson wrote:
[snip]
> > As recently as last month, someone's patch to add such support was
> > rejected for this reason [1].
> >
> > --Sean
> >
> > [1]
> > https://lore.kernel.org/linux-ar
On Thu, Sep 22, 2022 at 05:03:46PM -0400, Sean Anderson wrote:
>
>
>
> On 9/22/22 4:53 PM, Daniel Walker wrote:
> > On Thu, Sep 22, 2022 at 04:45:01PM -0400, Sean Anderson wrote:
> >>
> >>
> >>
> >> For an arm64 platform (after rebasing):
> >>
> >> Tested-by: Sean Anderson
> >
> > Maybe I'
On Fri, Sep 02, 2022 at 02:16:33AM +0800, Zhuo Chen wrote:
> When state is pci_channel_io_frozen in pcie_do_recovery(),
> the severity is fatal and fatal status should be cleared.
> So we add pci_aer_clear_fatal_status().
Seems sensible to me. Did you find this by code inspection or by
debugging
On 9/22/22 4:53 PM, Daniel Walker wrote:
> On Thu, Sep 22, 2022 at 04:45:01PM -0400, Sean Anderson wrote:
>>
>>
>>
>> For an arm64 platform (after rebasing):
>>
>> Tested-by: Sean Anderson
>
> Maybe I'll re-submit it.
>
> Daniel
>
There's still no way to extend the command line on ARM6
On Thu, Sep 22, 2022 at 04:45:01PM -0400, Sean Anderson wrote:
>
>
>
> For an arm64 platform (after rebasing):
>
> Tested-by: Sean Anderson
Maybe I'll re-submit it.
Daniel
On 4/16/21 12:09 AM, Daniel Walker wrote:
>
> v4 release changes
>
> * Updated insert-sys-cert tool to change command line symbols after
> compilation.
>
> This tool is used to release binary kernels internally to companies
> and then later insert certificates for each product b
On Mon, Sep 12, 2022 at 01:09:05AM +0800, Zhuo Chen wrote:
> On 9/12/22 12:22 AM, Serge Semin wrote:
> > On Fri, Sep 02, 2022 at 02:16:32AM +0800, Zhuo Chen wrote:
> > > Status bits for ERR_NONFATAL errors only are cleared in
> > > pci_aer_clear_nonfatal_status(), but we want clear uncorrectable
>
Add two new lockdown reasons for use in powerpc's pseries platform
code.
The pseries platform allows hardware-level error injection via certain
calls to the RTAS (Run Time Abstraction Services) firmware. ACPI-based
error injection is already restricted in lockdown; this facility
should be restrict
The /proc/powerpc/ofdt interface allows the root user to freely alter
the in-kernel device tree, enabling arbitrary physical address writes
via drivers that could bind to malicious device nodes, thus making it
possible to disable lockdown.
Historically this interface has been used on the pseries p
The error injection facility on pseries VMs allows corruption of
arbitrary guest memory, potentially enabling a sufficiently privileged
user to disable lockdown or perform other modifications of the running
kernel via the rtas syscall.
Block the PAPR error injection facility from being opened or c
Em Wed, Sep 21, 2022 at 10:38:38PM +0530, Athira Rajeev escreveu:
> The perf test named “build id cache operations” skips with below
> error on some distros:
I wonder if we shouldn't instead state that bash is needed?
⬢[acme@toolbox perf-urgent]$ head -1 tools/perf/tests/shell/*.sh | grep ^#
#!/b
From: Isaku Yamahata
Move processor compatibility check from kvm_arch_processor_compat() into
kvm_arch_hardware_setup(). The check does model name comparison with a
global variable, cur_cpu_spec. There is no point to check it at run time
on all processors.
kvmppc_core_check_processor_compat()
On 20/09/2022 22:23, Sean Anderson wrote:
> This adds a binding for the SerDes module found on QorIQ processors.
> Each phy is a subnode of the top-level device, possibly supporting
> multiple lanes and protocols. This "thick" #phy-cells is used due to
> allow for better organization of parameters.
On 22/09/2022 17:23, Sean Anderson wrote:
>>
>> This check can fail if there are any dependencies. The base for a patch
>> series is generally the most recent rc1.
>>
>> If you already ran 'make dt_binding_check' and didn't see the above
>> error(s), then make sure 'yamllint' is installed and dt-sc
On 9/21/22 2:57 AM, Krzysztof Kozlowski wrote:
> On Tue, 20 Sep 2022 16:23:50 -0400, Sean Anderson wrote:
>> This adds a binding for the SerDes module found on QorIQ processors.
>> Each phy is a subnode of the top-level device, possibly supporting
>> multiple lanes and protocols. This "thick" #p
On 28/07/2022 08:31:19, Nicholas Piggin wrote:
> Provide an option that holds off queueing indefinitely while the lock
> owner is preempted. This could reduce queueing latencies for very
> overcommitted vcpu situations.
>
> This is disabled by default.
Hi Nick,
I should have missed something her
On Wed, 21 Sep 2022 01:32:01 +0100,
Sean Christopherson wrote:
>
> From: Paolo Bonzini
>
> KVM_REQ_UNHALT is now unnecessary because it is replaced by the return
> value of kvm_vcpu_block/kvm_vcpu_halt. Remove it.
>
> No functional change intended.
>
> Signed-off-by: Paolo Bonzini
> Signed-
+22) Do not crash the kernel
+---
+
+In general, it is not the kernel developer's decision to crash the kernel.
+
+Avoid panic()
+=
This looks to me like a subsection-level title. The adornment symbol
needs to be:
*
+
+panic() should be u
On 21.09.22 06:40, Kalle Valo wrote:
David Hildenbrand writes:
Linus notes [1] that the introduction of new code that uses VM_BUG_ON()
is just as bad as BUG_ON(), because it will crash the kernel on
distributions that enable CONFIG_DEBUG_VM (like Fedora):
VM_BUG_ON() has the exact same s
On Wed, Sep 21, 2022 at 2:34 AM Sean Christopherson wrote:
>
> From: Paolo Bonzini
>
> KVM_REQ_UNHALT is a weird request that simply reports the value of
> kvm_arch_vcpu_runnable() on exit from kvm_vcpu_halt(). Only
> MIPS and x86 are looking at it, the others just clear it. Check
> the state o
On Wednesday 31 August 2022 00:55:00 Pali Rohár wrote:
> Partition partition@2 contains generic kernel image and it does not
> have to be used only for rescue purposes. Partition partition@1c
> contains bootable rescue system and partition partition@34 contains
> factory image/data for
On Saturday 27 August 2022 15:15:38 Pali Rohár wrote:
> DSA cpu port node has to be marked with "cpu" label.
> So fix it for both cpu port nodes.
>
> Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x
> routers")
> Signed-off-by: Pali Rohár
Ping?
> ---
> arch/powerpc/boot/
> On 22-Sep-2022, at 5:11 AM, Mike Kravetz wrote:
>
> On 09/21/22 12:00, Sachin Sant wrote:
>> While running transparent huge page tests [1] against 6.0.0-rc6-next-20220920
>> following crash is seen on IBM Power server.
>
> Thanks Sachin,
>
> Naoya reported this, with my analysis here:
> ht
Haren Myneni writes:
> When the migration is initiated, the hypervisor changes VAS
> mappings as part of pre-migration event. Then the OS gets the
> migration event which closes all VAS windows before the migration
> starts. NX generates continuous faults until windows are closed
> and the user sp
Open Firmware provides basic display output via the 'display' node.
DT platform code already provides a device that represents the node's
framebuffer. Add a DRM driver for the device. The display mode and
color format is pre-initialized by the system's firmware. Runtime
modesetting via DRM is not p
PowerPC's Open Firmware offers a simple display buffer for graphics
output. Add ofdrm, a DRM driver for the device. As with the existing
simpledrm driver, the graphics hardware is pre-initialized by the
firmware. The driver only provides blitting, no actual DRM modesetting
is possible.
For version
Add a per-model device-function structure in preparation of adding
color-management support. Detection of the individual models has been
taken from fbdev's offb.
v3:
* define constants for PCI ids (Javier)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drive
Support the CRTC's color-management property and implement each model's
palette support.
The OF hardware has different methods of setting the palette. The
respective code has been taken from fbdev's offb and refactored into
per-model device functions. The device functions integrate this
functional
Add a dedicated CRTC state to ofdrm to later store information for
palette updates.
v3:
* rework CRTC state helpers (Javier)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/tiny/ofdrm.c | 59 ++--
1 file changed
Le 22/09/2022 à 10:29, Haren Myneni a écrit :
>
> DSI error will be generated when the paste operation is issued on
> the suspended NX window due to NX state changes. The hypervisor
> expects the partition to ignore this error during page pault
> handling. To differentiate DSI caused by an actua
DSI error will be generated when the paste operation is issued on
the suspended NX window due to NX state changes. The hypervisor
expects the partition to ignore this error during page pault
handling. To differentiate DSI caused by an actual HW configuration
or by the NX window, a new “ibm,pi-fea
irq_default_primary_handler() can be used only with IRQF_ONESHOT
flag, but the flag disables IRQ before executing the thread handler
and enables it after the interrupt is handled. But this IRQ disable
sets the VAS IRQ OFF state in the hypervisor. In case if NX faults
during this window, the hyper
When the migration is initiated, the hypervisor changes VAS
mappings as part of pre-migration event. Then the OS gets the
migration event which closes all VAS windows before the migration
starts. NX generates continuous faults until windows are closed
and the user space can not differentiate thes
Hi
Am 22.09.22 um 09:28 schrieb Maxime Ripard:
On Thu, Sep 22, 2022 at 08:42:23AM +0200, Thomas Zimmermann wrote:
Hi
Am 21.09.22 um 18:48 schrieb Geert Uytterhoeven:
Hi Thomas,
On Wed, Sep 21, 2022 at 2:55 PM Thomas Zimmermann wrote:
Am 05.08.22 um 02:19 schrieb Benjamin Herrenschmidt:
On
On Thu, Sep 22, 2022 at 08:42:23AM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 21.09.22 um 18:48 schrieb Geert Uytterhoeven:
> > Hi Thomas,
> >
> > On Wed, Sep 21, 2022 at 2:55 PM Thomas Zimmermann
> > wrote:
> > > Am 05.08.22 um 02:19 schrieb Benjamin Herrenschmidt:
> > > > On Wed, 2022-07-20
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