On Fri Sep 23, 2022 at 3:34 PM AEST, Christophe Leroy wrote: > > > Le 23/09/2022 à 05:25, Nicholas Piggin a écrit : > > Using a 32-bit constant for this marker allows it to be loaded with > > two ALU instructions, like 32-bit. This avoids a TOC entry and a > > TOC load that depends on the r2 value that has just been loaded from > > the PACA. > > > > This changes the value for 32-bit as well, so both have the same > > value in the low 4 bytes and 64-bit has 0xffffffff in the top bytes. > > > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> > > --- > > arch/powerpc/include/asm/ptrace.h | 5 +++-- > > arch/powerpc/kernel/entry_32.S | 6 +++--- > > arch/powerpc/kernel/exceptions-64e.S | 8 +------- > > arch/powerpc/kernel/exceptions-64s.S | 2 +- > > arch/powerpc/kernel/head_64.S | 7 ------- > > arch/powerpc/kernel/interrupt_64.S | 6 +++--- > > 6 files changed, 11 insertions(+), 23 deletions(-) > > > > diff --git a/arch/powerpc/include/asm/ptrace.h > > b/arch/powerpc/include/asm/ptrace.h > > index a03403695cd4..49d720bb888b 100644 > > --- a/arch/powerpc/include/asm/ptrace.h > > +++ b/arch/powerpc/include/asm/ptrace.h > > @@ -99,6 +99,9 @@ struct pt_regs > > > > #define STACK_FRAME_WITH_PT_REGS (STACK_FRAME_OVERHEAD + sizeof(struct > > pt_regs)) > > > > +/* 0xffffffff8d9a988d on 64-bit */ > > +#define STACK_FRAME_REGS_MARKER ASM_CONST(-0x72656773) /* 0x8d9a988d */ > > + > > 0x72656773 is "REGS" in ASCII (Big Endian) and you can spot it > immediatly in a memory dump. > 0x7265677368657265 is "REGSHERE". > > 0x8d9a988d is not printable. > > Don't know if it can be a problem.
Oh. I guess it doesn't really matter if it has zeroes or f in the top 4 bytes so I should keep it "REGS" then. I was thinking about later moving it into the reserved word next to the CR word on 64-bit so we would only have 4 bytes for it anyway. Thanks, Nick
