Em Mon, Sep 06, 2021 at 08:13:13AM +0530, Athira Rajeev escreveu:
>
>
> > On 02-Sep-2021, at 1:04 PM, kajoljain wrote:
> >
> >
> >
> > On 6/20/21 8:15 PM, Athira Rajeev wrote:
> >> Patch set adds PMU registers namely Sampled Instruction Address Register
> >> (SIAR) and Sampled Data Address Re
Christophe Leroy writes:
> On 9/8/21 6:17 PM, Eric W. Biederman wrote:
>> Christophe Leroy writes:
>>
>>> Le 02/09/2021 à 20:43, Eric W. Biederman a écrit :
Christophe Leroy writes:
> In the same spirit as commit fb05121fd6a2 ("signal: Add
> unsafe_get_compat_sigset()"), imple
Le 11/09/2021 à 01:40, Nick Desaulniers a écrit :
Now that GCC 5.1 is the minimum supported version, we can drop this
workaround for older versions of GCC. This adversely affected clang,
too.
Why do you say that GCC 5.1 is the minimum supported ?
As far as I can see, the minimum supported i
On Fri, Sep 10, 2021 at 07:48:18AM +0200, Cédric Le Goater wrote:
On 9/10/21 2:14 AM, Sasha Levin wrote:
From: Cédric Le Goater
[ Upstream commit 1753081f2d445f9157550692fcc4221cd3ff0958 ]
PCI MSIs now live in an MSI domain but the underlying calls, which
will EOI the interrupt in real mode,
Ritesh Harjani writes:
> While debugging an issue, we wanted to check whether the arch specific
> kernel memmove implementation is correct. This selftest could help test that.
>
> Suggested-by: Aneesh Kumar K.V
> Suggested-by: Vaibhav Jain
> Signed-off-by: Ritesh Harjani
> ---
> tools/testing/
Niklas Schnelle writes:
> On powerpc, pci_dev_is_added() is called as part of SR-IOV fixups
> that are done under pcibios_add_device() which in turn is only called in
> pci_device_add() whih is called when a PCI device is scanned.
Thanks for cleaning this up for us.
> Now pci_dev_assign_added()
Nathan Chancellor writes:
> On 9/10/2021 4:40 PM, Nick Desaulniers wrote:
>> Now that GCC 5.1 is the minimum supported version, we can drop this
>> workaround for older versions of GCC. This adversely affected clang,
>> too.
>>
>> Cc: Michael Ellerman
>> Cc: Benjamin Herrenschmidt
>> Cc: Paul M
On Wed, Sep 08, 2021 at 05:58:34PM -0500, Tom Lendacky wrote:
> diff --git a/arch/x86/kernel/cc_platform.c b/arch/x86/kernel/cc_platform.c
> new file mode 100644
> index ..3c9bacd3c3f3
> --- /dev/null
> +++ b/arch/x86/kernel/cc_platform.c
> @@ -0,0 +1,21 @@
> +// SPDX-License-Identifier
On Sat, Sep 11, 2021 at 12:39 PM Christopher M. Riedl
wrote:
>
> When code patching a STRICT_KERNEL_RWX kernel the page containing the
> address to be patched is temporarily mapped as writeable. Currently, a
> per-cpu vmalloc patch area is used for this purpose. While the patch
> area is per-cpu,
On Sat, Sep 11, 2021 at 12:35 PM Christopher M. Riedl
wrote:
>
> x86 supports the notion of a temporary mm which restricts access to
> temporary PTEs to a single CPU. A temporary mm is useful for situations
> where a CPU needs to perform sensitive operations (such as patching a
> STRICT_KERNEL_RWX
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