Data Cache Block Invalidate (dcbi) instruction was implemented back in PowerPC
architecture version 2.03. It is obsolete and attempt to use of this illegal
instruction results in a hypervisor emulation assistance interrupt. So, ifdef
it out the option `i` in xmon for 64bit Book3S.
0:mon> fi
cpu 0x
The ahci driver doesn't support error recovery, and if your root
filesystem is attached to it the eeh-basic.sh test will likely kill
your machine.
So skip any device we see using the ahci driver.
Signed-off-by: Michael Ellerman
---
tools/testing/selftests/powerpc/eeh/eeh-basic.sh | 5 +
1 f
On 3/18/20 12:27 PM, Ravi Bangoria wrote:
On 3/17/20 4:02 PM, Christophe Leroy wrote:
Le 09/03/2020 à 09:57, Ravi Bangoria a écrit :
Instead of disabling only one watchpooint, get num of available
watchpoints dynamically and disable all of them.
Signed-off-by: Ravi Bangoria
---
arch/
anges:
Reviewed-by: Paul E. McKenney
> ---
> Documentation/locking/locktypes.rst | 16
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> --- linux-next-20200325.orig/Documentation/locking/locktypes.rst
> +++ linux-next-20200325/Documentation/locking/locktypes
On 03/24/2020 10:52 AM, Anshuman Khandual wrote:
> This series adds more arch page table helper tests. The new tests here are
> either related to core memory functions and advanced arch pgtable helpers.
> This also creates a documentation file enlisting all expected semantics as
> suggested by M
On 03/24/2020 06:59 PM, Zi Yan wrote:
> On 24 Mar 2020, at 1:22, Anshuman Khandual wrote:
>
>> This adds new tests validating arch page table helpers for these following
>> core memory features. These tests create and test specific mapping types at
>> various page table levels.
>>
>> 1. SPECIAL
On 25/03/2020 19:37, Christoph Hellwig wrote:
> On Wed, Mar 25, 2020 at 03:51:36PM +1100, Alexey Kardashevskiy wrote:
This is for persistent memory which you can DMA to/from but yet it does
not appear in the system as a normal memory and therefore requires
special handling anyway
On Wed, 25 Mar 2020 08:49:14 +0530 "Aneesh Kumar K.V"
wrote:
> Fixes the below crash
(cc's added)
> BUG: Kernel NULL pointer dereference on read at 0x
> Faulting instruction address: 0xc0c3447c
> Oops: Kernel access of bad area, sig: 11 [#1]
> LE PAGE_SIZE=64K MMU=Hash SMP NR_C
Joakim Tjernlund writes:
> On Mon, 2020-03-23 at 15:45 +0100, Christophe Leroy wrote:
>> Le 23/03/2020 à 15:43, Christophe Leroy a écrit :
>> > Le 23/03/2020 à 15:17, Joakim Tjernlund a écrit :
>> > > In __die(), see below, there is this call to notify_send() with
>> > > SIGSEGV hardcoded, this se
On Wed, 2020-03-25 at 17:02 +, David Laight wrote:
> CAUTION: This email originated from outside of the organization. Do
> not click links or open attachments unless you recognize the sender
> and know the content is safe.
>
>
> From: Joakim Tjernlund
> > Sent: 23 March 2020 15:45
> ...
> > >
From: Joakim Tjernlund
> Sent: 23 March 2020 15:45
...
> > > I tried to follow that chain thinking it would end up sending a signal to
> > > user space but I cannot
> see
> > > that happens. Seems to be related to debugging.
> > >
> > > In short, I cannot see any signal being delivered to user spa
Cc: Thomas Gleixner
Cc: Sebastian Siewior
Cc: Joel Fernandes
Cc: Ingo Molnar
Cc: Peter Zijlstra
---
Documentation/locking/locktypes.rst | 16
1 file changed, 8 insertions(+), 8 deletions(-)
--- linux-next-20200325.orig/Documentation/locking/locktypes.rst
+++ linux-ne
On 2020-03-25 09:39:19 [-0700], Paul E. McKenney wrote:
> > > --- a/Documentation/locking/locktypes.rst
> > > +++ b/Documentation/locking/locktypes.rst
> > …
> > > +rw_semaphore
> > > +
> > > +
> > > +rw_semaphore is a multiple readers and single writer lock mechanism.
> > > +
> > > +On
On Wed, Mar 25, 2020 at 05:02:12PM +0100, Sebastian Siewior wrote:
> On 2020-03-25 13:27:49 [+0100], Thomas Gleixner wrote:
> > The documentation of rw_semaphores is wrong as it claims that the non-owner
> > reader release is not supported by RT. That's just history biased memory
> > distortion.
>
On 2020-03-25 13:27:49 [+0100], Thomas Gleixner wrote:
> The documentation of rw_semaphores is wrong as it claims that the non-owner
> reader release is not supported by RT. That's just history biased memory
> distortion.
>
> Split the 'Owner semantics' section up and add separate sections for
> s
Michael Ellerman writes:
> Fabiano Rosas writes:
>
>> QEMU can now print the ibm,os-term message[1], so let's include it in
>> the RTAS call. E.g.:
>>
>> qemu-system-ppc64: OS terminated: Switch to secure mode failed.
>>
>> 1- https://git.qemu.org/?p=qemu.git;a=commitdiff;h=a4c3791ae0
>>
>> Si
On Tue, Mar 24, 2020 at 05:12:11PM -0300, Fabiano Rosas wrote:
> QEMU can now print the ibm,os-term message[1], so let's include it in
> the RTAS call. E.g.:
>
> qemu-system-ppc64: OS terminated: Switch to secure mode failed.
>
> 1- https://git.qemu.org/?p=qemu.git;a=commitdiff;h=a4c3791ae0
>
The documentation of rw_semaphores is wrong as it claims that the non-owner
reader release is not supported by RT. That's just history biased memory
distortion.
Split the 'Owner semantics' section up and add separate sections for
semaphore and rw_semaphore to reflect reality.
Aside of that the fo
On Wed, 25 Mar 2020 21:06:22 +1100
Michael Ellerman wrote:
> Fabiano Rosas writes:
>
> > QEMU can now print the ibm,os-term message[1], so let's include it in
> > the RTAS call. E.g.:
> >
> > qemu-system-ppc64: OS terminated: Switch to secure mode failed.
> >
> > 1- https://git.qemu.org/?p=qe
Haren Myneni writes:
> On Mon, 2020-03-23 at 22:32 +1100, Michael Ellerman wrote:
>> Nicholas Piggin writes:
>> > Haren Myneni's on March 19, 2020 4:13 pm:
>> >>
>> >> Kernel sets fault address and status in CRB for NX page fault on user
>> >> space address after processing page fault. User spac
Fangrui Song writes:
> .globl sets the symbol binding to STB_GLOBAL while .weak sets the
> binding to STB_WEAK. They should not be used together. It is accidetal
> rather then intentional that GNU as let .weak override .globl while
> clang integrated assembler let the last win.
> Fixes: cd197ffcf
Before:
WARNING: CPU: 0 PID: 494 at arch/powerpc/kernel/irq.c:343
CPU: 0 PID: 494 Comm: a Tainted: GW
NIP: c001ed2c LR: c0d13190 CTR: c003f910
REGS: c001fffd3870 TRAP: 0700 Tainted: GW
MSR: 80021003 CR: 28000488 XER:
C
On Tuesday, March 24, 2020 7:34:56 AM CET Michael Ellerman wrote:
> "Rafael J. Wysocki" writes:
> > On Monday, March 16, 2020 2:57:43 PM CET Pratik Rajesh Sampat wrote:
> >> The patch avoids allocating cpufreq_policy on stack hence fixing frame
> >> size overflow in 'powernv_cpufreq_work_fn'
> >>
Similarly to the previous patch, do not trace system reset. This code
is used when there is a crash or hang, and tracing disturbs the system
more and has been known to crash in the crash handling path.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/traps.c | 5 +
1 file changed, 5 in
Rather than notrace annotations throughout a significant part of the
machine check code across kernel/ pseries/ and powernv/ which can
easily be broken and is infrequently tested, use paca->ftrace_enabled
to blanket-disable tracing of the real-mode non-maskable handler.
Signed-off-by: Nicholas Pig
machine_check_early is taken as an NMI, so nmi_enter is used there.
machine_check_exception is no longer taken as an NMI (it's invoked
via irq_work in the case a machine check hits in kernel mode), so
remove the nmi_enter from that case.
In NMI context, hash faults don't try to refill the hash tab
With the previous patch, machine checks can use rtas_call_unlocked
which avoids the rtas spinlock which would deadlock if a machine
check hits while making an rtas call.
This also avoids the complex rtas error logging which has more rtas calls
and includes kmalloc (which can return memory beyond R
This allows rtas_args to be put on the machine check stack, which
avoids a lot of complications with re-entrancy deadlocks.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/setup_64.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/se
PAPR does not specify that fwnmi sreset should be interlocked, and
PowerVM (and therefore now QEMU) do not require it.
These "ibm,nmi-interlock" calls are ignored by firmware, but there
is a possibility that the sreset could have interrupted a machine
check and release the machine check's interloc
If there is some error with the fwnmi save area, r3 has already been
modified which doesn't help with debugging.
Only update r3 when to restore the saved value.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/pseries/ras.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
This was discovered developing qemu fwnmi sreset support. This
off-by-one bug means the last 16 bytes of the rtas area can not
be used for a 16 byte save area.
It's not a serious bug, and QEMU implementation has to retain a
workaround for old kernels, but it's good to tighten it.
Signed-off-by: N
In the interest of reducing code and possible failures in the
machine check and system reset paths, grab the "ibm,nmi-interlock"
token at init time.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/firmware.h| 1 +
arch/powerpc/platforms/pseries/ras.c | 2 +-
arch/powerpc/plat
pseries fwnmi machine check code pops the soft-irq checks in rtas_call
(after the previous patch to remove rtas_token from this call path).
Rather than play whack a mole with these and forever having fragile
code, it seems better to have the early machine check handler perform
the same kind of reco
A spare interrupt stack slot is needed to save irq state when
reconciling NMIs (sreset and decrementer soft-nmi). _DAR is used
for this, but we want to reconcile machine checks as well, which
do use _DAR. Switch to using RESULT instead, as it's used by
system calls.
Signed-off-by: Nicholas Piggin
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index 6a936c9199d6..67cbcb2d0c7f 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arc
There's a bunch of problems we hit bringing up fwnmi sreset and testing
with mce injection on QEMU. Mostly pseries issues.
This series of fixes applies on top of next-test, the machine
check reconcile patch won't apply cleanly to previous kernels but
it might want to be backported. We can do that
afzal mohammed writes:
> Hi Michael Ellerman,
> On Thu, Mar 12, 2020 at 12:12:55PM +0530, afzal mohammed wrote:
>> request_irq() is preferred over setup_irq(). Invocations of setup_irq()
>> occur after memory allocators are ready.
>>
>> Per tglx[1], setup_irq() existed in olden days when allocato
Fabiano Rosas writes:
> QEMU can now print the ibm,os-term message[1], so let's include it in
> the RTAS call. E.g.:
>
> qemu-system-ppc64: OS terminated: Switch to secure mode failed.
>
> 1- https://git.qemu.org/?p=qemu.git;a=commitdiff;h=a4c3791ae0
>
> Signed-off-by: Fabiano Rosas
> ---
> a
On 25.03.20 03:58, Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
wrote:
[...]
> Hi Mike,
>
> Inspired by Dave's opinion, it seems the x86-specific hugepages_supported
> should
> also need to use cpu_feature_enabled instead.
>
> Also, I wonder if the hugepages_supported is corre
This fixes 4 issues caught by TM selftests. First was a tm-syscall bug
that hit due to tabort_syscall being called after interrupts were reconciled
(in a subsequent patch), which led to interrupts being enabled before
tabort_syscall was called. Rather than going through an un-reconciling
interrupts
This fixes the interrupt-return part of the MSR_VSX restore bug caught
by tm-unavailable selftest.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/syscall_64.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/kernel/syscall_64.c b
On Wed, Mar 25, 2020 at 05:22:31AM +, Joel Stanley wrote:
> On Wed, 25 Mar 2020 at 05:19, Fangrui Song wrote:
> >
> > .globl sets the symbol binding to STB_GLOBAL while .weak sets the
> > binding to STB_WEAK. They should not be used together. It is accidetal
> > rather then intentional that GN
Thomas Gleixner writes:
> From: Thomas Gleixner
>
> ep_io() uses a completion on stack and open codes the waiting with:
>
> wait_event_interruptible (done.wait, done.done);
> and
> wait_event (done.wait, done.done);
>
> This waits in non-exclusive mode for complete(), but there is no reason
On Wed, Mar 25, 2020 at 03:51:36PM +1100, Alexey Kardashevskiy wrote:
> >> This is for persistent memory which you can DMA to/from but yet it does
> >> not appear in the system as a normal memory and therefore requires
> >> special handling anyway (O_DIRECT or DAX, I do not know the exact
> >> mech
On 03/25/20 at 01:42pm, Aneesh Kumar K.V wrote:
> On 3/25/20 1:07 PM, Baoquan He wrote:
> > On 03/25/20 at 03:06pm, Baoquan He wrote:
> > > On 03/25/20 at 08:49am, Aneesh Kumar K.V wrote:
> >
> > > > mm/sparse.c | 2 ++
> > > > 1 file changed, 2 insertions(+)
> > > >
> > > > diff --git a/mm/sp
On 3/25/20 1:07 PM, Baoquan He wrote:
On 03/25/20 at 03:06pm, Baoquan He wrote:
On 03/25/20 at 08:49am, Aneesh Kumar K.V wrote:
mm/sparse.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/mm/sparse.c b/mm/sparse.c
index aadb7298dcef..3012d1f3771a 100644
--- a/mm/sparse.c
+++ b/mm/spa
On 03/25/20 at 03:06pm, Baoquan He wrote:
> On 03/25/20 at 08:49am, Aneesh Kumar K.V wrote:
> > mm/sparse.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/mm/sparse.c b/mm/sparse.c
> > index aadb7298dcef..3012d1f3771a 100644
> > --- a/mm/sparse.c
> > +++ b/mm/sparse.c
> > @@ -7
On 03/25/20 at 08:49am, Aneesh Kumar K.V wrote:
> Fixes the below crash
>
> BUG: Kernel NULL pointer dereference on read at 0x
> Faulting instruction address: 0xc0c3447c
> Oops: Kernel access of bad area, sig: 11 [#1]
> LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries
> CPU:
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