On Wed, Feb 05, 2020 at 07:25:59AM +0100, Christophe Leroy wrote:
>
>
> Le 05/02/2020 à 01:50, Fangrui Song a écrit :
> > A PC-relative relocation (R_PPC_REL16_LO in this case) referencing a
> > preemptible symbol in a -shared link is not allowed. GNU ld's powerpc
> > port is permissive and allo
Le 06/02/2020 à 21:31, Guenter Roeck a écrit :
On Sat, Dec 21, 2019 at 08:32:38AM +, Christophe Leroy wrote:
A few changes to retrieve DAR and DSISR from struct regs
instead of retrieving them directly, as they may have
changed due to a TLB miss.
Also modifies hash_page() and friends to
> /*
> + * Process CRBs that we receive on the fault window.
> + */
> +irqreturn_t vas_fault_handler(int irq, void *data)
> +{
> + struct vas_instance *vinst = data;
> + struct coprocessor_request_block buf, *crb;
> + struct vas_window *window;
> + void *fifo;
> +
> + /*
> +
On Wed, 2020-01-22 at 00:17 -0800, Haren Myneni wrote:
> For each fault CRB, update fault address in CRB (fault_storage_addr)
> and translation error status in CSB so that user space can touch the
> fault address and resend the request. If the user space passed invalid
> CSB address send signal to
Hi Leonardo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on asm-generic/master paulus-powerpc/kvm-ppc-next
linus/master v5.5 next-20200207]
[cannot apply to kvm-ppc/kvm-ppc-next]
[if your patch is applied to the wrong git tree
Recovering a dead PHB can currently cause a deadlock as the PCI
rescan/remove lock is taken twice.
This is caused as part of an existing bug in
eeh_handle_special_event(). The pe is processed while traversing the
PHBs even though the pe is unrelated to the loop. This causes the pe
to be, incorrect
On Fri, Feb 07, 2020 at 01:39:14PM +1100, Sam Bobroff wrote:
> On Thu, Feb 06, 2020 at 03:23:03PM +1100, Alexey Kardashevskiy wrote:
> >
> >
> > On 06/02/2020 14:17, Sam Bobroff wrote:
> > > Older versions of skiboot only provide a single value in the device
> > > tree property "ibm,mmio-a
On Thu, 2020-02-06 at 06:46 +0100, Christophe Leroy wrote:
>
> Le 06/02/2020 à 04:08, Leonardo Bras a écrit :
> > On powerpc, we need to do some lockless pagetable walks from functions
> > that already have disabled interrupts, specially from real mode with
> > MSR[EE=0].
> >
> > In these context
On Thu, 2020-02-06 at 06:48 +0100, Christophe Leroy wrote:
> > --- a/arch/powerpc/kernel/mce_power.c
> > +++ b/arch/powerpc/kernel/mce_power.c
> > @@ -29,7 +29,7 @@ unsigned long addr_to_pfn(struct pt_regs *regs, unsigned
> > long addr)
> > {
> > pte_t *ptep;
> > unsigned int shift;
> >
On Fri, Feb 7, 2020 at 2:35 PM Oliver O'Halloran wrote:
>
> On Fri, Feb 7, 2020 at 1:24 PM Sam Bobroff wrote:
> >
> > On Mon, Feb 03, 2020 at 07:35:20PM +1100, Oliver O'Halloran wrote:
> > > The eeh_ops->probe() function is called from two different contexts:
> > >
> > > 1. On pseries, where set
On Thu, 2020-02-06 at 07:06 +0100, Christophe Leroy wrote:
> > - /* Get PTE and page size from page tables */
> > + /* Get PTE and page size from page tables :
> > +* Called in from DataAccess interrupt (data_access_common: 0x300),
> > +* interrupts are disabled here.
> > +*/
>
> C
On Fri, Feb 7, 2020 at 1:24 PM Sam Bobroff wrote:
>
> On Mon, Feb 03, 2020 at 07:35:20PM +1100, Oliver O'Halloran wrote:
> > The eeh_ops->probe() function is called from two different contexts:
> >
> > 1. On pseries, where set set EEH_PROBE_MODE_DEVTREE, it's called in
> "set set" -> "we set"
> >
On Thu, Feb 6, 2020 at 3:13 PM Sam Bobroff wrote:
>
> On Mon, Feb 03, 2020 at 07:35:16PM +1100, Oliver O'Halloran wrote:
> > Move creating the EEH specific sysfs files into eeh_add_device_late()
> > rather than being open-coded all over the place. Calling the function is
> > generally done immedia
Hello Christophe,
On Thu, 2020-02-06 at 07:18 +0100, Christophe Leroy wrote:
>
> I don't really like unbalanced begin/end.
>
> Something like the following would be cleaner:
>
>
> begin_lockless_pgtbl_walk()
> ptep = find()
> if (ptep) {
> pte = READ_ONCE()
> if (pte_present(pte))
On Thu, Feb 06, 2020 at 03:23:03PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 06/02/2020 14:17, Sam Bobroff wrote:
> > Older versions of skiboot only provide a single value in the device
> > tree property "ibm,mmio-atsd", even when multiple Address Translation
> > Shoot Down (ATSD) registers ar
On Mon, Feb 03, 2020 at 07:35:21PM +1100, Oliver O'Halloran wrote:
> With the EEH early probe now being pseries specific there's no need for
> eeh_ops->probe() to take a pci_dn. Instead, we can make it take a pci_dev
> and use the probe function to map a pci_dev to an eeh_dev. This allows
> the pla
On Mon, Feb 03, 2020 at 07:35:20PM +1100, Oliver O'Halloran wrote:
> The eeh_ops->probe() function is called from two different contexts:
>
> 1. On pseries, where set set EEH_PROBE_MODE_DEVTREE, it's called in
"set set" -> "we set"
>eeh_add_device_early() which is supposed to run before we cre
Hello Christophe, thanks for the feedback!
On Thu, 2020-02-06 at 06:54 +0100, Christophe Leroy wrote:
> > A memory barrier was also added just to make sure there is no speculative
> > read outside the interrupt disabled area. Other than that, it is not
> > supposed to have any change of behavior f
Hello Christophe, thanks for the feedback!
On Thu, 2020-02-06 at 07:23 +0100, Christophe Leroy wrote:
> > Due to not locking nor using atomic variables, the impact on the
> > lockless pagetable walk is intended to be minimum.
>
> atomic variables have a lot less impact than preempt_enable/disable
Hi Leonardo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on paulus-powerpc/kvm-ppc-next linus/master v5.5
next-20200206]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW
On Thu, 2020-02-06 at 19:13 -0300, Gustavo Luiz Duarte wrote:
>
> On 2/5/20 1:58 AM, Michael Neuling wrote:
> > Other than the minor things below that I think you need, the patch good with
> > me.
> >
> > Acked-by: Michael Neuling
> >
> > > Subject: Re: [PATCH v2 1/3] powerpc/tm: Clear the curr
On Sat, Jan 11, 2020 at 2:13 AM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> > This adds emulation support for the following prefixed integer
> > load/stores:
> > * Prefixed Load Byte and Zero (plbz)
> > * Prefixed Load Halfword and Zero (plhz)
> >
On Fri, Jan 10, 2020 at 9:38 PM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:29PM +1100, Jordan Niethe wrote:
> > This adds emulation support for the following prefixed integer
> > load/stores:
> > * Prefixed Load Byte and Zero (plbz)
> > * Prefixed Load Halfword and Zero (plhz)
> >
On Mon, Jan 13, 2020 at 5:18 PM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:28PM +1100, Jordan Niethe wrote:
> > Currently all instructions are a single word long. A future ISA version
> > will include prefixed instructions which have a double word length. The
> > functions used for ana
On Mon, Jan 13, 2020 at 10:30 PM Balamuruhan S wrote:
>
> On Tue, Nov 26, 2019 at 04:21:38PM +1100, Jordan Niethe wrote:
> > Uprobes can execute instructions out of line. Increase the size of the
> > buffer used for this so that this works for prefixed instructions. Take
> > into account the leng
On 12/12/2019 12:01 PM, Youri Querry wrote:
This patch set consists of:
- We added an interface to enqueue several packets at a time and
improve performance.
- Make the algorithm decisions once at initialization and use
function pointers to improve performance.
- Replaced the QMAN enqueue a
On 2/5/20 2:27 AM, Michael Ellerman wrote:
Gustavo Luiz Duarte writes:
This test triggers a TM Bad Thing by raising a signal in transactional state
and forcing a pagefault to happen in kernelspace when the kernel signal
handling code first touches the user signal stack.
This is inspired by
On 2/5/20 1:58 AM, Michael Neuling wrote:
Other than the minor things below that I think you need, the patch good with me.
Acked-by: Michael Neuling
Subject: Re: [PATCH v2 1/3] powerpc/tm: Clear the current thread's MSR[TS]
after treclaim
The subject should mention "signals".
How abou
> -Original Message-
> From: Roy Pledge (OSS)
> Sent: Thursday, February 6, 2020 2:40 PM
> To: Youri Querry ; Roy Pledge
> ; Leo Li ; linux-
> ker...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org; Ioana Ciornei ;
> Alexandru Marginean
> Subject:
On Sat, Dec 21, 2019 at 08:32:38AM +, Christophe Leroy wrote:
> A few changes to retrieve DAR and DSISR from struct regs
> instead of retrieving them directly, as they may have
> changed due to a TLB miss.
>
> Also modifies hash_page() and friends to work with virtual
> data addresses instead
On 02/06/2020 04:40 AM, kbuild test robot wrote:
> Hi Anshuman,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on powerpc/next]
> [also build test ERROR on s390/features linus/master arc/for-next v5.5]
> [cannot apply to mmotm/master tip/x86/core arm64/for-nex
On 8xx, slices are used because hugepages (512k or 8M) and small
pages (4k or 16k) cannot share the same PGD entry. However, as 8M
entirely covers two PGD entries (One PGD entry covers 4M), there
will implicitely be no conflict between 8M pages and any other size.
So 8M is also compatible with the
On 8xx, slices are used because hugepages (512k or 8M) and small
pages (4k or 16k) cannot share the same PGD entry. However, as 8M
entirely covers two PGD entries (One PGD entry covers 4M), there
will implicitely be no conflict between 8M pages and any other size.
So 8M is compatible with the basep
On 06.02.2020 21:30, Stephen Smalley wrote:
> On 2/6/20 1:26 PM, Alexey Budankov wrote:
>>
>> On 06.02.2020 21:23, Stephen Smalley wrote:
>>> On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observabili
On 2/6/20 1:26 PM, Alexey Budankov wrote:
On 06.02.2020 21:23, Stephen Smalley wrote:
On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observability operations so that CAP_PERFMON would assist
CAP_SYS_ADMIN capabi
On 06.02.2020 21:23, Stephen Smalley wrote:
> On 2/5/20 12:30 PM, Alexey Budankov wrote:
>>
>> Introduce CAP_PERFMON capability designed to secure system performance
>> monitoring and observability operations so that CAP_PERFMON would assist
>> CAP_SYS_ADMIN capability in its governing role for p
On 2/5/20 12:30 PM, Alexey Budankov wrote:
Introduce CAP_PERFMON capability designed to secure system performance
monitoring and observability operations so that CAP_PERFMON would assist
CAP_SYS_ADMIN capability in its governing role for performance monitoring
and observability subsystems.
CAP_
On 22.01.2020 17:25, Alexey Budankov wrote:
>
> On 22.01.2020 17:07, Stephen Smalley wrote:
>> On 1/22/20 5:45 AM, Alexey Budankov wrote:
>>>
>>> On 21.01.2020 21:27, Alexey Budankov wrote:
On 21.01.2020 20:55, Alexei Starovoitov wrote:
> On Tue, Jan 21, 2020 at 9:31 AM Alexey Buda
fuloong2e_defconfig
mips malta_kvm_defconfig
pariscallyesonfig
parisc b180_defconfig
pariscc3000_defconfig
x86_64 randconfig-a001-20200206
x86_64 r
The patch
ASoC: fsl_sai: Fix exiting path on probing failure
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.6
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
On 06 February 2020 at 05:35 am, Michael Ellerman wrote:
Christian Zigotzky writes:
Kernel 5.5 PowerPC is also affected.
I don't know what you mean by that. What sha are you talking about?
I have a system with avahi running and everything's fine.
# grep use- /etc/avahi/avahi-daemon.conf
Commit 55c8fc3f4930 ("powerpc/8xx: reintroduce 16K pages with HW
assistance") redefined pte_t as a struct of 4 pte_basic_t, because
in 16K pages mode there are four identical entries in the page table.
But hugepd entries for 8k pages require only one entrie of size
pte_basic_t. So there is no point
Commit 55c8fc3f4930 ("powerpc/8xx: reintroduce 16K pages with HW
assistance") redefined pte_t as a struct of 4 pte_basic_t, because
in 16K pages mode there are four identical entries in the
page table. But the size of hugepage tables is calculated based
of the size of (void *). Therefore, we end up
On Wed, Feb 5, 2020 at 7:26 PM Michael Ellerman wrote:
>
> "H.J. Lu" writes:
> > On Tue, Feb 4, 2020 at 3:37 PM kbuild test robot wrote:
> >>
> >> tree: https://github.com/yyu168/linux_cet.git cet
> >> head: bba707cc4715c1036b6561ab38b16747f9c49cfa
> >> commit: 71bb971dd76eeacd351690f28864ad
86_64 randconfig-a001-20200206
x86_64 randconfig-a002-20200206
x86_64 randconfig-a003-20200206
i386 randconfig-a001-20200206
i386 randconfig-a002-20200206
i386 randconfig-a003-20200206
i386 randconfig
On 1/21/20 3:47 PM, Anju T Sudhakar wrote:
IMC(In-memory Collection Counters) does performance monitoring in
two different modes, i.e accumulation mode(core-imc and thread-imc events),
and trace mode(trace-imc events). A cpu thread can either be in
accumulation-mode or trace-mode at a time and
On 1/21/20 3:47 PM, Anju T Sudhakar wrote:
commit <249fad734a25> ""powerpc/perf: Disable trace_imc pmu"
disables IMC(In-Memory Collection) trace-mode in kernel, since frequent
mode switching between accumulation mode and trace mode via the spr LDBAR
in the hardware can trigger a checkstop(syst
Commit fa7b9a805c79 ("tools/selftest/vm: allow choosing mem size and
page size in map_hugetlb") added the possibility to change the size
of memory mapped for the test, but left the read and write test using
the default value. This is unnoticed when mapping a length greater
than the default one, but
Commit 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets")
added generation of lkdtm test scripts.
Ignore those generated scripts when performing 'git status'
Fixes: 46d1a0f03d66 ("selftests/lkdtm: Add tests for LKDTM targets")
Signed-off-by: Christophe Leroy
---
.gitignore | 4
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