The NVIDIA V100 SXM2 GPUs are connected to the CPU via PCIe links and
(on POWER9) NVLinks. In addition to that, GPUs themselves have direct
peer-to-peer NVLinks in groups of 2 to 4 GPUs with no buffers/latches
between GPUs.
Because of these interconnected NVLinks, the POWERNV platform puts such
in
Hi Shengjiu,
On Thu, Apr 11, 2019 at 6:06 AM S.j. Wang wrote:
>
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
> independent of each other, so replace fall-through with break.
>
> Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
>
Since it is obvious that you will need t
On 4/11/19 6:38 AM, David Gibson wrote:
> On Thu, Apr 11, 2019 at 01:16:25PM +1000, Paul Mackerras wrote:
>> On Wed, Apr 10, 2019 at 07:04:48PM +0200, Cédric Le Goater wrote:
>>> When a P9 sPAPR VM boots, the CAS negotiation process determines which
>>> interrupt mode to use (XICS legacy or XIVE na
Christophe Leroy writes:
> When no mask is found for the page size, WARN() and return NULL
> instead of BUG()ing.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/mm/slice.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/mm/slice.c b/arch/pow
Christophe Leroy writes:
> No reason to BUG() in add_huge_page_size(). Just WARN and
> reject the add.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/mm/hugetlbpage.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerp
Christophe Leroy writes:
> Don't BUG(), just warn and return NULL.
> If the NULL value is not handled, it will get catched anyway.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/hugetlb.h | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/p
Aneesh Kumar K.V writes:
> Christophe Leroy writes:
>
>> Lets select PPC_MM_SLICES from the subarch config item instead of
>> doing it via defaults declaration in the PPC_MM_SLICES item itself.
>>
>
> Did we miss the book3s 64 default y here?
>
>> Signed-off-by: Christophe Leroy
>> ---
>> arch
Christophe Leroy writes:
> This series converts book3e64 to pte_fragment and refactor
> things that are common among subarches.
>
> Christophe Leroy (15):
> powerpc/mm: drop __bad_pte()
> powerpc/mm: define __pud_free_tlb() at all time on nohash/64
> powerpc/mm: convert Book3E 64 to pte_fra
Christophe Leroy writes:
> Lets select PPC_MM_SLICES from the subarch config item instead of
> doing it via defaults declaration in the PPC_MM_SLICES item itself.
>
Did we miss the book3s 64 default y here?
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/platforms/Kconfig.cputype | 4 +
Paul McKenney attempted to update all email addresses @linux.vnet.ibm.com
to @linux.ibm.com in commit 1dfddcdb95c4
("MAINTAINERS: Update from @linux.vnet.ibm.com to @linux.ibm.com"), but
some still remained.
We update the remaining email addresses in MAINTAINERS, hopefully finally
catching all cas
On Thu, Apr 11, 2019 at 01:16:25PM +1000, Paul Mackerras wrote:
> On Wed, Apr 10, 2019 at 07:04:48PM +0200, Cédric Le Goater wrote:
> > When a P9 sPAPR VM boots, the CAS negotiation process determines which
> > interrupt mode to use (XICS legacy or XIVE native) and invokes a
> > machine reset to ac
On 03/04/2019 07:41, Daniel Jordan wrote:
> Taking and dropping mmap_sem to modify a single counter, locked_vm, is
> overkill when the counter could be synchronized separately.
>
> Make mmap_sem a little less coarse by changing locked_vm to an atomic,
> the 64-bit variety to avoid issues with o
On Wed, Apr 10, 2019 at 04:06:50PM +1000, Michael Ellerman wrote:
> Josh Poimboeuf writes:
> > Configure powerpc CPU runtime speculation bug mitigations in accordance
> > with the 'cpu_spec_mitigations=' cmdline options. This affects
> > Meltdown, Spectre v1, Spectre v2, and Speculative Store Byp
This patch provides support to disable and enable platform specific
sensor groups like performance, utilization and frequency which are
not supported in hwmon.
Signed-off-by: Shilpasri G Bhat
---
Changes from V2:
- Rebase on master
Changes from V1:
- As per Michael Ellerman's suggestion, adding
On 4/10/19 10:24 PM, Gustavo A. R. Silva wrote:
> [+cc lkml]
>
> On 4/10/19 10:05 PM, S.j. Wang wrote:
>> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
>> independent of each other, so replace fall-through with break.
>>
>> Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver
[+cc lkml]
On 4/10/19 10:05 PM, S.j. Wang wrote:
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
> independent of each other, so replace fall-through with break.
>
> Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
>
> Signed-off-by: Shengjiu Wang
> Acked-by: Nicolin Ch
Allow the boot CPU / CPU0 to be nohz_full. Have the boot CPU take the
do_timer duty during boot until a housekeeping CPU can take over.
This is supported when CONFIG_PM_SLEEP_SMP is not configured, or when
it is configured and the arch allows suspend on non-zero CPUs.
nohz_full has been trialed a
During housekeeping mask setup, currently a possible CPU is required.
That does not guarantee the CPU would be available at boot time, so
check to ensure that at least one present CPU is in the mask.
Signed-off-by: Nicholas Piggin
---
kernel/sched/isolation.c | 18 +-
1 file chan
This patch provides an arch option, ARCH_SUSPEND_NONZERO_CPU, to
opt-in to allowing suspend to occur on one of the housekeeping CPUs
rather than hardcoded CPU0.
This will allow CPU0 to be a nohz_full CPU with a later change.
It may be possible for platforms with hardware/firmware restrictions
on
This adds a function to disable secondary CPUs for suspend that are
not necessarily non-zero / non-boot CPUs. Platforms will be able to
use this to suspend using non-zero CPUs.
Cc: Rafael J. Wysocki
Signed-off-by: Nicholas Piggin
---
include/linux/cpu.h | 10 ++
kernel/kexec_core.c
This has no effect yet because CPU0 will always be a housekeeping CPU
until a later change.
Signed-off-by: Nicholas Piggin
---
kernel/sched/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 4778c48a7fda..10e05ec049b6 100644
Since last time, I added a compile time option to opt-out of this
if the platform does not support suspend on non-zero, and tried to
improve legibility of changelogs and explain the justification
better.
I have been testing this on powerpc/pseries and it seems to work
fine (the firmware call to su
On 4/9/19 10:10 AM, Nicholas Piggin wrote:
> Using a jiffies timer creates a dependency on the tick_do_timer_cpu
> incrementing jiffies. If that CPU has locked up and jiffies is not
> incrementing, the watchdog heartbeat timer for all CPUs stops and
> creates false positives and confusing warnin
On Wed, Apr 10, 2019 at 07:04:48PM +0200, Cédric Le Goater wrote:
> When a P9 sPAPR VM boots, the CAS negotiation process determines which
> interrupt mode to use (XICS legacy or XIVE native) and invokes a
> machine reset to activate the chosen mode.
>
> To be able to switch from one mode to anoth
Hi Mark
>
> On Wed, Apr 10, 2019 at 02:42:45AM +, S.j. Wang wrote:
> > case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be independent
> of
> > each other, so replace fall-through with break.
>
> This doesn't apply against current code, please check and resend.
Thanks, have sent v4 for
case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
independent of each other, so replace fall-through with break.
Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
Cc:
---
Change in v4
- Add Acked-by and cc stable
- change
Hi
>
>
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be independent
> of each other, so replace fall-through with break.
>
> Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
>
> Signed-off-by: Shengjiu Wang
> Cc:
Forget to add Acked-by: Nicolin Chen , will send v4,
case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be
independent of each other, so replace fall-through with break.
Fixes: 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver")
Signed-off-by: Shengjiu Wang
Cc:
---
changes in v3
- add cc stable
- change the subject
sound/soc/fsl/fsl_esai
Hi
>
>
> On 4/9/19 9:42 PM, S.j. Wang wrote:
> > case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be independent
> of
> > each other, so replace fall-through with break.
> >
> I think you should change the subject line to:
>
> fix missing break in switch statement
>
> ...because you are fi
The file arch/powerpc/include/uapi/asm/vas.h was considered but
never merged and should be removed from the MAINTAINERS file.
While here, add missing email address.
Reported-by: Joe Perches
Signed-off-by: Sukadev Bhattiprolu
---
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2 deletion
On Tue, Apr 09, 2019 at 01:34:21PM +0200, Peter Zijlstra wrote:
> On Wed, Feb 27, 2019 at 08:05:14AM -0800, Ricardo Neri wrote:
> > diff --git a/kernel/watchdog.c b/kernel/watchdog.c
> > index 8fbfda94a67b..367aa81294ef 100644
> > --- a/kernel/watchdog.c
> > +++ b/kernel/watchdog.c
> > @@ -44,7 +44
Hello,
Ping?
--
Thiago Jung Bauermann
IBM Linux Technology Center
Thiago Jung Bauermann writes:
> When testing DLPAR CPU add/remove on a system under stress,
> pseries_cpu_die() doesn't wait long enough for a CPU to die:
>
> [ 446.983944] cpu 148 (hwid 148) Ready to die...
> [ 446.984062
On 09/04/2019 07:47, Florian Weimer wrote:
> struct termios2 is required for setting arbitrary baud rates on serial
> ports. and have conflicting
> definitions in the existing termios definitions, which means that it
> is currently very difficult to use TCGETS2/TCSETS2 and struct termios2
> w
Now that all files were converted to ReST format, rename them
and add an index.
Signed-off-by: Mauro Carvalho Chehab
---
.../devicetree/bindings/hwmon/g762.txt| 2 +-
Documentation/hwmon/{ab8500 => ab8500.rst}| 2 +-
...guru-datasheet => abituguru-datasheet.rst} | 0
.../hwmon/
This series converts the contents of Documentation/hwmon to ReST
format.
PS.: I opted to group the conversion files per groups of maintainer
set, as, if I were to generate one patch per file, it would give around
160 patches.
I also added those patches to my development tree at:
https://g
Convert ibmpowernv to ReST format, in order to allow it to
be parsed by Sphinx.
Signed-off-by: Mauro Carvalho Chehab
---
Documentation/hwmon/ibmpowernv | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/hwmon/ibmpowernv b/Documentation/hwmon/ibmpowernv
index 56468258711f..3f1fe
On Wed, Apr 10, 2019 at 10:34:05AM +, S.j. Wang wrote:
> > On Wed, Apr 10, 2019 at 08:26:59AM +, S.j. Wang wrote:
> > > > Is it possible to update the table? It'd be way quicker to use
> > > > lookup table than real-time calculation all the time. I believe you
> > > > can simply calculate a
On Wed, Apr 10, 2019 at 10:34:57AM +, Viorel Suman wrote:
> Hi Nicolin,
>
> On Ma, 2019-04-09 at 21:29 -0700, Nicolin Chen wrote:
> > WARNING: This email was created outside of NXP. DO NOT CLICK links or
> > attachments unless you recognize the sender and know the content is
> > safe.
> >
> >
Hello,
On the POWER9 processor, the XIVE interrupt controller can control
interrupt sources using MMIOs to trigger events, to EOI or to turn off
the sources. Priority management and interrupt acknowledgment is also
controlled by MMIO in the CPU presenter sub-engine.
PowerNV/baremetal Linux runs n
(Cc:ing Peter Jones)
On Tue, Apr 9, 2019 at 3:55 PM Claudio Carvalho wrote:
>
>
> On 4/5/19 7:19 PM, Matthew Garrett wrote:
> > Based on our experience doing this in UEFI, that's insufficient - you
> > want to be able to block individual binaries or leaf certificates
> > without dropping trust in
Each thread has an associated Thread Interrupt Management context
composed of a set of registers. These registers let the thread handle
priority management and interrupt acknowledgment. The most important
are :
- Interrupt Pending Buffer (IPB)
- Current Processor Priority (CPPR)
This control will be used by the H_INT_SYNC hcall from QEMU to flush
event notifications on the XIVE IC owning the source.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
arch/powerpc/include/uapi/asm/kvm.h| 1 +
arch/powerpc/kvm/book3s_xive_native.c | 36 +++
This control is to be used by the H_INT_RESET hcall from QEMU. Its
purpose is to clear all configuration of the sources and EQs. This is
necessary in case of a kexec (for a kdump kernel for instance) to make
sure that no remaining configuration is left from the previous boot
setup so that the new k
Full support for the XIVE native exploitation mode is now available,
advertise the capability KVM_CAP_PPC_IRQ_XIVE for guests running on
PowerNV KVM Hypervisors only. Support for nested guests (pseries KVM
Hypervisor) is not yet available. XIVE should also have been activated
which is default setti
When migration of a VM is initiated, a first copy of the RAM is
transferred to the destination before the VM is stopped, but there is
no guarantee that the EQ pages in which the event notifications are
queued have not been modified.
To make sure migration will capture a consistent memory state, th
This is the basic framework for the new KVM device supporting the XIVE
native exploitation mode. The user interface exposes a new KVM device
to be created by QEMU, only available when running on a L0 hypervisor.
Support for nested guests is not available yet.
The XIVE device reuses the device stru
When a P9 sPAPR VM boots, the CAS negotiation process determines which
interrupt mode to use (XICS legacy or XIVE native) and invokes a
machine reset to activate the chosen mode.
To be able to switch from one mode to another, we introduce the
capability to release a KVM device without destroying t
The KVM XICS-over-XIVE device and the proposed KVM XIVE native device
implement an IRQ space for the guest using the generic IPI interrupts
of the XIVE IC controller. These interrupts are allocated at the OPAL
level and "mapped" into the guest IRQ number space in the range 0-0x1FFF.
Interrupt manag
Each source is associated with an Event State Buffer (ESB) with a
even/odd pair of pages which provides commands to manage the source:
to trigger, to EOI, to turn off the source for instance.
The custom VM fault handler will deduce the guest IRQ number from the
offset of the fault, and the ESB pag
Some KVM devices will want to handle special mappings related to the
underlying HW. For instance, the XIVE interrupt controller of the
POWER9 processor has MMIO pages for thread interrupt management and
for interrupt source control that need to be exposed to the guest when
the OS has the required s
The state of the thread interrupt management registers needs to be
collected for migration. These registers are cached under the
'xive_saved_state.w01' field of the VCPU when the VPCU context is
pulled from the HW thread. An OPAL call retrieves the backup of the
IPB register in the underlying XIVE
These controls will be used by the H_INT_SET_QUEUE_CONFIG and
H_INT_GET_QUEUE_CONFIG hcalls from QEMU to configure the underlying
Event Queue in the XIVE IC. They will also be used to restore the
configuration of the XIVE EQs and to capture the internal run-time
state of the EQs. Both 'get' and 'se
This control will be used by the H_INT_SET_SOURCE_CONFIG hcall from
QEMU to configure the target of a source and also to restore the
configuration of a source when migrating the VM.
The XIVE source interrupt structure is extended with the value of the
Effective Interrupt Source Number. The EISN is
The XIVE KVM device maintains a list of interrupt sources for the VM
which are allocated in the pool of generic interrupts (IPIs) of the
main XIVE IC controller. These are used for the CPU IPIs as well as
for virtual device interrupts. The IRQ number space is defined by
QEMU.
The XIVE device reuse
The user interface exposes a new capability KVM_CAP_PPC_IRQ_XIVE to
let QEMU connect the vCPU presenters to the XIVE KVM device if
required. The capability is not advertised for now as the full support
for the XIVE native exploitation mode is not yet available. When this
is case, the capability wil
The support for XIVE native exploitation mode in Linux/KVM needs a
couple more OPAL calls to get and set the state of the XIVE internal
structures being used by a sPAPR guest.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
---
arch/powerpc/include/asm/opal-api.h| 7 +-
arch/
On 04/10/2019 04:15 AM, huang ying wrote:
> Hi, Waiman,
>
> What's the status of this patchset? And its merging plan?
>
> Best Regards,
> Huang, Ying
I have broken the patch into 3 parts (0/1/2) and rewritten some of them.
Part 0 has been merged into tip. Parts 1 and 2 are still under testing.
C
Hello,
On Wed, Apr 10, 2019 at 08:12:11AM -0300, Mauro Carvalho Chehab wrote:
> Now that all files were converted to ReST format, rename them
> and add an index.
>
> Signed-off-by: Mauro Carvalho Chehab
> ---
[...]
> diff --git a/Documentation/hwmon/submitting-patches
> b/Documentation/hwmon/su
On 4/9/19 9:42 PM, S.j. Wang wrote:
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be independent of
> each other, so replace fall-through with break.
>
I think you should change the subject line to:
fix missing break in switch statement
...because you are fixing a bug, and it's importa
On Tue, 2019-04-09 at 06:03:24 UTC, Michael Ellerman wrote:
> The recent commit 8bc086899816 ("powerpc/mm: Only define
> MAX_PHYSMEM_BITS in SPARSEMEM configurations") removed our definition
> of MAX_PHYSMEM_BITS when SPARSEMEM is disabled.
>
> This inadvertently broke some 64-bit FLATMEM using co
On Fri, 2019-03-29 at 07:42:57 UTC, Nicholas Piggin wrote:
> Commit 48e7b76957 ("powerpc/64s/hash: Convert SLB miss handlers to C")
> broke the radix-mode segment exception handler. In radix mode, this is
> exception is not an SLB miss, rather it signals that the EA is outside
> the range translate
On Wed, Apr 10, 2019 at 8:06 AM Viorel Suman wrote:
>
> Release the reference to the underlying device taken
> by of_find_device_by_node() call.
>
> Signed-off-by: Viorel Suman
> Reported-by: Julia Lawall
> Acked-by: Nicolin Chen
Please provide a Fixes tag.
On Wed, Apr 10, 2019 at 8:06 AM Viorel Suman wrote:
>
> Remove "model" attribute from fsl_audmix DT document.
Please provide the reasoning.
On Wed, 10 Apr 2019, Michael Ellerman wrote:
> Josh Poimboeuf writes:
>
> > On Fri, Apr 05, 2019 at 06:01:36PM +0200, Borislav Petkov wrote:
> >> Thinking about this more, we can shave off the first 4 chars and have it
> >> be:
> >>
> >> spec_mitigations=
> >>
> >> I think it is painfully clear
On Tue, 9 Apr 2019, Zhen Lei wrote:
> s390_iommu=strict is equivalent to iommu.dma_mode=strict.
>
> Signed-off-by: Zhen Lei
Acked-by: Sebastian Ott
On Wed, Apr 10, 2019 at 02:42:45AM +, S.j. Wang wrote:
> case ESAI_HCKT_EXTAL and case ESAI_HCKR_EXTAL should be independent of
> each other, so replace fall-through with break.
This doesn't apply against current code, please check and resend.
signature.asc
Description: PGP signature
Now that all files were converted to ReST format, rename them
and add an index.
Signed-off-by: Mauro Carvalho Chehab
---
.../devicetree/bindings/hwmon/g762.txt| 2 +-
Documentation/hwmon/{ab8500 => ab8500.rst}| 2 +-
...guru-datasheet => abituguru-datasheet.rst} | 0
.../hwmon/
Convert ibmpowernv to ReST format, in order to allow it to
be parsed by Sphinx.
Signed-off-by: Mauro Carvalho Chehab
---
Documentation/hwmon/ibmpowernv | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/hwmon/ibmpowernv b/Documentation/hwmon/ibmpowernv
index 56468258711f..3f1fe
On Wed, Apr 10, 2019 at 11:06:35AM +, Viorel Suman wrote:
> The latest audmix patch-set (v5) had the "model" attribute removed as
> requested by Nicolin Chen, but looks like (v4) version of DAI driver
> reached "for-next" branch - fix this by removing "model" attribute.
> Asside of this fix obj
This series converts the contents of Documentation/hwmon to ReST
format.
PS.: I opted to group the conversion files per groups of maintainer
set, as, if I were to generate one patch per file, it would give around
160 patches.
I also added those patches to my development tree at:
https://g
There should be no trouble to understand dev = pdev->dev.
This can save some space to have more print info or save
some wrapped lines.
Signed-off-by: Viorel Suman
Suggested-by: Nicolin Chen
---
sound/soc/fsl/fsl_audmix.c | 27 +--
1 file changed, 13 insertions(+), 14 del
Release the reference to the underlying device taken
by of_find_device_by_node() call.
Signed-off-by: Viorel Suman
Reported-by: Julia Lawall
Acked-by: Nicolin Chen
---
sound/soc/fsl/imx-audmix.c | 4
1 file changed, 4 insertions(+)
diff --git a/sound/soc/fsl/imx-audmix.c b/sound/soc/fsl/
Remove "model" attribute from fsl_audmix DT document.
Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
---
Documentation/devicetree/bindings/sound/fsl,audmix.txt | 4
1 file changed, 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/fsl,audmix.txt
b/Documentation/devi
Use "of_device_id.data" to specify the machine driver
instead of "model" DTS attribute.
Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
---
sound/soc/fsl/fsl_audmix.c | 43 +++
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/sound/soc/f
The latest audmix patch-set (v5) had the "model" attribute removed as
requested by Nicolin Chen, but looks like (v4) version of DAI driver
reached "for-next" branch - fix this by removing "model" attribute.
Asside of this fix object reference leaks in machine probe reported by
Julia Lawall.
Viorel
Hi Mark,
On Mi, 2019-04-10 at 11:39 +0100, Mark Brown wrote:
> On Wed, Apr 10, 2019 at 10:37:30AM +, Viorel Suman wrote:
> >
> > Remove "model" attribute.
> >
> > Signed-off-by: Viorel Suman
> > Acked-by: Nicolin Chen
> Please use subject lines matching the style for the subsystem. This
>
On Wed, Apr 10, 2019 at 10:37:30AM +, Viorel Suman wrote:
> Remove "model" attribute.
>
> Signed-off-by: Viorel Suman
> Acked-by: Nicolin Chen
Please use subject lines matching the style for the subsystem. This
makes it easier for people to identify relevant patches.
signature.asc
Descri
There should be no trouble to understand dev = pdev->dev.
This can save some space to have more print info or save
some wrapped lines.
Signed-off-by: Viorel Suman
Suggested-by: Nicolin Chen
---
sound/soc/fsl/fsl_audmix.c | 26 +-
1 file changed, 13 insertions(+), 13 dele
Release the reference to the underlying device taken
by of_find_device_by_node() call.
Signed-off-by: Viorel Suman
Reported-by: Julia Lawall
Acked-by: Nicolin Chen
---
sound/soc/fsl/imx-audmix.c | 4
1 file changed, 4 insertions(+)
diff --git a/sound/soc/fsl/imx-audmix.c b/sound/soc/fsl/
Remove "model" attribute.
Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
---
Documentation/devicetree/bindings/sound/fsl,audmix.txt | 4
1 file changed, 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/fsl,audmix.txt
b/Documentation/devicetree/bindings/sound/fsl,au
Use "of_device_id.data" to specify the machine driver
instead of "model" DTS attribute.
Signed-off-by: Viorel Suman
Acked-by: Nicolin Chen
---
sound/soc/fsl/fsl_audmix.c | 43 +++
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/sound/soc/f
The latest audmix patch-set (v5) had the "model" attribute removed as
requested by Nicolin Chen, but looks like (v4) version of DAI driver
reached "for-next" branch - fix this by removing "model" attribute.
Asside of this fix object reference leaks in machine probe reported by
Julia Lawall.
Viorel
Hi Nicolin,
On Ma, 2019-04-09 at 21:29 -0700, Nicolin Chen wrote:
> WARNING: This email was created outside of NXP. DO NOT CLICK links or
> attachments unless you recognize the sender and know the content is
> safe.
>
>
>
> On Tue, Apr 09, 2019 at 11:27:39AM +, Viorel Suman wrote:
> >
> >
Hi
>
>
> On Wed, Apr 10, 2019 at 08:26:59AM +, S.j. Wang wrote:
> > > Is it possible to update the table? It'd be way quicker to use
> > > lookup table than real-time calculation all the time. I believe you
> > > can simply calculate all the values out for 12KHz and 24KHz since
> > > you hav
On Wed, Apr 10, 2019 at 08:26:59AM +, S.j. Wang wrote:
> > Is it possible to update the table? It'd be way quicker to use lookup table
> > than real-time calculation all the time. I believe you can simply calculate
> > all
> > the values out for 12KHz and 24KHz since you have the function. If
On Wed, Apr 10, 2019 at 08:20:53PM +1000, Michael Ellerman wrote:
> Bharata B Rao writes:
>
> > When HPT resizing is attempted in response to memory hotplug, we see
> > the following messages from the kernel:
> >
> > lpar: Attempting to resize HPT to shift 23
> > Unable to resize hash page table
Bharata B Rao writes:
> When HPT resizing is attempted in response to memory hotplug, we see
> the following messages from the kernel:
>
> lpar: Attempting to resize HPT to shift 23
> Unable to resize hash page table to target order 23: -28
>
> This gives a feeling as though we are trying to grow
Hi, Waiman,
What's the status of this patchset? And its merging plan?
Best Regards,
Huang, Ying
On Wed, Apr 10, 2019 at 03:48:48PM +1000, Michael Ellerman wrote:
> What about when we have a mitigation for a non-speculation related bug :)
Like that is *ever* going to happen... :-P
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
> -Original Message-
> From: Nicolin Chen
> Sent: Wednesday, April 10, 2019 4:01 PM
> To: S.j. Wang
> Cc: ti...@kernel.org; xiubo@gmail.com; feste...@gmail.com;
> broo...@kernel.org; alsa-de...@alsa-project.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [EXT] Re: [PATCH] ASo
On Wed, Apr 10, 2019 at 07:22:31AM +, S.j. Wang wrote:
> > The table was copied directly from the Reference Manual. We also have
> > listed all supported input and output sample rates just right behind that
> > table.
> > If there're missing rates, we probably should update those two lists als
When HPT resizing is attempted in response to memory hotplug, we see
the following messages from the kernel:
lpar: Attempting to resize HPT to shift 23
Unable to resize hash page table to target order 23: -28
This gives a feeling as though we are trying to grow HPT but failed and
hence bad things
On 2019/4/9 下午9:14, Michael S. Tsirkin wrote:
On Tue, Apr 09, 2019 at 12:16:47PM +0800, Jason Wang wrote:
We set dirty bit through setting up kmaps and access them through
kernel virtual address, this may result alias in virtually tagged
caches that require a dcache flush afterwards.
Cc: Chri
Hi
>
> On Wed, Apr 10, 2019 at 03:15:26AM +, S.j. Wang wrote:
> > The table is not flexible if supported sample rate is not in the
> > table, so use a function to replace it.
>
> Could you please elaborate a bit the special use case here?
>
> The table was copied directly from the Reference
Hi Daniel,
On Fri, Mar 15, 2019 at 04:23:02PM +1100, Daniel Axtens wrote:
> Eric Biggers writes:
>
> > Hi Daniel,
> >
> > On Fri, Mar 15, 2019 at 03:24:35PM +1100, Daniel Axtens wrote:
> >> Hi Eric,
> >>
> >> >> The original assembly imported from OpenSSL has two copy-paste
> >> >> errors in ha
95 matches
Mail list logo
