On Tue, 2018-08-14 at 10:46 +0800, zhong jiang wrote:
> Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
> So just replace it.
Better to remove the extern and the const altogether here as well.
$ git grep -w powerpc_num_opcodes
arch/powerpc/xmon/ppc-dis.c: opcode_end = pow
On Tue, 2018-08-14 at 10:46 +0800, zhong jiang wrote:
> We prefer to ARRAY_SIZE rather than duplicating its implementation.
> So just replace it.
[]
> diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
[]
> @@ -4645,7 +4645,7 @@ static char *pfmfs_dname(struct dentry *dentry, char
On 2018/8/14 12:45, Joe Perches wrote:
> On Tue, 2018-08-14 at 10:46 +0800, zhong jiang wrote:
>> We prefer to ARRAY_SIZE rather than duplicating its implementation.
>> So just replace it.
> []
>> diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
> []
>> @@ -4645,7 +4645,7 @@ sta
Breno Leitao writes:
> Hello Michael,
>
> On 08/06/2018 08:06 AM, Michael Ellerman wrote:
>> Breno Leitao writes:
>>
>>> diff --git a/tools/testing/selftests/powerpc/harness.c
>>> b/tools/testing/selftests/powerpc/harness.c
>>> index 66d31de60b9a..06c51e8d8ccb 100644
>>> --- a/tools/testing/se
Mathieu Malaterre writes:
> Frederic,
>
> Could you double check with Michael what is now best to do.
I decided it had been long enough (since March), so I just merged it.
If Fred et. al. want to do something better they can send me another
patch on top of it.
cheers
> On Mon, Aug 13, 2018 at
Alexey Kardashevskiy writes:
> On 10/08/2018 17:10, Michael Ellerman wrote:
>> "Aneesh Kumar K.V" writes:
>>
>>> Fix the below build error using strlcpy instead of strncpy
>>>
>>> In function 'pnv_parse_cpuidle_dt',
>>> inlined from 'pnv_init_idle_states' at
>>> arch/powerpc/platforms/power
The compatible string is not correct in the clock node.
The clocks property refers to the wrong node too.
This patch is to fix them.
Signed-off-by: Tang Yuantian
---
arch/powerpc/boot/dts/fsl/t1023si-post.dtsi |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/p
Hi Christophe,
The patch looks fine, just a nit about the change log:
Christophe Lombard writes:
> The AFU Information DVSEC capability is a means to extract common,
> general information about all of the AFUs associated with a Function
> independent of the specific functionality that each AFU p
Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
So just replace it.
Signed-off-by: zhong jiang
---
arch/powerpc/xmon/ppc-opc.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
index
We prefer to ARRAY_SIZE rather than duplicating its implementation.
So just replace it.
Signed-off-by: zhong jiang
---
arch/ia64/kernel/perfmon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index a9d4dc6..6cbe6e0 100
The issue is detected with the help of Coccinelle.
zhong jiang (2):
ia64: Use ARRAY_SIZE to replace its implementation
powerpc: Use ARRAY_SIZE to replace its implementation
arch/ia64/kernel/perfmon.c | 2 +-
arch/powerpc/xmon/ppc-opc.c | 12
2 files changed, 5 insertions(+), 9
On 14/08/18 00:09, Christophe Lombard wrote:
The AFU Information DVSEC capability is a means to extract common,
general information about all of the AFUs associated with a Function
independent of the specific functionality that each AFU provides.
This patch fixes the access to the AFU Descriptor
Hi everyone,
Does someone need anything more to be done regarding this series ?
Thanks,
Alex
On 08/06/2018 05:57 PM, Alexandre Ghiti wrote:
[CC linux-mm for inclusion in -mm tree]
In order to reduce copy/paste
On Thu, Apr 05, 2018 at 05:15:00PM +1000, Balbir Singh wrote:
Add a blocking notifier callback to be called in real-mode
on machine check exceptions for UE (ld/st) errors only.
It's been a while, but is this patchset still being pursued?
This patch in particular (callbacks for MCE handling) ha
Le 13/08/2018 à 16:09, Christophe Lombard a écrit :
The AFU Information DVSEC capability is a means to extract common,
general information about all of the AFUs associated with a Function
independent of the specific functionality that each AFU provides.
This patch fixes the access to the AFU
On Mon, 13 Aug 2018 09:57:33 +0530
Mahesh Jagannath Salgaonkar wrote:
> On 08/10/2018 12:12 PM, Nicholas Piggin wrote:
> > The machine check code that flushes and restores bolted segments in
> > real mode belongs in mm/slb.c. This will also be used by pseries
> > machine check and idle code in fu
On Mon, 13 Aug 2018 09:47:04 +0530
Mahesh Jagannath Salgaonkar wrote:
> On 08/11/2018 10:03 AM, Nicholas Piggin wrote:
> > On Tue, 07 Aug 2018 19:47:39 +0530
> > Mahesh J Salgaonkar wrote:
> >
> >> From: Mahesh Salgaonkar
> >>
> >> If we get a machine check exceptions due to SLB errors then
The AFU Information DVSEC capability is a means to extract common,
general information about all of the AFUs associated with a Function
independent of the specific functionality that each AFU provides.
This patch fixes the access to the AFU Descriptor Data indexed by the
AFU Info Index field.
Fix
On Mon, 2018-08-13 at 17:06 +0530, Gautham R Shenoy wrote:
> Hi Srikar,
>
> Thanks for reviewing the patch.
>
> On Thu, Aug 09, 2018 at 06:27:43AM -0700, Srikar Dronamraju wrote:
> > * Gautham R. Shenoy [2018-08-09 11:02:07]:
> >
> > >
> > > int threads_per_core, threads_per_subcore, threads_
On 08/13/2018 06:57 PM, Christophe Leroy wrote:
While implementing TLB miss HW assistance on the 8xx, the following
warning was encountered:
[ 423.732965] WARNING: CPU: 0 PID: 345 at mm/slub.c:2412
___slab_alloc.constprop.30+0x26c/0x46c
[ 423.733033] CPU: 0 PID: 345 Comm: mmap Not tainted
4.
Le 13/08/2018 à 11:48, Andrew Donnellan a écrit :
On 13/08/18 19:01, Christophe Lombard wrote:
From: Christophe Lombard
Your git committer email should probably match your sign-off email.
The AFU Information DVSEC capability is a means to extract common,
general information about all of th
pgtable_cache_add() gracefully handles the case when a cache that
size already exists by returning early with the following test:
if (PGT_CACHE(shift))
return; /* Already have a cache of this size */
It is then not needed to test the existance of the cache before.
Signed-
As previous patch has removed all pgtable cache constructors,
lets remove it completely.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/pgtable.h | 2 +-
arch/powerpc/mm/hugetlbpage.c | 2 +-
arch/powerpc/mm/init-common.c | 10 +-
3 files changed, 7 insertions(+
While implementing TLB miss HW assistance on the 8xx, the following
warning was encountered:
[ 423.732965] WARNING: CPU: 0 PID: 345 at mm/slub.c:2412
___slab_alloc.constprop.30+0x26c/0x46c
[ 423.733033] CPU: 0 PID: 345 Comm: mmap Not tainted
4.18.0-rc8-00664-g2dfff9121c55 #671
[ 423.733075] N
When a process allocates a hugepage, the following leak is
reported by kmemleak. This is a false positive which is
due to the pointer to the table being stored in the PGD
as physical memory address and not virtual memory pointer.
unreferenced object 0xc30f8200 (size 512):
comm "mmap", pid 374, j
On Thu, Aug 09, 2018 at 06:26:57AM -0700, Srikar Dronamraju wrote:
> * Gautham R. Shenoy [2018-08-09 11:02:08]:
>
> >
> > 3) ppc64_cpu --smt=2
> >SMT domain ceases to exist as each domain consists of just one
> >group.
> >
>
> When seen in isolation, the above looks as if ppc64_cpu --s
Hi Srikar,
Thanks for reviewing the patch.
On Thu, Aug 09, 2018 at 06:27:43AM -0700, Srikar Dronamraju wrote:
> * Gautham R. Shenoy [2018-08-09 11:02:07]:
>
> >
> > int threads_per_core, threads_per_subcore, threads_shift;
> > +bool has_big_cores;
> > cpumask_t threads_core_mask;
> > EXPORT
Frederic,
Could you double check with Michael what is now best to do.
Thanks
On Mon, Aug 13, 2018 at 1:23 PM Michael Ellerman
wrote:
>
> On Thu, 2018-03-22 at 21:05:28 UTC, Mathieu Malaterre wrote:
> > In commit 14baf4d9c739 ("cxl: Add guest-specific code") the following code
> > was added:
> >
On Mon, 2018-08-13 at 05:44:57 UTC, "Aneesh Kumar K.V" wrote:
> Add statistics that show how memory is mapped within the kernel linear
> mapping.
> This is similar to commit 37cd944c8d8f ("s390/pgtable: add mapping
> statistics")
>
> We don't do this with Hash translation mode. Hash uses one siz
On Fri, 2018-08-10 at 12:25:35 UTC, Michael Ellerman wrote:
> Currently if you build a 32-bit powerpc kernel and use get_user() to
> load a u64 value it will fail to build with eg:
>
> kernel/rseq.o: In function `rseq_get_rseq_cs':
> kernel/rseq.c:123: undefined reference to `__get_user_bad'
>
On Fri, 2018-08-10 at 06:42:48 UTC, Nicholas Piggin wrote:
> The machine check code that flushes and restores bolted segments in
> real mode belongs in mm/slb.c. This will also be used by pseries
> machine check and idle code in future changes.
>
> Signed-off-by: Nicholas Piggin
Applied to power
On Thu, 2018-08-09 at 13:37:20 UTC, "Aneesh Kumar K.V" wrote:
> Fix the below build error using strlcpy instead of strncpy
>
> In function 'pnv_parse_cpuidle_dt',
> inlined from 'pnv_init_idle_states' at
> arch/powerpc/platforms/powernv/idle.c:840:7,
> inlined from '__machine_initcall_pow
On Thu, 2018-08-09 at 13:36:59 UTC, "Aneesh Kumar K.V" wrote:
> This patch makes sure we update the mmu_gather page size even if we are
> requesting for a fullmm flush. This avoids triggering VM_WARN_ON in code
> paths like __tlb_remove_page_size that explicitly check for removing range
> page
> s
On Thu, 2018-08-09 at 13:36:42 UTC, "Aneesh Kumar K.V" wrote:
> Avoid coverity false warnings like
>
> *** CID 187347: Control flow issues (UNREACHABLE)
> /arch/powerpc/mm/hash_native_64.c: 819 in native_flush_hash_range()
> 813slot += hidx & _PTEIDX_GROUP_IX;
> 814hptep = htab_a
On Thu, 2018-08-09 at 08:14:41 UTC, Christophe Leroy wrote:
> The symbol memcpy_nocache_branch defined in order to allow patching
> of memset function once cache is enabled leads to confusing reports
> by perf tool.
>
> Using the new patch_site functionality solves this issue.
>
> Signed-off-by:
On Wed, 2018-08-08 at 15:36:34 UTC, Christophe Leroy wrote:
> huge_pte_offset_and_shift() has never existed
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/646dbe40fa2a54118975792fa9b98c
cheers
On Wed, 2018-08-08 at 11:57:24 UTC, Dan Carpenter wrote:
> The problem is the the calculation should be "end - start + 1" but the
> plus one is missing in this calculation.
>
> Fixes: 8626816e905e ("powerpc: add support for MPIC message register API")
> Signed-off-by: Dan Carpenter
Applied to po
On Tue, 2018-08-07 at 14:16:46 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> During Machine Check interrupt on pseries platform, register r3 points
> RTAS extended event log passed by hypervisor. Since hypervisor uses r3
> to pass pointer to rtas log, it stores the original r3 val
On Tue, 2018-08-07 at 14:15:39 UTC, Breno Leitao wrote:
> There are some powerpc selftests, as tm/tm-unavailable, that run for a long
> period (>120 seconds), and if it is interrupted, as pressing CRTL-C
> (SIGINT), the foreground process (harness) dies but the child process and
> threads continue
On Mon, 2018-08-06 at 15:09:11 UTC, Christophe Leroy wrote:
> commit e8cb7a55eb8dc ("powerpc: remove superflous inclusions of
> asm/fixmap.h") removed inclusion of asm/fixmap.h from files not
> including objects from that file.
>
> However, asm/mmu-8xx.h includes call to __fix_to_virt(). The prop
On Mon, 2018-08-06 at 20:42:45 UTC, Hari Bathini wrote:
> Crash memory ranges is an array of memory ranges of the crashing kernel
> to be exported as a dump via /proc/vmcore file. The size of the array
> is set based on INIT_MEMBLOCK_REGIONS, which works alright in most cases
> where memblock memor
On Fri, 2018-08-03 at 06:06:00 UTC, Rashmica Gupta wrote:
> This patch allows the memory removed by memtrace to be readded to the
> kernel. So now you don't have to reboot your system to add the memory
> back to the kernel or to have a different amount of memory removed.
>
> Signed-off-by: Rashmic
On Fri, 2018-06-22 at 19:26:53 UTC, Mathieu Malaterre wrote:
> Make sure to include setup.h to provide the following prototypes:
>
> - irqstack_early_init
> - setup_power_save
> - initialize_cache_info
>
> Fix the following warnings (treated as error in W=1):
>
> arch/powerpc/kernel/setup_32.c
On Fri, 2018-06-22 at 19:27:47 UTC, Mathieu Malaterre wrote:
> âtypeâ is only used when CONFIG_DEBUG_HIGHMEM is set. So add a possibly
> unused tag to variable. Remove warning treated as error with W=1:
>
> arch/powerpc/mm/highmem.c:59:6: error: variable âtypeâ set but not used
> [-Werr
On Mon, 2018-04-30 at 14:55:57 UTC, Nicholas Piggin wrote:
> Use .flush to wait for drivers to flush their console outside of
> the spinlock, to reduce lock/irq latencies.
>
> Flush the hvc console driver after each write, which can help
> messages make it out to the console after a crash.
>
> Si
On Mon, 2018-04-30 at 14:55:56 UTC, Nicholas Piggin wrote:
> Rework the hvc_write loop to drop and re-take the spinlock on each
> iteration, add a cond_resched. Don't bother with an initial hvc_push
> initially, which makes the logic simpler -- just do a hvc_push on
> each time around the loop.
>
On Mon, 2018-04-30 at 14:55:55 UTC, Nicholas Piggin wrote:
> Introduce points where hvc_poll drops the lock, enables interrupts,
> and reschedules.
>
> Signed-off-by: Nicholas Piggin
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/cfb5946b55f1dfd19e042feae1fbff
cheers
On Mon, 2018-04-30 at 14:55:54 UTC, Nicholas Piggin wrote:
> Avoid looping with the spinlock held while there is read data
> being returned from the hv driver. Instead note if the entire
> size returned by tty_buffer_request_room was read, and request
> another read poll.
>
> This limits the criti
On Mon, 2018-04-30 at 14:55:53 UTC, Nicholas Piggin wrote:
> This allows hvc operations to sleep under the lock.
>
> Signed-off-by: Nicholas Piggin
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/a9bf5c8a271b9a954709b7ada1bd25
cheers
On Wed, 2018-04-04 at 20:08:35 UTC, Mathieu Malaterre wrote:
> Add gcc attribute unused for two variables. Fix warnings treated as errors
> with W=1:
>
> arch/powerpc/kernel/prom_init.c:1388:8: error: variable âpathâ set but
> not used [-Werror=unused-but-set-variable]
>
> Suggested-by: Ch
On Wed, 2018-03-28 at 19:39:35 UTC, Mathieu Malaterre wrote:
> These functions can all be static, make it so. Fix warnings treated as
> errors with W=1:
>
> arch/powerpc/platforms/powermac/pci.c:1022:6: error: no previous prototype
> for âpmac_pci_fixup_ohciâ [-Werror=missing-prototypes]
>
On Wed, 2018-03-28 at 19:30:28 UTC, Mathieu Malaterre wrote:
> Since the value of x is never intended to be read, remove it. Fix warning
> treated as error with W=1:
>
> arch/powerpc/platforms/powermac/udbg_scc.c:76:9: error: variable âxâ
> set but not used [-Werror=unused-but-set-variable]
On Thu, 2018-03-22 at 21:05:28 UTC, Mathieu Malaterre wrote:
> In commit 14baf4d9c739 ("cxl: Add guest-specific code") the following code
> was added:
>
> if (afu->crs_len < 0) {
> dev_err(&afu->dev, "Unexpected configuration record size
> value\n");
> return -EI
On Thu, 2018-03-22 at 20:20:02 UTC, Mathieu Malaterre wrote:
> The header `pmac.h` was not included, leading to the following warnings,
> treated as error with W=1:
>
> arch/powerpc/platforms/powermac/time.c:69:13: error: no previous prototype
> for âpmac_time_initâ [-Werror=missing-prototy
On Sun, 2018-03-11 at 08:16:47 UTC, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sun, 11 Mar 2018 09:03:42 +0100
>
> Add a jump target so that a bit of exception handling can be better reused
> at the end of this function.
>
> This issue was detected by using the Coccinelle software.
On Tue, 2016-11-22 at 09:20:09 UTC, Boqun Feng wrote:
> Currently, in xmon, there is no obvious way to get an address for a
> percpu symbol for a particular cpu. Having such an ability would be good
> for debugging the system when percpu variables got involved.
>
> Therefore, this patch introduces
Le 13/08/2018 à 11:48, Andrew Donnellan a écrit :
On 13/08/18 19:01, Christophe Lombard wrote:
From: Christophe Lombard
Your git committer email should probably match your sign-off email.
The AFU Information DVSEC capability is a means to extract common,
general information about all of
On 13/08/18 19:01, Christophe Lombard wrote:
From: Christophe Lombard
Your git committer email should probably match your sign-off email.
The AFU Information DVSEC capability is a means to extract common,
general information about all of the AFUs associated with a Function
independent of th
From: Christophe Lombard
The AFU Information DVSEC capability is a means to extract common,
general information about all of the AFUs associated with a Function
independent of the specific functionality that each AFU provides.
This patch fixes the access to the AFU Descriptor Data indexed by the
On a shared lpar, Phyp will not update the cpu associativity at boot
time. Just after the boot system does recognize itself as a shared lpar and
trigger a request for correct cpu associativity. But by then the scheduler
would have already created/destroyed its sched domains.
This causes
- Broken l
On Thu, Aug 09, 2018 at 06:27:43AM -0700, Srikar Dronamraju wrote:
> * Gautham R. Shenoy [2018-08-09 11:02:07]:
>
> >
> > int threads_per_core, threads_per_subcore, threads_shift;
> > +bool has_big_cores;
> > cpumask_t threads_core_mask;
> > EXPORT_SYMBOL_GPL(threads_per_core);
> > EXPORT_SY
61 matches
Mail list logo
