While the current kernel drivers/of/ code allows developers to be
sloppy and use a DTS status value of "ok", the current DTSpec 0.1
makes it clear that the proper spelling is "okay", so fix the small
number of PowerPC .dts files that do this.
Signed-off-by: Robert P. J. Day
---
diff --git a/ar
On 09/01/2017 04:34 AM, Michael Ellerman wrote:
> Haren Myneni writes:
>>> On Mon, Aug 28, 2017 at 7:25 PM, Michael Ellerman
>>> wrote:
Hi Haren,
Some comments inline ...
Haren Myneni writes:
> diff --git a/drivers/crypto/nx/nx-842-powernv.c
> b/drivers/cr
On Thu, 2015-10-29 at 11:44 +1100, Anton Blanchard wrote:
>
> +extern void msr_check_and_set(unsigned long bits);
> +extern bool strict_msr_control;
> +extern void __msr_check_and_clear(unsigned long bits);
> +static inline void msr_check_and_clear(unsigned long bits)
> +{
> + if (strict_ms
On Thu, 2015-10-29 at 11:43 +1100, Anton Blanchard wrote:
> mtmsrd_isync() will do an mtmsrd followed by an isync on older
> processors. On newer processors we avoid the isync via a feature fixup.
The isync is needed specifically when enabling/disable FP etc... right
?
I'd like to make the name a
On Thu, 2015-10-29 at 11:43 +1100, Anton Blanchard wrote:
> Move all our context switch SPR save and restore code into two
> helpers. We do a few optimisations:
To avoid confusion with other places where we might save and restore
SPRs for things like power management etc... can you name these
save
On 09/01/2017 04:29 AM, Michael Ellerman wrote:
> Hi Dan,
>
> Thanks for reviewing this series.
>
> Dan Streetman writes:
>> On Tue, Aug 29, 2017 at 5:54 PM, Haren Myneni
>> wrote:
>>> On 08/29/2017 02:23 PM, Benjamin Herrenschmidt wrote:
On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman w
On Fri, Sep 1, 2017 at 3:52 PM, Brijesh Singh wrote:
> Hi Boris,
>
> On 08/30/2017 12:46 PM, Borislav Petkov wrote:
>>
>> On Wed, Aug 30, 2017 at 11:18:42AM -0500, Brijesh Singh wrote:
>>>
>>> I was trying to avoid mixing early and no-early set_memory_decrypted()
>>> but if
>>> feedback is: use ea
Hi Boris,
On 08/30/2017 12:46 PM, Borislav Petkov wrote:
On Wed, Aug 30, 2017 at 11:18:42AM -0500, Brijesh Singh wrote:
I was trying to avoid mixing early and no-early set_memory_decrypted() but if
feedback is: use early_set_memory_decrypted() only if its required otherwise
use set_memory_decry
Older compilers think val may be used uninitialized:
arch/powerpc/lib/sstep.c: In function 'emulate_loadstore':
arch/powerpc/lib/sstep.c:2758:23: error: 'val' may be used uninitialized in
this function
We know better, but initialise val to 0 to avoid breaking the build.
Signed-off-by: Micha
On 09/01/2017 08:53 PM, Sandipan Das wrote:
Take advantage of stack_depth tracking, originally introduced for
x64, in powerpc JIT as well. Round up allocated stack by 16 bytes
to make sure it stays aligned for functions called from JITed bpf
program.
Signed-off-by: Sandipan Das
Awesome, thank
On 2017/09/02 12:23AM, Sandipan Das wrote:
> Take advantage of stack_depth tracking, originally introduced for
> x64, in powerpc JIT as well. Round up allocated stack by 16 bytes
> to make sure it stays aligned for functions called from JITed bpf
> program.
>
> Signed-off-by: Sandipan Das
> ---
Take advantage of stack_depth tracking, originally introduced for
x64, in powerpc JIT as well. Round up allocated stack by 16 bytes
to make sure it stays aligned for functions called from JITed bpf
program.
Signed-off-by: Sandipan Das
---
arch/powerpc/net/bpf_jit64.h | 7 ---
arch/powe
From: Jérôme Glisse
(Note that this is 4.15 material or 4.14 if people are extra confident. I
am posting now to get people to test. To that effect maybe it would be a
good idea to have that patch sit in linux-next for a while for testing.
Other motivation is that the problem is fresh in every
powerpc/vphn: On Power systems with shared configurations of CPUs
and memory, there are some issues with the association of additional
CPUs and memory to nodes when hot-adding resources. This patch
fixes an end-of-updates processing problem observed occasionally
in numa_update_cpu_topology().
Sig
powerpc/hotplug: On Power systems with shared configurations of CPUs
and memory, there are some issues with the association of additional
CPUs and memory to nodes when hot-adding resources. During hotplug
CPU operations, this patch resets the timer on topology update work
function to a small value
powerpc/vphn: On Power systems with shared configurations of CPUs
and memory, there are some issues with the association of additional
CPUs and memory to nodes when hot-adding resources. This patch
updates the initialization checks to independently recognize PRRN
or VPHN support.
Signed-off-by: M
powerpc/vphn: On Power systems with shared configurations of CPUs
and memory, there are some issues with the association of additional
CPUs and memory to nodes when hot-adding resources. This patch
corrects the currently broken capability to set the topology for
shared CPUs in LPARs. At boot time
powerpc/numa: On Power systems with shared configurations of CPUs
and memory, there are some issues with the association of additional
CPUs and memory to nodes when hot-adding resources. This patch
addresses some of those problems.
First, it corrects the currently broken capability to set the
top
> Series applied to powerpc next, thanks.
Thanks for another positive feedback.
But I wonder how you can refer to the “series” when the forth update step
“Delete an unnecessary variable initialisation” contained a broken suggestion.
> https://git.kernel.org/powerpc/c/a1bddf3991573f3dff2762bfca5
On 09/01/2017 01:53 AM, Bharata B Rao wrote:
> On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote:
>> For a PowerKVM guest, it is possible to specify a DIMM device in
>> addition to the system RAM at boot time. When such a cold plugged DIMM
>> device is removed from a radix guest, we hit
On Thu, 2017-08-31 at 07:11:29 UTC, Haren Myneni wrote:
> Rename nx842_powernv_function to nx842_powernv_exec.
> nx842_powernv_exec points to nx842_exec_icswx and
> will be point to VAS exec function which will be added later
> for P9 NX support.
>
> Signed-off-by: Haren Myneni
Series applied to
On Wed, 2017-08-30 at 16:48:20 UTC, Arvind Yadav wrote:
> platform_suspend_ops are not supposed to change at runtime.
> Functions suspend_set_ops working with const platform_suspend_ops.
> So mark the non-const structs as const.
>
> Signed-off-by: Arvind Yadav
Applied to powerpc next, thanks.
h
On Thu, 2017-08-24 at 10:49:57 UTC, Michael Ellerman wrote:
> Anton noticed that if we fault part way through emulating an unaligned
> instruction, we don't update the DAR to reflect that.
>
> The DAR value is eventually reported back to userspace as the address
> in the SEGV signal, and if usersp
On Wed, 2017-08-30 at 04:12:24 UTC, Paul Mackerras wrote:
> The instruction code for xxlor that commit 0016a4cf5582 ("powerpc:
> Emulate most Book I instructions in emulate_step()", 2010-06-15)
> added is actually the code for xxlnor. It is used in get_vsr()
> and put_vsr() and the effect of the e
On Wed, 2017-08-23 at 17:18:43 UTC, John Allen wrote:
> Check if an LMB is assigned before attempting to call dlpar_acquire_drc in
> order to avoid any unnecessary rtas calls. This substantially reduces the
> running time of memory hot add on lpars with large amounts of memory.
>
> Signed-off-by:
On Wed, 2017-08-23 at 14:54:32 UTC, Christophe Leroy wrote:
> Commit 694fc88ce271f ("powerpc/string: Implement optimized
> memset variants") added memset16(), memset32() and memset64()
> for the 64 bits PPC.
>
> On 32 bits, memset64() is not relevant, and as shown below,
> the generic version of m
On Fri, 2017-08-11 at 06:22:56 UTC, Alistair Popple wrote:
> The nest mmu tlb flush needs to happen before the GPU translation shootdown
> is launched to avoid the GPU refilling its tlb with stale nmmu translations
> prior to the nmmu flush completing.
>
> Signed-off-by: Alistair Popple
> Cc: sta
On Fri, 2017-08-04 at 14:46:51 UTC, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Fri, 4 Aug 2017 16:37:56 +0200
>
> Omit an extra message for a memory allocation failure in these functions.
>
> This issue was detected by using the Coccinelle software.
>
> Link:
> http://events.linux
On Thu, 2017-08-03 at 19:12:50 UTC, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Thu, 3 Aug 2017 19:49:18 +0200
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
>
> Link:
> http://events.linuxfo
On Wed, 2017-08-02 at 21:01:45 UTC, Julia Lawall wrote:
> The wf_sensor_ops structures are only stored in the ops field of a
> wf_sensor structure, which is declared as const. Thus the
> wf_sensor_ops structures themselves can be const.
>
> Done with the help of Coccinelle.
>
> //
> @r disable
On Tue, 2017-07-18 at 21:43:12 UTC, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: Benjamin Herrenschmidt
On Tue, 2017-07-18 at 21:43:07 UTC, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: "David S. Miller"
> Cc
On Thu, 2017-06-29 at 07:12:53 UTC, Oliver O'Halloran wrote:
> When building the CPU scheduler topology the kernel uses the ibm,chipid
> property from the devicetree to group logical CPUs. Currently the DT
> search for this property is open-coded in smp.c and this functionality
> is a duplication o
On Sun, 2017-05-07 at 14:38:36 UTC, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sun, 7 May 2017 16:32:04 +0200
>
> Two single characters (line breaks) should be put into a sequence.
> Thus use the corresponding function "seq_putc".
>
> This issue was detected by using the Coccinelle
On Sat, 2016-10-29 at 19:37:02 UTC, Julia Lawall wrote:
> Use DEVICE_ATTR_RW for read-write attributes. This simplifies the
> source code, improves readbility, and reduces the chance of
> inconsistencies.
>
> The semantic patch that makes this change is as follows:
> (http://coccinelle.lip6.fr/)
Haren Myneni writes:
>> On Mon, Aug 28, 2017 at 7:25 PM, Michael Ellerman
>> wrote:
>>> Hi Haren,
>>>
>>> Some comments inline ...
>>>
>>> Haren Myneni writes:
>>>
diff --git a/drivers/crypto/nx/nx-842-powernv.c
b/drivers/crypto/nx/nx-842-powernv.c
index c0dd4c7e17d3..13089a0b9d
Hi Ard,
> If we are all in agreement that fixing X is not an option, I think
> this is a reasonable approach
This did come up in discussion at some earlier point in one of the many
spins we've done of this - I don't remember if you brought it up or
someone else did - but my concern was this: If i
I am trying to debug a Machine Check for a P2010 (e500v2) CPU:
[ 28.111816] Caused by (from MCSR=10008): Bus - Read Data Bus Error
[ 28.117998] Oops: Machine check, sig: 7 [#1]
[ 28.122263] P1010 RDB
[ 28.124529] Modules linked in: linux_bcm_knet(PO) linux_user_bde(PO)
linux_kernel_bde(PO
Hi Dan,
Thanks for reviewing this series.
Dan Streetman writes:
> On Tue, Aug 29, 2017 at 5:54 PM, Haren Myneni
> wrote:
>> On 08/29/2017 02:23 PM, Benjamin Herrenschmidt wrote:
>>> On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman wrote:
> +
> + ret = -EINVAL;
> + if (c
On Fri, 1 Sep 2017 15:38:59 +0530
Akshay Adiga wrote:
> On 08/31/2017 05:37 PM, Nicholas Piggin wrote:
> > On Thu, 31 Aug 2017 17:17:41 +0530
> > "Gautham R. Shenoy" wrote:
> >
> > > From: "Gautham R. Shenoy"
> > >
> > > commit 24be85a23d1f ("powerpc/powernv: Clear PECE1 in LPCR via
> > > sto
On Tue, Aug 29, 2017 at 07:18:02PM -0300, Jose Ricardo Ziviani wrote:
> This patch provides the MMIO load/store vector indexed
> X-Form emulation.
>
> Instructions implemented: lvx, stvx
>
> Signed-off-by: Jose Ricardo Ziviani
Thanks for the patch. The basic outline of it looks fine. The part
Hi Michael,
Thanks for trying to reduce this down to the minimum required.
But ...
Michael Bringmann writes:
> powerpc/numa: On Power systems with shared configurations of CPUs
> and memory, there are some issues with the association of additional
> CPUs and memory to nodes when hot-adding reso
On 08/31/2017 05:37 PM, Nicholas Piggin wrote:
On Thu, 31 Aug 2017 17:17:41 +0530
"Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy"
>
> commit 24be85a23d1f ("powerpc/powernv: Clear PECE1 in LPCR via
> stop-api only on Hotplug") clears the PECE1 bit of the LPCR via
> stop-api during CPU-H
Nicholas Piggin writes:
> On Wed, 30 Aug 2017 21:25:59 +1000
> Michael Ellerman wrote:
>
>> Nicholas Piggin writes:
>>
>> > When stop is executed with EC=ESL=0, it appears to execute like a
>> > normal instruction (resuming from NIP when woken by interrupt).
>> > So all the save/restore handli
On 1 September 2017 at 08:27, Daniel Axtens wrote:
> This patch set:
>
> - splits the default display handling out from VGA arbiter, into its
>own file and behind its own Kconfig option (and gives the functions
>better names).
>
> - adds extra detection of default devices. To be nominate
On 31/08/2017 20:06, Sukadev Bhattiprolu wrote:
felix [fe...@linux.vnet.ibm.com] wrote:
On 31/08/2017 01:32, Sukadev Bhattiprolu wrote:
Michael Neuling [mi...@neuling.org] wrote:
Suka,
Please CC Christophe who as an alternative way of doing this. We ned to get
agreement across all users of TI
We have refactored and extended this - document it.
Signed-off-by: Daniel Axtens
---
Documentation/gpu/default_display.rst | 93 +++
Documentation/gpu/index.rst | 1 +
2 files changed, 94 insertions(+)
create mode 100644 Documentation/gpu/default_displ
The VGA arbiter selects a default VGA device that is enabled and
reachable via the legacy VGA resources (mem 0xa-0xb, io
0x3b0-0x3bb, io 0x3c0-0x3df, etc).
(As a special case for x86 and IA64, this can be overridden by
EFI.)
If there is no such device, e.g., because there's no enabled VGA
Split the small bit of code that does default VGA handling out from
the arbiter. Add a Kconfig option to allow the kernel to be built
with just the default handling, or the arbiter and default handling.
While doing this, rename the functions from vga_(set_)default_device
to pci_(set_)default_displ
This patch set:
- splits the default display handling out from VGA arbiter, into its
own file and behind its own Kconfig option (and gives the functions
better names).
- adds extra detection of default devices. To be nominated, the vga
arbiter and platform hooks must not have nominated
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