On 2017/01/31 07:43AM, Michael Ellerman wrote:
> Anju T Sudhakar writes:
>
> > Detour buffer contains instructions to create an in memory pt_regs.
> > After the execution of the pre-handler, a call is made for instruction
> > emulation.
> > The NIP is determined in advanced through dummy instruc
On Wed, Jan 11, 2017 at 11:50:05AM +1100, Gavin Shan wrote:
>This series fixes couple issues or improves its reliability:
>
> * The PDC event is never detected inside the IRQ handler in surprise
> hot-add path.
> * The slot's initial state should be REGISTERED state if it's emtpy.
> Oth
On Tue, Jan 31, 2017 at 04:01:05PM +1100, Gavin Shan wrote:
>On Tue, Jan 31, 2017 at 08:11:39AM +1100, Michael Ellerman wrote:
>>Gavin Shan writes:
>>
>>I'd like to see some test results from multi-node systems.
>>
>>I'd also like to understand what has changed since we changed
>>RECLAIM_DISTANCE
On Tue, Jan 31, 2017 at 03:58:16PM +1100, Anton Blanchard wrote:
>Hi,
>
>
>> Anton, I think the behaviour looks good. Actually, it's not very
>> relevant to the issue addressed by the patch. I will reply to
>> Michael's reply about the reason. There are two nodes in your system
>> and the memory is
On Mon, Jan 30, 2017 at 04:57:23PM -0600, Sergio Valverde wrote:
> From: Sergio Valverde
>
> An extra "init.h" include is found in the HVC console code.
>
> While the code works as it is right now, it is a defect nevertheless.
> As such, the extra line is deleted.
It's not a "defect" as it's no
On Tue, Jan 31, 2017 at 08:11:39AM +1100, Michael Ellerman wrote:
>Gavin Shan writes:
>
>I'd like to see some test results from multi-node systems.
>
>I'd also like to understand what has changed since we changed
>RECLAIM_DISTANCE in the first place, ie. why did it used to work and now
>doesn't?
>
Hi,
> Anton, I think the behaviour looks good. Actually, it's not very
> relevant to the issue addressed by the patch. I will reply to
> Michael's reply about the reason. There are two nodes in your system
> and the memory is expected to be allocated from node-0. If node-0
> doesn't have enough f
On Mon, Jan 30, 2017 at 12:02:40PM +1100, Anton Blanchard wrote:
>Hi,
>
>> Anton suggested that NUMA distances in powerpc mattered and hurted
>> performance without this setting. We need to validate to see if this
>> is still true. A simple way to start would be benchmarking
>
>The original issue w
The following error message was observed. It's complaining M32
memory window is missed on virtual PHB, which is a bit confusing.
The problem is the memory windows are never updated from its
device-tree node.
PCI: Memory resource 0 not set for host bridge \
/pciex@3fffe4000/pci@0/device@0
Christian Kujau writes:
> On Mon, 16 Jan 2017, Christophe Leroy wrote:
>> Since 2005, powerpc GCC doesn't manage anymore __stack_chk_guard as
>> a global variable but as some value located at -0x7008(r2)
>
> Is this still an "RFC" or is there a chance that this will land in 4.10?
No. I've revert
Michael Bringmann writes:
> hotplug_init: Simplify the code needed for runtime memory hotplug and
> maintenance with a conversion routine that transforms the compressed
> property "ibm,dynamic-memory-v2" to the form of "ibm,dynamic-memory"
> within the "ibm,dynamic-reconfiguration-memory" propert
tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git test
head: 675b1ff3778df243879ed2c58dfa80aeb1f9bf03
commit: ad581fb0a5d8a5a505a85e03a87ef14b8defa072 [26/49] powerpc/kprobes:
Implement Optprobes
config: powerpc-maple_defconfig (attached as .config)
compiler: powerpc64-li
On Mon, Jan 30, 2017 at 04:12:53PM -0800, Christian Kujau wrote:
> On Mon, 16 Jan 2017, Christophe Leroy wrote:
> > Since 2005, powerpc GCC doesn't manage anymore __stack_chk_guard as
> > a global variable but as some value located at -0x7008(r2)
>
> Is this still an "RFC" or is there a chance tha
On Mon, 16 Jan 2017, Christophe Leroy wrote:
> Since 2005, powerpc GCC doesn't manage anymore __stack_chk_guard as
> a global variable but as some value located at -0x7008(r2)
Is this still an "RFC" or is there a chance that this will land in 4.10?
Thanks,
Christian.
> In the Linux kernel, r2 is
From: Sergio Valverde
An extra "init.h" include is found in the HVC console code.
While the code works as it is right now, it is a defect nevertheless.
As such, the extra line is deleted.
Signed-off-by: Sergio Valverde
---
drivers/tty/hvc/hvc_console.c | 1 -
1 file changed, 1 deletion(-)
di
tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git test
head: 675b1ff3778df243879ed2c58dfa80aeb1f9bf03
commit: ad581fb0a5d8a5a505a85e03a87ef14b8defa072 [26/49] powerpc/kprobes:
Implement Optprobes
config: powerpc-allmodconfig (attached as .config)
compiler: powerpc64-linux
On Tue, 31 Jan, at 08:24:53AM, Michael Ellerman wrote:
>
> I'm hitting this on multiple powerpc systems:
>
> [ 38.339126] rq->clock_update_flags < RQCF_ACT_SKIP
> [ 38.339134] [ cut here ]
> [ 38.339142] WARNING: CPU: 2 PID: 1 at kernel/sched/sched.h:804
> detach_ta
tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git test
head: 675b1ff3778df243879ed2c58dfa80aeb1f9bf03
commit: c500c7698377f9cd34f676372762513704b4c79d [36/49] powerpc: A new cache
geometry aux vectors
config: powerpc-lite5200b_defconfig (attached as .config)
compiler: pow
Reza Arbab writes:
> On Mon, Jan 30, 2017 at 07:38:18PM +1100, Michael Ellerman wrote:
>>Doesn't build.
>>
>>In file included from ../include/linux/kernel.h:13:0,
>> from ../include/linux/sched.h:17,
>> from ../arch/powerpc/mm/pgtable-radix.c:11:
>>../arch/powerpc/
On Tue, 2017-01-31 at 07:27 +1100, Michael Ellerman wrote:
> Will need some more macro foo.
That or make ppc64_caches ppc_caches, and make it common...
I'll look into it.
Cheers,
Ben.
10
[ 38.339142] Modules linked in: fuse pseries_rng rng_core vmx_crypto ib_iser
rdma_cm iw_cm ib_cm ib_core libiscsi scsi_transport_iscsi autofs4 btrfs raid456
async_raid6_recov async_memcpy async_pq async_xor async_tx xor raid6_pq
libcrc32c multipath raid10
[ 38.339162] CPU: 2 PID: 1 Comm: systemd
Paul Mackerras writes:
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index cfa53cc..94323c4 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -401,6 +401,8 @@ void __init radix__early_init_mmu(void)
> mts
Gavin Shan writes:
> On Mon, Jan 30, 2017 at 12:02:40PM +1100, Anton Blanchard wrote:
>>> Anton suggested that NUMA distances in powerpc mattered and hurted
>>> performance without this setting. We need to validate to see if this
>>> is still true. A simple way to start would be benchmarking
>>
>
On Tue, Jan 31, 2017 at 07:58:57AM +1100, Michael Ellerman wrote:
> Paul Mackerras writes:
>
> > This adds the code to construct the second-level ("partition-scoped" in
> > architecturese) page tables for guests using the radix MMU. Apart from
> > the PGD level, which is allocated when the guest
Paul Mackerras writes:
> This adds the code to construct the second-level ("partition-scoped" in
> architecturese) page tables for guests using the radix MMU. Apart from
> the PGD level, which is allocated when the guest is created, the rest
> of the tree is all constructed in response to hyperv
Anju T Sudhakar writes:
> Detour buffer contains instructions to create an in memory pt_regs.
> After the execution of the pre-handler, a call is made for instruction
> emulation.
> The NIP is determined in advanced through dummy instruction emulation and a
> branch
> instruction is created to
On 01/29/2017 08:32 PM, Michael Ellerman wrote:
> Tyrel Datwyler writes:
>
>> On 01/27/2017 01:03 AM, Michal Suchanek wrote:
>>> On 27 January 2017 at 02:50, Benjamin Herrenschmidt
>>> wrote:
On Thu, 2017-01-26 at 17:42 -0800, Tyrel Datwyler wrote:
> On 01/26/2017 12:22 PM, Michal Suchá
Benjamin Herrenschmidt writes:
> diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
> index 730c27e..a128836 100644
> --- a/arch/powerpc/include/asm/elf.h
> +++ b/arch/powerpc/include/asm/elf.h
> @@ -156,6 +163,14 @@ do {
On 01/30/2017 10:14 PM, Hari Bathini wrote:
> In case of fadump, capture (fadump) kernel boots like a normal kernel.
> While this has its advantages, the capture kernel would initialize all
> the components like normal kernel, which may not necessarily be needed
> for a typical dump capture kernel.
On Wed, Jan 25, 2017 at 02:06:29PM +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Document the device-tree bindings defining the the properties under
> the @power-mgt node in the device tree that describe the idle states
> for Linux running on baremetal POWER servers.
>
> These
On Mon, Jan 30, 2017 at 07:38:18PM +1100, Michael Ellerman wrote:
Doesn't build.
In file included from ../include/linux/kernel.h:13:0,
from ../include/linux/sched.h:17,
from ../arch/powerpc/mm/pgtable-radix.c:11:
../arch/powerpc/mm/pgtable-radix.c: In function ‘cr
In case of fadump, capture (fadump) kernel boots like a normal kernel.
While this has its advantages, the capture kernel would initialize all
the components like normal kernel, which may not necessarily be needed
for a typical dump capture kernel. So, fadump capture kernel ends up
needing more memo
Update documentation about introduction of handover area that includes
configuration details like extra parameters to append to capture
kernel.
Signed-off-by: Hari Bathini
---
Documentation/powerpc/firmware-assisted-dump.txt | 83 ++
1 file changed, 53 insertions(+), 30 del
In case of fadump, capture (fadump) kernel boots like a normal kernel.
While this has its advantages, the capture kernel would initialize all
the components like normal kernel, which may not necessarily be needed
for a typical dump capture kernel. So, fadump capture kernel ends up
needing more memo
With radix, we can get page fault with DSISR_PROTFAULT value set in case of
PROT_NONE or autonuma mapping. The PROT_NONE case in handled by the vma check
where we consider the access bad. For autonuma we should fall through and fixup
the access mask correctly.
Without this patch we trigger the WAR
On 01/26/2017 11:06 AM, Robert Richter wrote:
> On 26.01.17 10:46:43, William Cohen wrote:
>> From 7e46dbd7dc5bc941926a4a63c28ccebf46493e8d Mon Sep 17 00:00:00 2001
>> From: William Cohen
>> Date: Thu, 26 Jan 2017 10:33:59 -0500
>> Subject: [PATCH] Avoid hypthetical string truncation in oprofile s
From: Tyrel Datwyler
> Sent: 27 January 2017 18:03
> On 01/26/2017 05:50 PM, Benjamin Herrenschmidt wrote:
> > On Thu, 2017-01-26 at 17:42 -0800, Tyrel Datwyler wrote:
> >> On 01/26/2017 12:22 PM, Michal Suchnek wrote:
> >>> Hello,
> >>>
> >>> building ibmvtpm I noticed gcc warning complaining that
On Fri, Jan 20, 2017 at 01:04:03PM -0800, Bart Van Assche wrote:
> Now that all set_dma_ops() implementations are identical (ignoring
> BUG_ON() statements), remove the architecture specific definitions
> and add a definition in .
>
> Signed-off-by: Bart Van Assche
> Cc: Benjamin Herrenschmidt
>
On 2017-01-27 14:14:49 Fri, Paul Mackerras wrote:
> On Wed, Jan 18, 2017 at 11:19:26AM +0530, Mahesh Jagannath Salgaonkar wrote:
> > On 01/16/2017 10:05 AM, Paul Mackerras wrote:
> > > On Fri, Jan 13, 2017 at 04:51:45PM +0530, Aravinda Prasad wrote:
>
> [snip]
>
> > >> case BOOK3S_INTERR
PM_INST_CMPL may not provide right counts in all
sampling scenarios in power9 DD1, instead use PM_INST_DISP.
Patch also update generic instruction sampling with the same.
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-pmu.c | 55 ++
1 file
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-pmu.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c
index 7332634e18c9..b38acff8a791 100644
--- a/arch/powerpc/perf/power9-pmu.c
+++ b/arch/powe
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-events-list.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/perf/power9-events-list.h
b/arch/powerpc/perf/power9-events-list.h
index 929b56d47ad9..8210b0d5bcd1 100644
--- a/arch/powerpc/perf/power9-events-list.
PMC5 on POWER9 DD1 may not provide right counts in all
sampling scenarios, hence use PM_INST_DISP event instead
in PMC2 or PMC3 in preference.
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/isa207-common.h | 4
arch/powerpc/perf/power9-pmu.c| 2 +-
2 files changed, 5 insertion
Factor out the power8 event_alternative function to share
the code with power9.
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/isa207-common.c | 36
arch/powerpc/perf/isa207-common.h | 3 +++
arch/powerpc/perf/power8-pmu.c| 35 ++---
On Mon, Jan 30, 2017 at 10:17:50PM +1100, Michael Ellerman wrote:
> "Rafael J. Wysocki" writes:
>
> > On Mon, Jan 30, 2017 at 4:47 AM, Michael Ellerman
> > wrote:
> >> "Gautham R. Shenoy" writes:
> >>
> >>> From: "Gautham R. Shenoy"
> >>>
> >>> In the current code for powernv_add_idle_states,
On Wed, 2017-01-25 at 15:54:33 UTC, Reza Arbab wrote:
> When setting a 2M pte, radix__map_kernel_page() is using the address
>
> ptep = (pte_t *)pudp;
>
> Fix this conversion to use pmdp instead. Use pmdp_ptep() to do this
> instead of casting the pointer.
>
> Signed-off-by: Reza Arbab
A
"Rafael J. Wysocki" writes:
> On Mon, Jan 30, 2017 at 4:47 AM, Michael Ellerman wrote:
>> "Gautham R. Shenoy" writes:
>>
>>> From: "Gautham R. Shenoy"
>>>
>>> In the current code for powernv_add_idle_states, there is a lot of code
>>> duplication while initializing an idle state in powernv_sta
This adds a few last pieces of the support for radix guests:
* Implement the backends for the KVM_PPC_CONFIGURE_V3_MMU and
KVM_PPC_GET_RMMU_INFO ioctls for radix guests
* On POWER9, allow secondary threads to be on/off-lined while guests
are running.
* Set up LPCR and the partition table ent
On POWER9 DD1, we need to invalidate the ERAT (effective to real
address translation cache) when changing the PIDR register, which
we do as part of guest entry and exit.
Signed-off-by: Paul Mackerras
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 6 ++
1 file changed, 6 insertions(+)
diff --
If we allow LPCR[AIL] to be set for radix guests, then interrupts from
the guest to the host can be delivered by the hardware with relocation
on, and thus the code path starting at kvmppc_interrupt_hv can be
executed in virtual mode (MMU on) for radix guests (previously it was
only ever executed in
With radix, the guest can do TLB invalidations itself using the tlbie
(global) and tlbiel (local) TLB invalidation instructions. Linux guests
use local TLB invalidations for translations that have only ever been
accessed on one vcpu. However, that doesn't mean that the translations
have only been
If the guest is in radix mode, then it doesn't have a hashed page
table (HPT), so all of the hypercalls that manipulate the HPT can't
work and should return an error. This adds checks to make them
return H_FUNCTION ("function not supported").
Signed-off-by: Paul Mackerras
---
arch/powerpc/kvm/b
This adds code to keep track of dirty pages when requested (that is,
when memslot->dirty_bitmap is non-NULL) for radix guests. We use the
dirty bits in the PTEs in the second-level (partition-scoped) page
tables, together with a bitmap of pages that were dirty when their
PTE was invalidated (e.g.,
This adapts our implementations of the MMU notifier callbacks
(unmap_hva, unmap_hva_range, age_hva, test_age_hva, set_spte_hva)
to call radix functions when the guest is using radix. These
implementations are much simpler than for HPT guests because we
have only one PTE to deal with, so we don't n
This adds the code to construct the second-level ("partition-scoped" in
architecturese) page tables for guests using the radix MMU. Apart from
the PGD level, which is allocated when the guest is created, the rest
of the tree is all constructed in response to hypervisor page faults.
As well as hyp
This adds code to branch around the parts that radix guests don't
need - clearing and loading the SLB with the guest SLB contents,
saving the guest SLB contents on exit, and restoring the host SLB
contents.
Since the host is now using radix, we need to save and restore the
host value for the PID
This adds a field in struct kvm_arch and an inline helper to
indicate whether a guest is a radix guest or not, plus a new file
to contain the radix MMU code, which currently contains just a
translate function which knows how to traverse the guest page
tables to translate an address.
Signed-off-by:
POWER9 adds a register called ASDR (Access Segment Descriptor
Register), which is set by hypervisor data/instruction storage
interrupts to contain the segment descriptor for the address
being accessed, assuming the guest is using HPT translation.
(For radix guests, it contains the guest real addres
This adds the implementation of the KVM_PPC_CONFIGURE_V3_MMU ioctl
for HPT guests on POWER9. With this, we can return 1 for the
KVM_CAP_PPC_MMU_HASH_V3 capability.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/kvm/book3s_hv.c| 35
This adds two capabilities and two ioctls to allow userspace to
find out about and configure the POWER9 MMU in a guest. The two
capabilities tell userspace whether KVM can support a guest using
the radix MMU, or using the hashed page table (HPT) MMU with a
process table and segment tables. (Note
With host and guest both using radix translation, it is feasible
for the host to take interrupts that come from the guest with
relocation on, and that is in fact what the POWER9 hardware will
do when LPCR[AIL] = 3. All such interrupts use HSRR0/1 not SRR0/1
except for system call with LEV=1 (hcall
When changing a partition table entry on POWER9, we do a particular
form of the tlbie instruction which flushes all TLBs and caches of
the partition table for a given logical partition ID (LPID).
This instruction has a field in the instruction word, labelled R
(radix), which should be 1 if the part
This exports the pgtable_cache array and the pgtable_cache_add
function so that HV KVM can use them for allocating radix page
tables for guests.
Signed-off-by: Paul Mackerras
---
arch/powerpc/mm/init-common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/i
This adds definitions for bits in the DSISR register which are used
by POWER9 for various translation-related exception conditions, and
for some more bits in the partition table entry that will be needed
by KVM.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/book3s/64/mmu.h | 12
To use radix as a guest, we first need to tell the hypervisor via
the ibm,client-architecture call first that we support POWER9 and
architecture v3.00, and that we can do either radix or hash and
that we would like to choose later using an hcall (the
H_REGISTER_PROC_TBL hcall).
Then we need to che
This fixes the byte index values for some of the option bits in
the "ibm,architectur-vec-5" property. The "platform facilities options"
bits are in byte 17 not byte 14, so the upper 8 bits of their
definitions need to be 0x11 not 0x0E. The "sub processor support" option
is in byte 21 not byte 15.
Currently, if the kernel is running on a POWER9 processor under a
hypervisor, it will try to use the radix MMU even though it doesn't
have the necessary code to use radix under a hypervisor (it doesn't
negotiate use of radix, and it doesn't do the H_REGISTER_PROC_TBL
hcall). The result is that the
The primary purpose of this patch series is to make it possible to run
a guest on POWER9 using the radix MMU under a KVM host that also uses
the radix MMU. To do this, the guest needs to say that it supports
radix in the ibm,client-architecture-support vector, and if the host
agrees, the guest the
y
> >> particular order, leading to merge conflicts when adding items at the end.
> >>
> >> Sort them alphabetically.
> >
> > Excellent, thanks.
> >
> >> Suggested-by: Michael Ellerman
> >> Signed-off-by: Andrew Donnellan
> >>
hem alphabetically.
>
> Excellent, thanks.
>
>> Suggested-by: Michael Ellerman
>> Signed-off-by: Andrew Donnellan
>> ---
>>
>> On top of linux-next 20170130
>
> Probably best done on top of powerpc-next and I can cope with the
> conflicts one
; Suggested-by: Michael Ellerman
> Signed-off-by: Andrew Donnellan
> ---
>
> On top of linux-next 20170130
Probably best done on top of powerpc-next and I can cope with the
conflicts one more time.
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 689cf9218b21.
config PPC has a lot of selects under it. They're not sorted in any
particular order, leading to merge conflicts when adding items at the end.
Sort them alphabetically.
Suggested-by: Michael Ellerman
Signed-off-by: Andrew Donnellan
---
On top of linux-next 20170130
---
arch/powerpc/Kc
Reza Arbab writes:
> diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
> index 623a0dc..2ce1354 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -107,54 +107,66 @@ int radix__map_kernel_page(unsigned long ea, unsigned
> long
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