From: Larry Finger
This patch has been added to the 3.12 stable tree. If you have any
objections, please let us know.
===
commit 8ae679c4bc2ea2d16d92620da8e3e9332fa4039f upstream.
I am getting the following warning when I build kernel 4.9-git on my
PowerBook G4 with a 32-bit PPC pr
On Thu, 2017-01-26 at 18:05 +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2017-01-25 at 09:24 +0530, Balbir Singh wrote:
> > That makes sense. We then wait for the right gcc version? I guess
> > we
> > also
> > push for per-task gaurd value as opposed to a global one?
>
> I'm thinking per-cpu wil
On Wed, 2017-01-25 at 09:24 +0530, Balbir Singh wrote:
> That makes sense. We then wait for the right gcc version? I guess we
> also
> push for per-task gaurd value as opposed to a global one?
I'm thinking per-cpu will be easier as r13 is readily available as
PACA.
Cheers,
Ben.
From: Thomas Falcon
Date: Wed, 25 Jan 2017 15:02:20 -0600
> In the current driver, the MTU is set to the maximum value
> capable for the backing device. This patch sets the MTU to the
> default value for a Linux net device.
Why are you doing this?
What happens to users who depend upon the curre
From: Thomas Falcon
Date: Wed, 25 Jan 2017 15:02:19 -0600
> Move most interrupt handler processing into a tasklet, and
> introduce a delay after re-enabling interrupts to fix timing
> issues encountered in hardware testing.
>
> Signed-off-by: Thomas Falcon
I don't think you have any idea what
Define interfaces (wrappers) to the 'copy' and 'paste' instructions
(which are new in PowerISA 3.0). These are intended to be used to
by NX driver(s) to submit Coprocessor Request Blocks (CRBs) to the
NX hardware engines.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 1
Define the vas_rx_win_open() interface. This interface is intended to be
used by the Nest Accelerator (NX) driver(s) to setup receive windows for
one or more NX engines (which implement compression/encryption algorithms
in the hardware).
Follow-on patches will provide an interface to close the win
Define helpers to allocate/free VAS window objects. These will
be used in follow-on patches when opening/closing windows.
Signed-off-by: Sukadev Bhattiprolu
---
drivers/misc/vas/vas-window.c | 72 ++-
1 file changed, 71 insertions(+), 1 deletion(-)
diff -
Define helpers to initialize window context registers of the VAS
hardware. These will be used in follow-on patches when opening/closing
VAS windows.
Signed-off-by: Sukadev Bhattiprolu
---
drivers/misc/vas/vas-internal.h | 56 +++
drivers/misc/vas/vas-window.c | 330 +++
Define the vas_win_close() interface which should be used to close a
send or receive windows.
While the hardware configurations required to open send and receive windows
differ, the configuration to close a window is the same for both. So we use
a single interface to close the window.
Signed-off-
Define an interface to open a VAS send window. This interface is
intended to be used the Nest Accelerator (NX) driver(s) to open
a send window and use it to submit compression/encryption requests
to a VAS receive window.
The receive window, identified by the [node, chip, cop] parameters,
must alre
On Sun, Jan 22, 2017 at 9:34 PM, Bhupesh Sharma wrote:
> I was recently looking at ways to extend the randomization range for a
> ASLR elf on a PPC64LE system.
>
> I basically have been using 28-bits of randomization on x86_64 for an
> ASLR elf using appropriate ARCH_MMAP_RND_BITS_MIN and
> ARCH_M
Define macros for the VAS hardware registers and bit-fields as well
as couple of data structures needed by the VAS driver.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v2]
- Add an overview of VAS in vas-internal.h
- Get window context parameters from device tree and drop
Define some helper functions to access the MMIO regions. We use these
in a follow-on patches to read/write VAS hardware registers. These
helpers are also used to later issue 'paste' instructions to submit
requests to the NX hardware engines.
Signed-off-by: Sukadev Bhattiprolu
Changelog [v2]:
Power9 introduces a hardware subsystem referred to as the Virtual
Accelerator Switchboard (VAS). VAS allows kernel subsystems and user
space processes to directly access the Nest Accelerator (NX) engines
which implement compression and encryption algorithms in the hardware.
NX has been in Power pr
Implement vas_init() and vas_exit() functions for a new VAS module.
This VAS module is essentially a library for other device drivers
and kernel users of the NX coprocessors like NX-842 and NX-GZIP.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v2]:
- Get HVWC, UWC and window address p
Move the GET_FIELD and SET_FIELD macros to vas.h as VAS and other
users of VAS, including NX-842 can use those macros.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/include/asm/vas.h | 8
drivers/crypto/nx/nx-842-powernv.c | 1 +
drivers/crypto/nx/nx-842.h | 5 -
3
Hi,
gcc trunk has failed to build PowerPC64 kernels for a month or so. The issue
is in oprofile, which is common code but ends up being sucked into
arch/powerpc and therefore subject to the -Werror applied to arch/powerpc:
linux/arch/powerpc/oprofile/../../../drivers/oprofile/oprofile_stats.c: I
Initialize this completion structure before requesting that
a buffer be long-term mapped . This fix resolves a bug where firmware
sends a response before the structure is initialized.
Signed-off-by: John Allen
Signed-off-by: Nathan Fontenot
Signed-off-by: Thomas Falcon
---
drivers/net/ethernet
Error reports received from firmware were not being converted from
big endian values, leading to bogus error codes reported on little
endian systems.
Signed-off-by: Thomas Falcon
---
drivers/net/ethernet/ibm/ibmvnic.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/dr
In the current driver, the MTU is set to the maximum value
capable for the backing device. This patch sets the MTU to the
default value for a Linux net device. It also corrects a
discrepancy between MTU values received from firmware, which includes
the ethernet header length, and net device MTU val
When a IBM VNIC client driver requests a faulty device setting, the
server returns an acceptable value for the client to request.
This 64 bit value was incorrectly being swapped as a 32 bit value,
resulting in loss of data. This patch corrects that by using
the 64 bit swap function.
Signed-off-by:
Move most interrupt handler processing into a tasklet, and
introduce a delay after re-enabling interrupts to fix timing
issues encountered in hardware testing.
Signed-off-by: Thomas Falcon
---
drivers/net/ethernet/ibm/ibmvnic.c | 21 +++--
drivers/net/ethernet/ibm/ibmvnic.h | 1
On Tuesday 24 January 2017 11:53 PM, Tony Luck wrote:
On Tue, Jan 24, 2017 at 10:11 AM, Hari Bathini
wrote:
Hello IA64 folks,
Could you please review this patch..?
It looks OK in principal. My lab is in partial disarray at the
moment (just got back from a sabbatical) so I can't test
build
Declare uart_ops structures as const as they are only stored in the ops
field of an uart_port structure. This field is of type const, so
uart_ops structures having this property can be made const too.
File size details before and after patching.
First line of every .o file shows the file size befo
When setting a 2M pte, radix__map_kernel_page() is using the address
ptep = (pte_t *)pudp;
Fix this conversion to use pmdp instead. Use pmdp_ptep() to do this
instead of casting the pointer.
Signed-off-by: Reza Arbab
---
arch/powerpc/mm/pgtable-radix.c | 4 ++--
1 file changed, 2 inser
On Wed, Jan 25, 2017 at 11:35 AM, David Laight wrote:
> From: Michael Ellerman
>> #define inlineinline __attribute__((always_inline))
>> notrace
>>
>> So in fact every inline function is marked always_inline all the time,
>> which seems dubious.
>
> I've had to do that i
Hi,
Today's next tree has warning messages in dmesg when running rcutorture
tests.
Machine : Power8 PowerVM LPAR
Build kernel : 4.10.0-rc5-next-20170125
Steps to recreate:
1.modprobe rcutorture
2.32 CPUS; offline 0-15 CPUS keeping 16-31 CPUs online and vice versa in
a loop
3. modpro
Hi,
Today's next tree has warning messages in dmesg when running rcutorture
tests.
Machine : Power8 PowerVM LPAR
Build kernel : 4.10.0-rc5-next-20170125
Steps to recreate:
1.modprobe rcutorture
2.32 CPUS; offline 0-15 CPUS keeping 16-31 CPUs online and vice versa in
a loop
3. modpro
The function kvmppc_handle_exit_pr() is quite huge and thus hard to read,
and even contains a "spaghetti-code"-like goto between the different case
labels of the big switch statement. This can be made much more readable
by moving the code related to injecting program interrupts / instruction
emulat
Hi,
We are experiencing kernel panics of the type "Unable to handle kernel paging
request for instruction fetch" but are stuck in our analysis. We would
appreciate any help you can give.
The problem occurs from time to time on different instances of a particular
embedded systems. The kernel is ve
From: Michael Ellerman
> Sent: 24 January 2017 06:16
> Anton Blanchard writes:
> >> We added:
> >>
> >> BUILD_BUG_ON(!__builtin_constant_p(feature))
> >>
> >> to cpu_has_feature() and mmu_has_feature() in order to catch usage
> >> issues (such as cpu_has_feature(cpu_has_feature(X)). Unfortunately
On Wed, Jan 25, 2017 at 1:33 PM, Michael Ellerman wrote:
> Michael Ellerman writes:
>
>> Joel Stanley writes:
>>
>>> The OPAL memory console is reported to be size zero, as we do not
>>> initialise the struct attr with any size information due to the size
>>> being variable. This leads users to
From: "Gautham R. Shenoy"
Document the device-tree bindings defining the the properties under
the @power-mgt node in the device tree that describe the idle states
for Linux running on baremetal POWER servers.
These bindings are documented separately instead of using the the
common idle state bin
From: "Gautham R. Shenoy"
The power9_idle_stop method currently takes only the requested stop
level as a parameter and picks up the rest of the PSSCR bits from a
hand-coded macro. This is not a very flexible design, especially when
the firmware has the capability to communicate the psscr value an
From: "Gautham R. Shenoy"
Balbir pointed out that the name of the function pnv_arch300_idle_init
was inconsistent with the names of the variables and functions
pertaining to POWER9 features in book3s_idle.S.
This patch renames pnv_arch300_idle_init to pnv_power9_idle_init.
This patch does not c
From: "Gautham R. Shenoy"
In the current code for powernv_add_idle_states, there is a lot of code
duplication while initializing an idle state in powernv_states table.
Add an inline helper function to populate the powernv_states[] table
for a given idle state. Invoke this for populating the "Nap
From: "Gautham R. Shenoy"
This is the sixth iteration of the patchset to use the psscr_val and
psscr_mask provided by the firmware for each of the stop states.
The previous versions can be found here:
[v5]: https://lkml.org/lkml/2017/1/10/147
[v4]: https://lkml.org/lkml/2016/12/9/288
[v3]: https
From: "Gautham R. Shenoy"
Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.
On ISA v3.0, when the ESL and EC bits in the PSSCR are zero, the CPU
is expected to w
Hello Rob,
Thank you very much for your review. I had missed this mail
and found it while looking at the lkml thread while preparing for the
next iteration.
On Fri, Jan 13, 2017 at 10:57:43AM -0600, Rob Herring wrote:
> On Tue, Jan 10, 2017 at 02:37:04PM +0530, Gautham R. Shenoy wrote:
> > From:
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