Paul Mackerras writes:
> On Fri, Nov 18, 2016 at 07:57:30PM +0530, Aneesh Kumar K.V wrote:
>> Paul Mackerras writes:
>> +
>> > + /* Global flush of TLBs and partition table caches for this lpid */
>> > + asm volatile("ptesync");
>> > + asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : : "r"(0x800), "r
On Sat, 2016-11-19 at 15:14 +1100, Paul Mackerras wrote:
>
> > These should be a device-tree property. We can fallback to hard wired
> > values if it doesn't exist but we should at least look for one.
>
> Tell me what the property is called and I'll add code to use it. :)
> That's the whole reaso
On Sat, Nov 19, 2016 at 11:45:52AM +1100, Balbir Singh wrote:
> > +#ifdef CONFIG_PPC_BOOK3S_64
> > +void mmu_partition_table_init(void)
> > +{
> > + unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
> > +
> > + BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too
> > large.");
>
On Sat, Nov 19, 2016 at 08:57:28AM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2016-11-18 at 20:11 +0530, Aneesh Kumar K.V wrote:
> > > + * Work out how many sets the TLB has, for the use of
> > > + * the TLB invalidation loop in book3s_hv_rmhandlers.S.
> > > + */
> > > + if (
On Fri, Nov 18, 2016 at 08:11:34PM +0530, Aneesh Kumar K.V wrote:
> > @@ -3287,6 +3290,17 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
> > kvm->arch.lpcr = lpcr;
> >
> > /*
> > +* Work out how many sets the TLB has, for the use of
> > +* the TLB invalidation loop in book3
On Fri, Nov 18, 2016 at 08:17:25PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras writes:
>
> > On POWER9, the msgsnd instruction is able to send interrupts to
> > other cores, as well as other threads on the local core. Since
> > msgsnd is generally simpler and faster than sending an IPI via t
On Fri, Nov 18, 2016 at 07:57:30PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras writes:
> +
> > + /* Global flush of TLBs and partition table caches for this lpid */
> > + asm volatile("ptesync");
> > + asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : : "r"(0x800), "r" (lpid));
> > + asm volati
On Fri, Nov 18, 2016 at 08:05:47PM +0530, Aneesh Kumar K.V wrote:
> Paul Mackerras writes:
>
> > Some special-purpose registers that were present and accessible
> > by guests on POWER8 no longer exist on POWER9, so this adds
> > feature sections to ensure that we don't try to context-switch
> > t
On 18/11/16 18:28, Paul Mackerras wrote:
> On POWER9, the SDR1 register (hashed page table base address) is no
> longer used, and instead the hardware reads the HPT base address
> and size from the partition table. The partition table entry also
> contains the bits that specify the page size for
> +#ifdef CONFIG_PPC_BOOK3S_64
> +void mmu_partition_table_init(void)
> +{
> + unsigned long patb_size = 1UL << PATB_SIZE_SHIFT;
> +
> + BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too
> large.");
This should be 36 (12 + 24)
> + partition_tb = __va(memblock_alloc_b
On 18/11/16 18:28, Paul Mackerras wrote:
> This adapts the KVM-HV hashed page table (HPT) code to read and write
> HPT entries in the new format defined in Power ISA v3.00 on POWER9
> machines. The new format moves the B (segment size) field from the
> first doubleword to the second, and trims s
On Fri, 2016-11-18 at 20:11 +0530, Aneesh Kumar K.V wrote:
> > + * Work out how many sets the TLB has, for the use of
> > + * the TLB invalidation loop in book3s_hv_rmhandlers.S.
> > + */
> > + if (cpu_has_feature(CPU_FTR_ARCH_300))
> > + kvm->arch.tlb_sets = 256;
This is a note to let you know that I've just added the patch titled
usb: gadget: udc: fsl: remove unnecessary & operation
to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-next branch.
The patch will show up in the next rel
This is a note to let you know that I've just added the patch titled
usb: gadget: udc: fsl: make use of new usb_endpoint_maxp_mult()
to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-next branch.
The patch will show up in th
This is a note to let you know that I've just added the patch titled
usb: gadget: udc: fsl: remove unnecessary & operation
to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-testing branch.
The patch will show up in the next
This is a note to let you know that I've just added the patch titled
usb: gadget: udc: fsl: make use of new usb_endpoint_maxp_mult()
to my usb git tree which can be found at
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
in the usb-testing branch.
The patch will show up in
Michael Ellerman writes:
> "Aneesh Kumar K.V" writes:
>
>> We will start moving some book3s specific hugetlb functions there.
>>
>> Signed-off-by: Aneesh Kumar K.V
>> ---
>> arch/powerpc/include/asm/book3s/64/{hugetlb-radix.h => hugetlb.h} | 8
>> ++--
>> arch/powerpc/include/asm/hugetlb.
Paul Mackerras writes:
+
> + /* Global flush of TLBs and partition table caches for this lpid */
> + asm volatile("ptesync");
> + asm volatile(PPC_TLBIE_5(%0,%1,2,0,0) : : "r"(0x800), "r" (lpid));
> + asm volatile("eieio; tlbsync; ptesync" : : : "memory");
> +}
It would be nice
Paul Mackerras writes:
> On POWER9, the msgsnd instruction is able to send interrupts to
> other cores, as well as other threads on the local core. Since
> msgsnd is generally simpler and faster than sending an IPI via the
> XICS, we use msgsnd for all IPIs sent by KVM on POWER9.
>
> Signed-off-
Paul Mackerras writes:
> Some special-purpose registers that were present and accessible
> by guests on POWER8 no longer exist on POWER9, so this adds
> feature sections to ensure that we don't try to context-switch
> them when going into or out of a guest on POWER9. These are
> all relatively o
Paul Mackerras writes:
> POWER9 adds new capabilities to the tlbie (TLB invalidate entry)
> and tlbiel (local tlbie) instructions. Both instructions get a
> set of new parameters (RIC, PRS and R) which appear as bits in the
> instruction word. The tlbiel instruction now has a second register
>
On Fri, 18 Nov 2016 17:09:26 +0530
"Naveen N. Rao" wrote:
> ... rather than through notify_die(), to reduce path taken for handling
> kprobes. Similar to commit 6f6343f53d13 ("kprobes/x86: Call exception
> handlers directly from do_int3/do_debug").
>
> While at it, rename post_kprobe_handler() t
On Thu, Nov 17, 2016 at 11:23:24AM +0100, Florian Larysch wrote:
> Signed-off-by: Florian Larysch
> ---
> Documentation/devicetree/bindings/i2c/trivial-devices.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring
Drop duplicate header asm/iommu.h from book3s_64_vio_hv.c.
Signed-off-by: Geliang Tang
---
arch/powerpc/kvm/book3s_64_vio_hv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/kvm/book3s_64_vio_hv.c
b/arch/powerpc/kvm/book3s_64_vio_hv.c
index d461c44..e4c4ea9 100644
--- a/arch/po
On Tue, Nov 15, 2016 at 03:03:40PM -0800, John Youn wrote:
> From: Christian Lamparter
>
> This patch adds support for the "amcc,usb-otg" device
> which is found in the PowerPC Canyonlands' dts.
>
> The device definition was added by:
>
> commit c89b3458d8cc ("powerpc/44x: Add USB DWC DTS entry
On Mon, 14 Nov 2016, Zubair Lutfullah Kakakhel wrote:
> The powerpc dts file does not have the xlnx,kind-of-intr property.
> Instead of erroring out, give a warning instead. And attempt to
> continue to probe the interrupt controller while assuming
> kind-of-intr is 0x0 as a fall back.
This is br
On 11/17/16, Michael Ellerman wrote:
> Denis Kirjanov writes:
>
>> On Friday, September 30, 2016, Christophe Leroy
>> wrote:
>>
>>> Add HAVE_CC_STACKPROTECTOR to powerpc. This is copied from ARM.
>>>
>>> Not tested on PPC64, compile ok with ppc64_
>>
>>
>> Hi Christophe,
>>
>> are you going to t
"Aneesh Kumar K.V" writes:
> We will start moving some book3s specific hugetlb functions there.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/book3s/64/{hugetlb-radix.h => hugetlb.h} | 8
> ++--
> arch/powerpc/include/asm/hugetlb.h| 2
Now that we've defined structures to describe each of the client
architecture vectors, we can use those to construct the value we pass to
firmware.
This avoids the tricks we previously played with the W() macro, allows
us to properly endian annotate fields, and should help to avoid bugs
introduced
The "client architecture vectors" are a series of structures we pass to
firmware to define various things, such as what processors we support
and many other options.
Each structure is entirely different so we have to define a different
struct for each one, but that's OK.
Signed-off-by: Michael El
Russell Currey writes:
> eeh_pe_reset and eeh_reset_pe are two different functions in the same
> file which do mostly the same thing. Not only is this confusing, but
> potentially causes disrepancies in functionality, notably eeh_reset_pe
> as it does not check return values for failure.
>
> Ref
Frederic Barrat writes:
> If a process dumps core while owning a cxl file descriptor obtained
> from an AFU driver (e.g. cxlflash) through the cxl_get_fd() API, the
> following error occurs:
>
> [ 868.027591] Unable to handle kernel paging request for data at address ...
> [ 868.027778] Faultin
... rather than through notify_die(), to reduce path taken for handling
kprobes. Similar to commit 6f6343f53d13 ("kprobes/x86: Call exception
handlers directly from do_int3/do_debug").
While at it, rename post_kprobe_handler() to kprobe_post_handler() for
more uniform naming.
Reported-by: Masami
On 2016/11/18 08:41PM, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
>
> > - Introduce _GLOBAL_SYM() for global symbols in assembly. This helps
> > reduce verbosity of assembly files.
>
> Unfortunately you've walked into a bit of mine field here :)
>
> In user space they use FUNC_START() to
On 2016/11/18 08:36PM, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
>
> > We can't really take a trap at this point. So, blacklist these symbols.
> >
> > Reported-by: Anton Blanchard
> > Signed-off-by: Naveen N. Rao
> > ---
> > arch/powerpc/mm/slb_low.S | 10 +-
> > 1 file changed
Hi Masami,
On 2016/11/18 04:04PM, Masami Hiramatsu wrote:
> On Fri, 18 Nov 2016 16:48:01 +1100
> Michael Ellerman wrote:
>
> > "Naveen N. Rao" writes:
> >
> > > Add symbol to mark end of entry_*.S and use the same to blacklist all
> > > addresses from kernel start (_stext) to entry code from k
On 2016/11/18 04:48PM, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
>
> > Add symbol to mark end of entry_*.S and use the same to blacklist all
> > addresses from kernel start (_stext) to entry code from kprobes. Much of
> > this code is early exception handling where we can't really take a
"Naveen N. Rao" writes:
> - Introduce _GLOBAL_SYM() for global symbols in assembly. This helps
> reduce verbosity of assembly files.
Unfortunately you've walked into a bit of mine field here :)
In user space they use FUNC_START() to declare the start of a function,
and we should do the same. An
"Naveen N. Rao" writes:
> We can't really take a trap at this point. So, blacklist these symbols.
>
> Reported-by: Anton Blanchard
> Signed-off-by: Naveen N. Rao
> ---
> arch/powerpc/mm/slb_low.S | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/m
Thank you very much. I am more clear about it now.
On Fri, Nov 18, 2016 at 5:29 PM, Michael Ellerman wrote:
> Liu ping fan writes:
>
>> I have an ibm-p8-garrison machine. But I can not find a node
>> "ibm,configure-kernel-dump" under /proc/device-tree. Does garrison
>> machine support fadump? A
Liu ping fan writes:
> I have an ibm-p8-garrison machine. But I can not find a node
> "ibm,configure-kernel-dump" under /proc/device-tree. Does garrison
> machine support fadump? And normally, which component in open-power
> presents the "ibm,configure-kernel-dump" ? I had though it was in
> sk
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