[PATCH] powerpc/powernv: Detach from PE on releasing PCI device

The PCI hotplug can be part of EEH error recovery. The @pdn and the device's PE number aren't removed and added afterwords. The PE number in @pdn should be set to an invalid one. Otherwise, the PE's device count is decreased on removing devices while failing to be increased on adding devices. It le

[PATCH v3] KVM: PPC: Book3S HV: Migrate pinned pages out of CMA

When PCI Device pass-through is enabled via VFIO, KVM-PPC will pin pages using get_user_pages_fast(). One of the downsides of the pinning is that the page could be in CMA region. The CMA region is used for other allocations like the hash page table. Ideally we want the pinned pages to be from non

Re: [PATCH v2 1/5] powerpc/cell: drop unused iic_get_irq_host()

On 06/09/16 15:32, Daniel Axtens wrote: Sparse checking revealed that it is no longer used. There is an EXPORT_SYMBOL_GPL, but there's no header that provides a prototype, so nothing should be using it anyway. Remove it. Signed-off-by: Daniel Axtens Reviewed-by: Andrew Donnellan -- Andrew

Re: [RESEND][v2][PATCH] KVM: PPC: Book3S HV: Migrate pinned pages out of CMA

Balbir Singh writes: > From: Balbir Singh > Subject: [RESEND][v2][PATCH] KVM: PPC: Book3S HV: Migrate pinned pages out of > CMA > > When PCI Device pass-through is enabled via VFIO, KVM-PPC will > pin pages using get_user_pages_fast(). One of the downsides of > the pinning is that the page coul

[PATCH v2 5/5] powerpc/sparse: Add more assembler prototypes

Another set of things that are only called from assembler and so need prototypes to keep sparse happy. Signed-off-by: Daniel Axtens --- v2: Fix a couple of issues identified by the 0day bot: - different definition of sys_swapendian for 32/64 - the previous fadump patch fixes a weird int

[PATCH v2 4/5] powerpc/fadump: Make ELF eflags depend on endian

Firmware Assisted Dump is a facility to dump kernel core with assistance from firmware. As part of this process the kernel ELF version is stored. Currently, fadump.h defines this to 0 if it is not already defined. This clashes with a define in elf.h which sets it based on the current task - not b

[PATCH v2 3/5] powerpc/kvm: sparse: prototypes for functions called from assembler

A bunch of KVM functions are only called from assembler. Give them prototypes in asm-prototypes.h Signed-off-by: Daniel Axtens --- v2: fix compile error when CONFIG_KVM is undefined, thanks 0day bot! --- arch/powerpc/include/asm/asm-prototypes.h | 44 +++ arch/powerp

[PATCH v2 2/5] powerpc/sparse: Make a bunch of things static

Squash a bunch of sparse warnings by making things static. Reviewed-by: Andrew Donnellan Signed-off-by: Daniel Axtens --- v2: remove the symbol that I dropped in the previous patch. This is an omnibus patch - I wrote a Python script to figure out if sparse warnings could be automatically fixe

[PATCH v2 1/5] powerpc/cell: drop unused iic_get_irq_host()

Sparse checking revealed that it is no longer used. There is an EXPORT_SYMBOL_GPL, but there's no header that provides a prototype, so nothing should be using it anyway. Remove it. Signed-off-by: Daniel Axtens --- arch/powerpc/platforms/cell/interrupt.c | 6 -- 1 file changed, 6 deletions(-

Re: [PATCH 01/13] perf/core: Add perf_arch_regs and mask to perf_regs structure

On Thursday 01 September 2016 12:56 PM, Peter Zijlstra wrote: On Mon, Aug 29, 2016 at 02:30:46AM +0530, Madhavan Srinivasan wrote: It's a perennial request from hardware folks to be able to see the raw values of the pmu registers. Partly it's so that they can verify perf is doing what they wan

[PATCH] powerpc/powernv: Fix corrupted PE allocation bitmap on releasing PE

In pnv_ioda_free_pe(), the PE object (including the associated PE number) is cleared before resetting the corresponding bit in the PE allocation bitmap. It means PE#0 is always released to the bitmap wrongly. This fixes above issue by caching the PE number before the PE object is cleared. Fixes:

[PATCH] powerpc/powernv: Fix crash on releasing compound PE

The compound PE is created to accommodate the devices attached to one specific PCI bus that consume multiple M64 segments. The compound PE is made up of one master PE and possibly multiple slave PEs. The slave PEs should be destroyed when releasing the master PE. A kernel crash happens when derfere

[PATCH] powerpc/xics/opal: Fix processor numbers in OPAL ICP

When using the OPAL ICP backend we incorrectly pass Linux CPU numbers rather than HW CPU numbers to OPAL. Signed-off-by: Benjamin Herrenschmidt Fixes: d74361881f0dfe5f9dcac37d1b753a15a2345d8c --- diff --git a/arch/powerpc/sysdev/xics/icp-opal.c b/arch/powerpc/sysdev/xics/icp-opal.c index 57d72f

Re: [RESEND][v2][PATCH] KVM: PPC: Book3S HV: Migrate pinned pages out of CMA

On 31/08/16 14:14, Alexey Kardashevskiy wrote: > On 14/07/16 14:25, Balbir Singh wrote: >> >> From: Balbir Singh >> Subject: [RESEND][v2][PATCH] KVM: PPC: Book3S HV: Migrate pinned pages out >> of CMA >> >> When PCI Device pass-through is enabled via VFIO, KVM-PPC will >> pin pages using get_us

Re: [PATCH 4/4] powerpc/mm: Update the HID bit when switching from radix to hash

On Wed, 2016-08-24 at 15:03 +0530, Aneesh Kumar K.V wrote: > Power9 DD1 requires to update the hid0 register when switching from > hash to radix. One minor nit.  This is bidirectional not just "hash to radix" Could just be: powerpc/mm: Update the HID bit when switching MMU modes Power9 DD1 requ

Re: [PATCH 3/4] powerpc/mm/radix: Use different pte update sequence for different POWER9 revs

On Wed, 2016-08-24 at 15:03 +0530, Aneesh Kumar K.V wrote: > POWER9 DD1 requires pte to be marked invalid (V=0) before updating > it with the new value. This makes this distinction for the different > revisions. > > Signed-off-by: Aneesh Kumar K.V Acked-by: Michael Neuling > --- >  arch/powerp

Re: [PATCH 2/4] powerpc/mm/radix: Use different RTS encoding for different POWER9 revs

On Wed, 2016-08-24 at 15:03 +0530, Aneesh Kumar K.V wrote: > POWER9 DD1 uses RTS - 28 for the RTS value but other revisions use > RTS - 31.  This makes this distinction for the different revisions > > Signed-off-by: Aneesh Kumar K.V Acked-by: Michael Neuling > --- >  arch/powerpc/include/asm/b

Re: [PATCH 1/4] powerpc/book3s: Add a cpu table entry for different POWER9 revs

On Wed, 2016-08-24 at 15:03 +0530, Aneesh Kumar K.V wrote: > Signed-off-by: Aneesh Kumar K.V Acked-by: Michael Neuling > --- >  arch/powerpc/include/asm/cputable.h |  4 +++- >  arch/powerpc/kernel/cputable.c  | 19 +++ >  2 files changed, 22 insertions(+), 1 deletion(-) > >

[PATCH v4 13/20] selftests/powerpc: Check that signals always get delivered

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/Makefile | 1 + tools/testing/selftests/powerpc/signal/Makefile| 12 +++ tools/testing/selftests/powerpc/signal/signal.S| 50 ++ tools/testing/selftests/powerpc/signal/signal.c| 111

[PATCH v4 20/20] powerpc: Remove do_load_up_transact_{fpu,altivec}

Previous rework of TM code leaves these functions unused Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/tm.h | 5 - arch/powerpc/kernel/fpu.S | 26 -- arch/powerpc/kernel/vector.S | 25 - 3 files changed, 56 deletions(-) diff --gi

[PATCH v4 14/20] selftests/powerpc: Add checks for transactional GPRs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v4 16/20] selftests/powerpc: Add checks for transactional VMXs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v4 11/20] selftests/powerpc: Allow tests to extend their kill timeout

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/harness.c | 9 +++-- tools/testing/selftests/powerpc/utils.h | 2 +- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/powerpc/harness.c b/tools/testing/selftests/powerpc/harness.c index 52f9b

[PATCH v4 19/20] powerpc: tm: Rename transct_(*) to ck(\1)_state

Make the structures being used for checkpointed state named consistently with the pt_regs/ckpt_regs. Signed-off-by: Cyril Bur --- arch/powerpc/include/asm/processor.h | 8 ++--- arch/powerpc/kernel/asm-offsets.c| 12 arch/powerpc/kernel/fpu.S| 2 +- arch/powerpc/kernel

[PATCH v4 12/20] selftests/powerpc: Add TM tcheck helpers in C

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/tm/tm.h | 27 +++ 1 file changed, 27 insertions(+) diff --git a/tools/testing/selftests/powerpc/tm/tm.h b/tools/testing/selftests/powerpc/tm/tm.h index 60318ba..2c8da74 100644 --- a/tools/testing/selftests/powe

[PATCH v4 18/20] powerpc: tm: Always use fp_state and vr_state to store live registers

There is currently an inconsistency as to how the entire CPU register state is saved and restored when a thread uses transactional memory (TM). Using transactional memory results in the CPU having duplicated (almost) all of its register state. This duplication results in a set of registers which c

[PATCH v4 17/20] selftests/powerpc: Add checks for transactional VSXs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v4 10/20] selftests/powerpc: Introduce GPR asm helper header file

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/gpr_asm.h | 96 +++ 1 file changed, 96 insertions(+) create mode 100644 tools/testing/selftests/powerpc/gpr_asm.h diff --git a/tools/testing/selftests/powerpc/gpr_asm.h b/tools/testing/selftests/powerpc/gp

[PATCH v4 09/20] selftests/powerpc: Move VMX stack frame macros to header file

Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/math/vmx_asm.S | 85 +- tools/testing/selftests/powerpc/vmx_asm.h | 98 ++ 2 files changed, 99 insertions(+), 84 deletions(-) create mode 100644 tools/testing/selftests/powerpc/vmx_asm.h

[PATCH v4 15/20] selftests/powerpc: Add checks for transactional FPUs in signal contexts

If a thread receives a signal while transactional the kernel creates a second context to show the transactional state of the process. This test loads some known values and waits for a signal and confirms that the expected values are in the signal context. Signed-off-by: Cyril Bur --- tools/testi

[PATCH v4 08/20] selftests/powerpc: Rework FPU stack placement macros and move to header file

The FPU regs are placed at the top of the stack frame. Currently the position expected to be passed to the macro. The macros now should be passed the stack frame size and from there they can calculate where to put the regs, this makes the use simpler. Also move them to a header file to be used in

[PATCH v4 07/20] selftests/powerpc: Check for VSX preservation across userspace preemption

Ensure the kernel correctly switches VSX registers correctly. VSX registers are all volatile, and despite the kernel preserving VSX across syscalls, it doesn't have to. Test that during interrupts and timeslices ending the VSX regs remain the same. Signed-off-by: Cyril Bur --- tools/testing/self

[PATCH v4 06/20] powerpc: signals: Stop using current in signal code

Much of the signal code takes a pt_regs on which it operates. Over time the signal code has needed to know more about the thread than what pt_regs can supply, this information is obtained as needed by using 'current'. This approach is not strictly incorrect however it does mean that there is now a

[PATCH v4 05/20] powerpc: Never giveup a reclaimed thread when enabling kernel {fp, altivec, vsx}

After a thread is reclaimed from its active or suspended transactional state the checkpointed state exists on CPU, this state (along with the live/transactional state) has been saved in its entirety by the reclaiming process. There exists a sequence of events that would cause the kernel to call on

[PATCH v4 04/20] powerpc: Return the new MSR from msr_check_and_set()

msr_check_and_set() always performs a mfmsr() to determine if it needs to perform an mtmsr(), as mfmsr() can be a costly operation msr_check_and_set() could return the MSR now on the CPU to avoid callers of msr_check_and_set having to make their own mfmsr() call. Signed-off-by: Cyril Bur --- arc

[PATCH v4 03/20] powerpc: Add check_if_tm_restore_required() to giveup_all()

giveup_all() causes FPU/VMX/VSX facilities to be disabled in a threads MSR. If the thread performing the giveup was transactional, the kernel must record which facilities were in use before the giveup as the thread must have these facilities re-enabled on return to userspace. >From process.c: /*

[PATCH v4 02/20] powerpc: Always restore FPU/VEC/VSX if hardware transactional memory in use

Comment from arch/powerpc/kernel/process.c:967: If userspace is inside a transaction (whether active or suspended) and FP/VMX/VSX instructions have ever been enabled inside that transaction, then we have to keep them enabled and keep the FP/VMX/VSX state loaded while ever the transaction conti

[PATCH v4 01/20] selftests/powerpc: Compile selftests against headers without AT_HWCAP2

It might be nice to compile selftests against older kernels and headers but which may not have HWCAP2. Signed-off-by: Cyril Bur --- tools/testing/selftests/powerpc/utils.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tools/testing/selftests/powerpc/utils.h b/tools/testing/selftest

[PATCH v4 00/20] Consistent TM structures

v4: Address review from Mikey, comment and commit message changes. Dropped patch "selftests/powerpc: Add TM tcheck helpers in C" as it was unused. V3: In v2 the MSR_{FP,VEC,VSX} bits were left on (if in use) after a reclaim which meant that signal code did the correct thing. This also mean

[PATCH] soc: fsl/qe: fix gpio save_regs functions

of_mm_gpiochip_add_data() calls mm_gc->save_regs() before setting the data. Therefore ->save_regs() cannot use gpiochip_get_data() An Oops is encountered without this fix. fixes: 1e714e54b5ca5 ("powerpc: qe_lib-gpio: use gpiochip data pointer") Signed-off-by: Christophe Leroy Cc: --- drivers/s

[PATCH v8 13/13] powerpc: Enable CONFIG_KEXEC_FILE in powerpc server defconfigs.

Enable CONFIG_KEXEC_FILE in powernv_defconfig, ppc64_defconfig and pseries_defconfig. It depends on CONFIG_CRYPTO_SHA256=y, so add that as well. Signed-off-by: Thiago Jung Bauermann --- arch/powerpc/configs/powernv_defconfig | 2 ++ arch/powerpc/configs/ppc64_defconfig | 2 ++ arch/powerpc/co

[PATCH v8 12/13] powerpc: Add purgatory for kexec_file_load implementation.

This purgatory implementation comes from kexec-tools, almost unchanged. The only changes were that the sha256_regions global variable was renamed to sha_regions to match what kexec_file_load expects, and to use the sha256.c file from x86's purgatory to avoid adding yet another SHA-256 implementati

[PATCH v8 11/13] powerpc: Add support for loading ELF kernels with kexec_file_load.

This uses all the infrastructure built up by the previous patches in the series to load an ELF vmlinux file and an initrd. It uses the flattened device tree at initial_boot_params as a base and adjusts memory reservations and its /chosen node for the next kernel. Signed-off-by: Thiago Jung Bauerma

[PATCH v8 10/13] powerpc: Add code to work with device trees in kexec_file_load.

kexec_file_load needs to set up the device tree that will be used by the next kernel and check whether it provides a console that can be used by the purgatory. [a...@linux-foundation.org: coding-style fixes] Signed-off-by: Thiago Jung Bauermann Signed-off-by: Andrew Morton --- arch/powerpc/incl

[PATCH v8 09/13] powerpc: Implement kexec_file_load.

arch_kexec_walk_mem and arch_kexec_apply_relocations_add are used by generic kexec code, while setup_purgatory is powerpc-specific and sets runtime variables needed by the powerpc purgatory implementation. Signed-off-by: Josh Sklar Signed-off-by: Thiago Jung Bauermann --- arch/powerpc/Kconfig

[PATCH v8 08/13] powerpc: Add functions to read ELF files of any endianness.

A little endian kernel might need to kexec a big endian kernel (the opposite is less likely but could happen as well), so we can't just cast the buffer with the binary to ELF structs and use them as is done elsewhere. This patch adds functions which do byte-swapping as necessary when populating th

[PATCH v8 07/13] powerpc: Adapt elf64_apply_relocate_add for kexec_file_load.

Extend elf64_apply_relocate_add to support relative symbols. This is necessary because there is a difference between how the module loading mechanism and the kexec purgatory loading code use Elf64_Sym.st_value at relocation time: the former changes st_value to point to the absolute memory address b

[PATCH v8 06/13] powerpc: Generalize elf64_apply_relocate_add.

When apply_relocate_add is called, modules are already loaded at their final location in memory so Elf64_Shdr.sh_addr can be used for accessing the section contents as well as the base address for relocations. This is not the case for kexec's purgatory, because it will only be copied to its final

[PATCH v8 05/13] powerpc: Factor out relocation code from module_64.c to elf_util_64.c.

The kexec_file_load system call needs to relocate the purgatory, so factor out the module relocation code so that it can be shared. This patch's purpose is to move the ELF relocation logic from apply_relocate_add to elf_util_64.c with as few changes as possible. The following changes were needed:

[PATCH v8 04/13] powerpc: Change places using CONFIG_KEXEC to use CONFIG_KEXEC_CORE instead.

Commit 2965faa5e03d ("kexec: split kexec_load syscall from kexec core code") introduced CONFIG_KEXEC_CORE so that CONFIG_KEXEC means whether the kexec_load system call should be compiled-in and CONFIG_KEXEC_FILE means whether the kexec_file_load system call should be compiled-in. These options can

[PATCH v8 03/13] kexec_file: Factor out kexec_locate_mem_hole from kexec_add_buffer.

kexec_locate_mem_hole will be used by the PowerPC kexec_file_load implementation to find free memory for the purgatory stack. Signed-off-by: Thiago Jung Bauermann Acked-by: Dave Young --- include/linux/kexec.h | 1 + kernel/kexec_file.c | 25 - 2 files changed, 21 ins

[PATCH v8 02/13] kexec_file: Change kexec_add_buffer to take kexec_buf as argument.

This is done to simplify the kexec_add_buffer argument list. Adapt all callers to set up a kexec_buf to pass to kexec_add_buffer. In addition, change the type of kexec_buf.buffer from char * to void *. There is no particular reason for it to be a char *, and the change allows us to get rid of 3 ex

[PATCH v8 01/13] kexec_file: Allow arch-specific memory walking for kexec_add_buffer

Allow architectures to specify a different memory walking function for kexec_add_buffer. x86 uses iomem to track reserved memory ranges, but PowerPC uses the memblock subsystem. Signed-off-by: Thiago Jung Bauermann Acked-by: Dave Young Acked-by: Balbir Singh --- include/linux/kexec.h | 29 ++

[PATCH v8 00/13] kexec_file_load implementation for PowerPC

When Stephen Rothwell added this patch series to the linux-next tree, he found out that it fails to cross build a ppc64 LE kernel using a ppc64 BE host. This version of the series fixes that problem with a change in arch/powerpc/purgatory/Makefile. While I was at it I noticed that it is not necess

Re: [RFC PATCH v4 11/12] powerpc: Add a Kconfig and a function to set new soft_enabled mask

On Monday 05 September 2016 10:48 PM, Madhavan Srinivasan wrote: On Monday 29 August 2016 07:11 AM, Nicholas Piggin wrote: On Mon, 29 Aug 2016 00:07:27 +0530 Madhavan Srinivasan wrote: New Kconfig is added "CONFIG_IRQ_DEBUG_SUPPORT" to add a warn_on to alert the usage of soft_irq_set_mask

Re: [RFC PATCH v4 11/12] powerpc: Add a Kconfig and a function to set new soft_enabled mask

On Monday 29 August 2016 07:11 AM, Nicholas Piggin wrote: On Mon, 29 Aug 2016 00:07:27 +0530 Madhavan Srinivasan wrote: New Kconfig is added "CONFIG_IRQ_DEBUG_SUPPORT" to add a warn_on to alert the usage of soft_irq_set_mask() for disabling lower bitmask interrupts. Have also moved the code

[RFC PATCH v5 12/12] powerpc: rewrite local_t using soft_irq

Local atomic operations are fast and highly reentrant per CPU counters. Used for percpu variable updates. Local atomic operations only guarantee variable modification atomicity wrt the CPU which owns the data and these needs to be executed in a preemption safe way. Here is the design of this patch

[RFC PATCH v5 11/12] powerpc: Add a Kconfig and a function to set new soft_enabled mask

Two new arch_local_irq_and_pmu_*() functions are added. These are primarily intended to be used for disabling multiple interrupts. Also the current arch_local_irq_save() have be modified to "OR" and "Store" value instead of just "store" function. This is to avoid any lose of interrupts bits incase

[RFC PATCH v5 10/12] powerpc: Add support to mask perf interrupts and reply them

To support masking of the PMI interrupts, couple of new interrupt handler macros are added MASKABLE_EXCEPTION_PSERIES_OOL and MASKABLE_RELON_EXCEPTION_PSERIES_OOL. Couple of new irq #defs "PACA_IRQ_PMI" and "SOFTEN_VALUE_0xf0*" added to use in the exception code to check for PMI interrupts. In th

[RFC PATCH v5 09/12] powerpc: Add "bitmask" paramater to MASKABLE_* macros

Make it explicit the interrupt masking supported by a gievn interrupt handler. Patch correspondingly extends the MASKABLE_* macros with an addition's parameter. "bitmask" parameter is passed to SOFTEN_TEST macro to decide on masking the interrupt. Signed-off-by: Madhavan Srinivasan --- arch/powe

[RFC PATCH v5 08/12] powerpc: Introduce new mask bit for soft_enabled

Currently soft_enabled is used as the flag to determine the interrupt state. Patch extends the soft_enabled to be used as a mask instead of a flag. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/exception-64s.h | 4 ++-- arch/powerpc/include/asm/hw_irq.h| 1 + arch/power

[RFC PATCH v5 07/12] powerpc: Add new _EXCEPTION_PROLOG_1 macro

To support addition of "bitmask" to MASKABLE_* macros, factor out the EXCPETION_PROLOG_1 macro. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/exception-64s.h | 30 ++ 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include

[RFC PATCH v5 06/12] powerpc: Avoid using EXCEPTION_PROLOG_1 macro in MASKABLE_*

Currently we use both EXCEPTION_PROLOG_1 and __EXCEPTION_PROLOG_1 in the MASKABLE_* macros. As a cleanup, this patch makes MASKABLE_* to use only __EXCEPTION_PROLOG_1. There is not logic change. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/exception-64s.h | 4 ++-- 1 file chan

[RFC PATCH v5 05/12] powerpc: reverse the soft_enable logic

"paca->soft_enabled" is used as a flag to mask some of interrupts. Currently supported flags values and their details: soft_enabledMSR[EE] 0 0 Disabled (PMI and HMI not masked) 1 1 Enabled "paca->soft_enabled" is initialized to 1 to make the interripts

[RFC PATCH v5 04/12] powerpc: Use set_soft_enabled api to update paca->soft_enabled

Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/kvm_ppc.h | 2 +- arch/powerpc/kernel/irq.c | 2 +- arch/powerpc/kernel/setup_64.c | 4 ++-- arch/powerpc/kernel/time.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/includ

[RFC PATCH v5 03/12] powerpc: move set_soft_enabled()

Move set_soft_enabled() from powerpc/kernel/irq.c to asm/hw_irq.c. this way updation of paca->soft_enabled can be forced wherever possible. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/hw_irq.h | 6 ++ arch/powerpc/kernel/irq.c | 6 -- 2 files changed, 6 insert

[RFC PATCH v5 01/12] powerpc: Add #defs for paca->soft_enabled flags

Two #defs IRQ_DISABLE_LEVEL_NONE and IRQ_DISABLE_LEVEL_LINUX are added to be used when updating paca->soft_enabled. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/hw_irq.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc

[RFC PATCH v5 02/12] powerpc: Cleanup to use IRQ_DISABLE_MASK_* macros for paca->soft_enabled update

Replace the hardcoded values used when updating paca->soft_enabled with IRQ_DISABLE_MASK_* #def. No logic change. Signed-off-by: Madhavan Srinivasan --- arch/powerpc/include/asm/exception-64s.h | 2 +- arch/powerpc/include/asm/hw_irq.h| 15 --- arch/powerpc/include/asm/irqfl

[RFC PATCH v5 00/12] powerpc: "paca->soft_enabled" based local atomic operation implementation

Local atomic operations are fast and highly reentrant per CPU counters. Used for percpu variable updates. Local atomic operations only guarantee variable modification atomicity wrt the CPU which owns the data and these needs to be executed in a preemption safe way. Here is the design of the patchs

Bug#836741: linux: FTBFS on powerpcspe due to the use of unsupported instructions

Source: linux Version: 4.7.2-1 Severity: normal User: debian-powe...@lists.debian.org Usertags: powerpcspe Hi! Linux 4.7.x introduced another regression on powerpcspe due to the use of unsupported assembly instructions [1]: /<>/arch/powerpc/xmon/spr_access.S: Assembler messages: /<>/arch/powerpc

Re: [PATCH v4 0/5] PCI: Introduce a way to enforce all MMIO BARs not to share PAGE_SIZE

Ping? On 2016/8/12 13:42, Yongji Xie wrote: This series introduces a way for PCI resource allocator to force MMIO BARs not to share PAGE_SIZE. This would make sense to VFIO driver. Because current VFIO implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs which may share the same

Re: [PATCH 2/6] cxlflash: Remove the device cleanly in the system shutdown path

On 03/09/16 06:39, Uma Krishnan wrote: Commit 704c4b0ddc03 ("cxlflash: Shutdown notify support for CXL Flash cards") was recently introduced to notify the AFU when a system is going down. Due to the position of the cxlflash driver in the device stack, cxlflash devices are _always_ removed during