On 07/07/16 16:26, Ian Munsie wrote:
We could probably use a dedicated error label for all the error paths
before the pci_dev_put in the main function so we don't need it in every
error path.
Yep, I've added that.
If we explicitly match the Vendor + Device ID we will also match the
networking
Excerpts from Frederic Barrat's message of 2016-07-06 20:30:41 +0200:
>
> > @@ -1572,6 +1575,9 @@ static pci_ers_result_t cxl_pci_error_detected(struct
> > pci_dev *pdev,
> >*/
> > for (i = 0; i < adapter->slices; i++) {
> > afu = adapter->afu[i];
> > +
Excerpts from Frederic Barrat's message of 2016-07-06 19:38:18 +0200:
>
> > +/* No special handling for cxl function: */
> > +if (PCI_FUNC(dev->devfn) == 0)
> > +return true;
>
> I believe that is the first time we're getting a hint of the black magic
> which is going to occur wh
Excerpts from andrew.donnellan's message of 2016-07-07 11:18:37 +1000:
> > This is to balance the 'get' done in cxl_check_and_switch_mode(), right?
> > A comment wouldn't hurt. I think we're missing the 'put' on the first
> > error path above (!bridge).
>
> Yep, it's to balance the pci_dev_get() i
On 07/05/16 at 05:03pm, AKASHI Takahiro wrote:
> Hi Dave,
>
> On Tue, Jul 05, 2016 at 09:25:56AM +0800, Dave Young wrote:
> > On 07/04/16 at 03:58pm, AKASHI Takahiro wrote:
> > > Hi,
> > >
> > > On Fri, Jul 01, 2016 at 12:46:31PM -0300, Thiago Jung Bauermann wrote:
> > > > Am Freitag, 01 Juli 201
Excerpts from Frederic Barrat's message of 2016-07-06 20:41:42 +0200:
> I think we want:
> if (WARN_ON(hwirq <= 0))
> cxl_find_afu_irq() returns 0 if doesn't find the irq, which is not
> supposed to happen here.
Good catch - will fix in v2.
Cheers,
-Ian
_
Excerpts from Frederic Barrat's message of 2016-07-06 20:11:48 +0200:
>
> Le 04/07/2016 15:22, Ian Munsie a écrit :
> > From: Ian Munsie
> >
> > These APIs will be used by the Mellanox CX4 support. While they function
> > standalone to configure existing behaviour, their primary purpose is to
> >
Hi Kees,
On Wed, Jul 06, 2016 at 03:25:20PM -0700, Kees Cook wrote:
> +#ifdef CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR
Should be CONFIG_HARDENED_USERCOPY to match the slab/slub implementation
condition.
> +const char *__check_heap_object(const void *ptr, unsigned long n,
> +
On 07/06/2016 03:23 PM, Daniel Walker wrote:
> Hi,
>
> We are using the t1040 platform, and we have found that we need to
> populate this register. In the Technical Reference Manual it's
> description is section 24.3.2. This option appears in the driver, but it
> doesn't appears to be used anyp
On Wed, Jul 06, 2016 at 03:35:21PM +1000, Sam Bobroff wrote:
> There are a few issues with our handling of the ibm,pa-features
> HTM bit:
>
> - We don't support transactional memory in PR KVM, so don't tell
> the OS that we do.
>
> - In full emulation we have a minimal implementation of HTM tha
On Wed, Jul 06, 2016 at 03:35:23PM +1000, Sam Bobroff wrote:
> Advertise HTM support in ibm, pa-features if KVM indicates support when
> queried via a new capability (KVM_CAP_PPC_HTM).
>
> If KVM returns false for the capability (which may indicate that the
> host kernel doesn't support the capabi
On Wed, Jul 06, 2016 at 03:35:22PM +1000, Sam Bobroff wrote:
> Signed-off-by: Sam Bobroff
We need to wait for this to be merged on the kernel side.
> ---
> linux-headers/linux/kvm.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
>
Kees Cook writes:
> Under CONFIG_HARDENED_USERCOPY, this adds object size checking to the
> SLUB allocator to catch any copies that may span objects.
>
> Based on code from PaX and grsecurity.
>
> Signed-off-by: Kees Cook
> diff --git a/mm/slub.c b/mm/slub.c
> index 825ff4505336..0c8ace04f075 1
Hi,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.7-rc6 next-20160706]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/wei-guo-simon-gmail-com/powerpc-Export-thread_struct
On Wed, 2016-07-06 at 18:30 -0700, Michael Turquette wrote:
> Quoting Scott Wood (2016-06-15 23:21:25)
> >
> > -static struct device_node *cpu_to_clk_node(int cpu)
> > +static struct clk *cpu_to_clk(int cpu)
> > {
> > - struct device_node *np, *clk_np;
> > + struct device_node *np;
>
On 06/30/2016 11:53 AM, Akshay Adiga wrote:
Refactoring code to use frequency table index instead of pstate_id.
This abstraction will make the code independent of the pstate values.
- No functional changes
- The highest frequency is at frequency table index 0 and the frequency
decreases as
From: Simon Guo
These 2 fields track whether user process has used Altivec/VSX
registers or not. They are used by kernel to setup signal frame
on user stack correctly regarding vector part.
CRIU(Checkpoint and Restore In User space) builds signal frame
for restored process. It will need this exp
The driver stays the same.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
drivers/irqchip/Makefile| 1 +
drivers/{soc/fsl/qe => irqchip}/qe_ic.c | 0
drivers/{soc/fsl/qe => irqchip}/qe_ic.h | 0
drivers/soc/fsl/qe/Makefile |
On Wed, Jul 06, 2016 at 04:29:18PM -0300, Thiago Jung Bauermann wrote:
> Hi,
>
> Am Mittwoch, 06 Juli 2016, 16:52:26 schrieb AKASHI Takahiro:
> > +linux,usable-memory
> > +---
> > +
> > +This property is set on PowerPC and arm64 by kexec-tools during kdump
> > +to tell the crash ke
Quoting Scott Wood (2016-06-15 23:21:25)
> -static struct device_node *cpu_to_clk_node(int cpu)
> +static struct clk *cpu_to_clk(int cpu)
> {
> - struct device_node *np, *clk_np;
> + struct device_node *np;
> + struct clk *clk;
>
> if (!cpu_present(cpu))
>
Thanks for the review Fred!
On 07/07/16 04:51, Frederic Barrat wrote:
+rc = CXL_READ_VSEC_MODE_CONTROL(dev, switch_work->vsec, &val);
+if (rc) {
+dev_err(&bus->dev, "cxl: Failed to read CAPI mode control:
%i\n", rc);
+pci_dev_put(dev);
+goto err_free_work;
+}
Mauricio Faria de Oliveira writes:
> Use the DMA_ATTR_NO_WARN attribute on dma_map_sg() calls of nvme driver.
>
> Signed-off-by: Mauricio Faria de Oliveira
checkpatch.pl complains about line wrapping. Other than that, this
looks good to me.
Reviewed-by: Gabriel Krisman Bertazi
> ---
> driv
On Wed, Jul 06, 2016 at 04:05:54PM +1000, Sam Bobroff wrote:
> Introduce a new KVM capability, KVM_CAP_PPC_HTM, that can be queried to
> determine if a PowerPC KVM guest should use HTM (Hardware Transactional
> Memory).
>
> This will be used by QEMU to populate the pa-features bits in the
> guest'
Under CONFIG_HARDENED_USERCOPY, this adds object size checking to the
SLUB allocator to catch any copies that may span objects.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
init/Kconfig | 1 +
mm/slub.c| 27 +++
2 files changed, 28 insertions(
Enables CONFIG_HARDENED_USERCOPY checks on sparc.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
arch/sparc/Kconfig | 1 +
arch/sparc/include/asm/uaccess_32.h | 14 ++
arch/sparc/include/asm/uaccess_64.h | 11 +--
3 files changed, 20 in
Enables CONFIG_HARDENED_USERCOPY checks on powerpc.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/uaccess.h | 21 +++--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/
Enables CONFIG_HARDENED_USERCOPY checks on ia64.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
arch/ia64/Kconfig | 1 +
arch/ia64/include/asm/uaccess.h | 18 +++---
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/arch/ia64/Kconfig
Enables CONFIG_HARDENED_USERCOPY checks on x86. This is done both in
copy_*_user() and __copy_*_user() because copy_*_user() actually calls
down to _copy_*_user() and not __copy_*_user().
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
arch/x86/Kconfig | 2
Under CONFIG_HARDENED_USERCOPY, this adds object size checking to the
SLAB allocator to catch any copies that may span objects.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
init/Kconfig | 1 +
mm/slab.c| 30 ++
2 files changed, 31 insertio
Enables CONFIG_HARDENED_USERCOPY checks on arm64. As done by KASAN in -next,
renames the low-level functions to __arch_copy_*_user() so a static inline
can do additional work before the copy.
Signed-off-by: Kees Cook
---
arch/arm64/Kconfig | 2 ++
arch/arm64/include/asm/uaccess.h
Enables CONFIG_HARDENED_USERCOPY checks on arm.
Based on code from PaX and grsecurity.
Signed-off-by: Kees Cook
---
arch/arm/Kconfig | 1 +
arch/arm/include/asm/uaccess.h | 11 +--
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm
This is the start of porting PAX_USERCOPY into the mainline kernel. This
is the first set of features, controlled by CONFIG_HARDENED_USERCOPY. The
work is based on code by PaX Team and Brad Spengler, and an earlier port
from Casey Schaufler. Additional non-slab page tests are from Rik van Riel.
Th
Hi,
This is a start of the mainline port of PAX_USERCOPY[1]. After I started
writing tests (now in lkdtm in -next) for Casey's earlier port[2], I
kept tweaking things further and further until I ended up with a whole
new patch series. To that end, I took Rik's feedback and made a number
of other c
Most users of IS_ERR_VALUE() in the kernel are wrong, as they
pass an 'int' into a function that takes an 'unsigned long'
argument. This happens to work because the type is sign-extended
on 64-bit architectures before it gets converted into an
unsigned type.
However, anythi
Most users of IS_ERR_VALUE() in the kernel are wrong, as they
pass an 'int' into a function that takes an 'unsigned long'
argument. This happens to work because the type is sign-extended
on 64-bit architectures before it gets converted into an
unsigned type.
However, anythi
The stringify_in_c() macro may not be included. Make the dependency
explicit.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Jason Baron
---
arch/powerpc/include/asm/jump_label.h | 1 +
1 file changed, 1 insertion(+)
diff -
Add support for the DMA_ATTR_NO_WARN attribute on powerpc iommu code.
Signed-off-by: Mauricio Faria de Oliveira
---
arch/powerpc/kernel/iommu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index a8e3490..69bb17f
Use the DMA_ATTR_NO_WARN attribute on dma_map_sg() calls of nvme driver.
Signed-off-by: Mauricio Faria de Oliveira
---
drivers/nvme/host/pci.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index d1a8259..c3c3348 1
Introduce the DMA_ATTR_NO_WARN attribute, and document it.
Signed-off-by: Mauricio Faria de Oliveira
---
Documentation/DMA-attributes.txt | 17 +
include/linux/dma-attrs.h| 1 +
2 files changed, 18 insertions(+)
diff --git a/Documentation/DMA-attributes.txt b/Documentat
This patchset introduces dma_attr DMA_ATTR_NO_WARN (just like __GFP_NOWARN),
which tells the DMA-mapping subsystem to supress allocation failure reports.
On some architectures allocation failures are reported with error messages
to the system logs. Although this can help to identify and debug pro
Hi,
We are using the t1040 platform, and we have found that we need to
populate this register. In the Technical Reference Manual it's
description is section 24.3.2. This option appears in the driver, but it
doesn't appears to be used anyplace.
We we're considered adding something to the devi
Hi Zhao Qiang,
On Wed, Jul 06, 2016 at 02:01:38PM +0800, Zhao Qiang wrote:
> The codes of qe_ic init from a variety of platforms are redundant,
> merge them to a common function and put it to irqchip/qe_ic.c
>
> For non-p1021_mds mpc85xx_mds boards, use "qe_ic_init(np, 0,
> qe_ic_cascade_low_mpic
Hi,
Am Mittwoch, 06 Juli 2016, 16:52:26 schrieb AKASHI Takahiro:
> +linux,usable-memory
> +---
> +
> +This property is set on PowerPC and arm64 by kexec-tools during kdump
> +to tell the crash kernel the base address of its reserved area of memory,
> and +the size. e.g.
> +
> +/ {
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Andrew Donnellan
Add a new API, cxl_check_and_switch_mode() to allow for switching of
bi-modal CAPI cards, such as the Mellanox CX-4 network card.
When a driver requests to switch a card to CAPI mode, use PCI hotplug
infrastructure to remove al
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
The CX4 card cannot cope with a context with PE=0 due to a hardware
limitation, resulting in:
[ 34.166577] command failed, status limits exceeded(0x8), syndrome 0x5a7939
[ 34.166580] mlx5_core :01:00.1: Failed allocating uar,
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
The Mellanox CX4 in cxl mode uses a hybrid interrupt model, where
interrupts are routed from the networking hardware to the XSL using the
MSIX table, and from there will be transformed back into an MSIX
interrupt using the cxl style i
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
The Mellanox CX4 has a hardware limitation where only 4 bits of the
AFU interrupt number can be passed to the XSL when sending an interrupt,
limiting it to only 15 interrupts per context (AFU interrupt number 0 is
invalid).
In order
@@ -1572,6 +1575,9 @@ static pci_ers_result_t cxl_pci_error_detected(struct
pci_dev *pdev,
*/
for (i = 0; i < adapter->slices; i++) {
afu = adapter->afu[i];
+ /* Only participate in EEH if we are on a virtual PHB */
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
These APIs will be used by the Mellanox CX4 support. While they function
standalone to configure existing behaviour, their primary purpose is to
allow the Mellanox driver to inform the cxl driver of a hardware
limitation, which will b
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
This hooks up support for using the kernel API with a real PHB. After
the AFU initialisation has completed it calls into the PHB code to pass
it the AFU that will be used by other peer physical functions on the
adapter.
The cxl_pci_t
+ /* No special handling for cxl function: */
+ if (PCI_FUNC(dev->devfn) == 0)
+ return true;
I believe that is the first time we're getting a hint of the black magic
which is going to occur when the card is switched to cxl mode and the
appearance of a new pci func
On 07/06/2016 10:19 AM, Peter Zijlstra wrote:
> On Wed, Jul 06, 2016 at 09:47:18AM +0200, Juergen Gross wrote:
>> On 06/07/16 08:52, Peter Zijlstra wrote:
>
>>> Paolo, could you help out with an (x86) KVM interface for this?
>>
>> Xen support of this interface should be rather easy. Could you plea
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
The cxl kernel API has a concept of a default context associated with
each PCI device under the virtual PHB. The Mellanox CX4 will also use
the cxl kernel API, but it does not use a virtual PHB - rather, the AFU
appears as a physical
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
The Mellanox CX4 uses a model where the AFU is one physical function of
the device, and is used by other peer physical functions of the same
device. This will require those other devices to grab a reference on the
AFU when they are in
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
Devices that use CAPP DMA mode (such as the Mellanox CX4) require bus
master to be enabled in order for the CAPI traffic to flow. This should
be harmless to enable for other cxl devices, so unconditionally enable
it in the adapter init
Le 04/07/2016 15:22, Ian Munsie a écrit :
From: Ian Munsie
This extends the check that the adapter is in a CAPI capable slot so
that it may be called by external users in the kernel API. This will be
used by the upcoming Mellanox CX4 support, which needs to know ahead of
time if the card can
Le 04/07/2016 15:21, Ian Munsie a écrit :
From: Ian Munsie
The support for using the Mellanox CX4 in cxl mode will require
additions to the PHB code. In preparation for this, move the existing
cxl code out of pci-ioda.c into a separate pci-cxl.c file to keep things
more organised.
Signed-off
I forgot to run this series through checkpatch before sending. Looks like there
are some various whitespace errors. Will fix these and send with v2 after any
comments on the patches.
On 07/06/2016 10:44 AM, John Allen wrote:
> This series introduces a new workqueue for handling hotplug events. On
2016-07-06 20:28 GMT+08:00 Paolo Bonzini :
>
>
> On 06/07/2016 14:08, Wanpeng Li wrote:
>> 2016-07-06 18:44 GMT+08:00 Paolo Bonzini :
>>>
>>>
>>> On 06/07/2016 08:52, Peter Zijlstra wrote:
On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
> change fomr v1:
> a simplier d
On 06/07/2016 10:19, Peter Zijlstra wrote:
>>> Paolo, could you help out with an (x86) KVM interface for this?
>> >
>> > Xen support of this interface should be rather easy. Could you please
>> > Cc: xen-devel-requ...@lists.xenproject.org in the next version?
> So meta question; aren't all you v
On 06/07/2016 14:08, Wanpeng Li wrote:
> 2016-07-06 18:44 GMT+08:00 Paolo Bonzini :
>>
>>
>> On 06/07/2016 08:52, Peter Zijlstra wrote:
>>> On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
change fomr v1:
a simplier definition of default vcpu_is_preempted
skip
On Wed, 2016-06-07 at 04:58:06 UTC, Michael Neuling wrote:
> At the start of __tm_recheckpoint we save the kernel stack pointer
> (r1) in SPRG SCRATCH0 (SPRG2) so that we can restore it after the
> trecheckpoint.
...
>
> This patches moves the saving of r1 to the SPRG to the region where we
> are
2016-07-06 18:44 GMT+08:00 Paolo Bonzini :
>
>
> On 06/07/2016 08:52, Peter Zijlstra wrote:
>> On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
>>> change fomr v1:
>>> a simplier definition of default vcpu_is_preempted
>>> skip mahcine type check on ppc, and add config. remove
On Wed, Jul 06, 2016 at 12:44:58PM +0200, Paolo Bonzini wrote:
> > Paolo, could you help out with an (x86) KVM interface for this?
>
> If it's just for spin loops, you can check if the version field in the
> steal time structure has changed.
That would require remembering the old value, no?
That
On Wed, 2016-07-06 at 16:05 +1000, Sam Bobroff wrote:
> Introduce a new KVM capability, KVM_CAP_PPC_HTM, that can be queried to
> determine if a PowerPC KVM guest should use HTM (Hardware Transactional
> Memory).
>
> This will be used by QEMU to populate the pa-features bits in the
> guest's devic
On Tue, 2016-06-28 at 10:43 -0400, Pan Xinhui wrote:
> This is to fix some lock holder preemption issues. Some other locks
> implementation do a spin loop before acquiring the lock itself. Currently
> kernel has an interface of bool vcpu_is_preempted(int cpu). It take the cpu
On 06/07/2016 08:52, Peter Zijlstra wrote:
> On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
>> change fomr v1:
>> a simplier definition of default vcpu_is_preempted
>> skip mahcine type check on ppc, and add config. remove dedicated macro.
>> add one patch to drop over
On 2016年07月06日 16:32, Wanpeng Li wrote:
2016-07-06 15:58 GMT+08:00 Peter Zijlstra :
On Wed, Jul 06, 2016 at 02:46:34PM +0800, Wanpeng Li wrote:
SO it's easy for ppc to implement such interface. Note that yield_count is
set by powerVM/KVM.
and only pSeries can run a guest for now. :)
I also re
Ravi Bangoria writes:
> On Thursday 30 June 2016 11:51 AM, Michael Ellerman wrote:
>> On Thu, 2016-06-30 at 11:44 +0530, Ravi Bangoria wrote:
>>> diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
>>> index 36a5825..b87eac7 100644
>>> --- a/tools/perf/util/annotate.c
>>> +++ b/t
On 2016年07月06日 14:52, Peter Zijlstra wrote:
On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
change fomr v1:
a simplier definition of default vcpu_is_preempted
skip mahcine type check on ppc, and add config. remove dedicated macro.
add one patch to drop overl
Samuel Mendoza-Jonas writes:
> On Tue, 2016-07-05 at 15:31 +1000, Michael Ellerman wrote:
>> On Tue, 2016-28-06 at 03:11:39 UTC, Sam Mendoza-Jonas wrote:
>> > diff --git a/drivers/tty/hvc/hvc_opal.c b/drivers/tty/hvc/hvc_opal.c
>> > index b7cd0ae..8c53f5b 100644
>> > --- a/drivers/tty/hvc/hvc_opa
On 06/07/16 10:19, Peter Zijlstra wrote:
> On Wed, Jul 06, 2016 at 09:47:18AM +0200, Juergen Gross wrote:
>> On 06/07/16 08:52, Peter Zijlstra wrote:
>
>>> Paolo, could you help out with an (x86) KVM interface for this?
>>
>> Xen support of this interface should be rather easy. Could you please
>>
2016-07-06 15:58 GMT+08:00 Peter Zijlstra :
> On Wed, Jul 06, 2016 at 02:46:34PM +0800, Wanpeng Li wrote:
>> > SO it's easy for ppc to implement such interface. Note that yield_count is
>> > set by powerVM/KVM.
>> > and only pSeries can run a guest for now. :)
>> >
>> > I also review x86 related co
On Wed, Jul 06, 2016 at 09:47:18AM +0200, Juergen Gross wrote:
> On 06/07/16 08:52, Peter Zijlstra wrote:
> > Paolo, could you help out with an (x86) KVM interface for this?
>
> Xen support of this interface should be rather easy. Could you please
> Cc: xen-devel-requ...@lists.xenproject.org in t
On Wed, Jul 06, 2016 at 02:46:34PM +0800, Wanpeng Li wrote:
> > SO it's easy for ppc to implement such interface. Note that yield_count is
> > set by powerVM/KVM.
> > and only pSeries can run a guest for now. :)
> >
> > I also review x86 related code, looks like we need add one hyer-call to get
> >
On 06/07/16 08:52, Peter Zijlstra wrote:
> On Tue, Jun 28, 2016 at 10:43:07AM -0400, Pan Xinhui wrote:
>> change fomr v1:
>> a simplier definition of default vcpu_is_preempted
>> skip mahcine type check on ppc, and add config. remove dedicated macro.
>> add one patch to drop overload
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