Dear All,
I'm trying with buildroot to build the linux-4.4.3 for an iomega 150d
machine mounting the mpc8347E sys.
Due the old U-Boot version is not possible to use the standard uImage, but
it is needed to set the cuImage target (the one embedding the device tree).
I start using the default conf
Those come from
XSL_databook_09_June_2014.pdf
The registers in this doc listed at 0x400-600 are offset by 0x400, so 0x568 = 0x168.
John WalthourDevelopment EngineerIBM Corporation | Systems & Technology GroupPhone: (512) 973-1095 | T/L: 363-1095Email: jwalth...@us.ibm.comreturn 0
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On Tue, May 24, 2016 at 06:45:12PM +0530, Shreyas B. Prabhu wrote:
> POWER ISA v3 defines a new idle processor core mechanism. In summary,
> a) new instruction named stop is added. This instruction replaces
> instructions like nap, sleep, rvwinkle.
> b) new per thread SPR named Processor St
On Fri, May 27, 2016 at 4:12 PM, Brian Norris
wrote:
> Hi Leo,
>
> On Fri, May 27, 2016 at 10:44:01PM +0200, Boris Brezillon wrote:
>> On Fri, 27 May 2016 15:15:00 -0500
>> Leo Li wrote:
>> > On Wed, May 25, 2016 at 3:34 PM, Boris Brezillon
>> > wrote:
>> > > On Wed, 25 May 2016 14:18:43 -0500
>
On Fri, 27 May 2016 14:12:47 -0700
Brian Norris wrote:
>
> > Anyway, Brian, can you take it into your tree and make it appear in
> > -rc1 (or earlier if it's still possible)?
>
> Not sure how I could get it any "earlier"? It's not making -rc1 at this
> point.
I meant -rc2 :)
--
Boris Brezi
Hi Leo,
On Fri, May 27, 2016 at 10:44:01PM +0200, Boris Brezillon wrote:
> On Fri, 27 May 2016 15:15:00 -0500
> Leo Li wrote:
> > On Wed, May 25, 2016 at 3:34 PM, Boris Brezillon
> > wrote:
> > > On Wed, 25 May 2016 14:18:43 -0500
> > > Leo Li wrote:
> > >> It seems that the patch at https://pa
Dear All,
I'm trying with buildroot to build the linux-4.4.3 for an iomega 150d
machine mounting the mpc8347E sys.
Due the old U-Boot version is not possible to use the standard uImage, but
it is needed to set the cuImage target (the one embedding the device tree).
I start using the default config
Hi Leo,
On Fri, 27 May 2016 15:15:00 -0500
Leo Li wrote:
> On Wed, May 25, 2016 at 3:34 PM, Boris Brezillon
> wrote:
> > On Wed, 25 May 2016 14:18:43 -0500
> > Leo Li wrote:
> >
> >> On Thu, Apr 7, 2016 at 7:45 PM, Boris Brezillon
> >> wrote:
> >> > On Wed, 6 Apr 2016 18:53:39 +
> >>
On Wed, May 25, 2016 at 3:34 PM, Boris Brezillon
wrote:
> On Wed, 25 May 2016 14:18:43 -0500
> Leo Li wrote:
>
>> On Thu, Apr 7, 2016 at 7:45 PM, Boris Brezillon
>> wrote:
>> > On Wed, 6 Apr 2016 18:53:39 +
>> > Yang-Leo Li wrote:
>> >
>> >>
>> >>
>> >> > -Original Message-
>> >> >
Hi Ian,
It looks good, just one question:
+/* XSL registers (Mellanox CX4) */
+static const cxl_p1_reg_t CXL_XSL_Timebase = {0x0100};
+static const cxl_p1_reg_t CXL_XSL_TB_CTLSTAT = {0x0108};
+static const cxl_p1_reg_t CXL_XSL_FEC = {0x0158};
+static const cxl_p1_reg_t CXL_XSL_DSNCTL
On 2016年05月27日 00:50, Peter Zijlstra wrote:
On Wed, May 25, 2016 at 04:18:03PM +0800, Pan Xinhui wrote:
_testspinlcok__pv-qspinlcok_
|futex hash | 556370 ops | 629634 ops |
|futex lock-pi | 362 ops | 367 ops
On 2016年05月27日 00:57, Peter Zijlstra wrote:
On Thu, May 26, 2016 at 06:47:29PM +0200, Peter Zijlstra wrote:
On Wed, May 25, 2016 at 04:18:08PM +0800, Pan Xinhui wrote:
cmpxchg_release is light-wight than cmpxchg, we can gain a better
performace then. On some arch like ppc, barrier impact the
Hai,
Hai,
I am using IBM PPC440GX board.In arch/powerpc/cpu/ppc4xx/u-boot.lds i am
usig the below details but MEMORY function failure coming. i am adding the
file .
/*
* Copyright 2007-2009 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "config.h" /* CONFIG_BOA
This will allow IPSEC on SEC1
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 180 +++
1 file changed, 180 insertions(+)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index b554f56..d3951e3 100644
--- a/drivers/crypto
SEC1 doesn't have IPSEC_ESP descriptor type but it is able to perform
IPSEC using HMAC_SNOOP_NO_AFEU, which is also existing on SEC2
In order to be able to define descriptors templates for SEC1 without
breaking SEC2+, we have to give lower priority to HMAC_SNOOP_NO_AFEU
so that SEC2+ selects IPSEC_
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index c17e6c9..fcdf83b 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -,14 +,6 @@ next:
This patchs enhances the IPSEC_ESP related functions for them to
also supports the same operations with descriptor type
HMAC_SNOOP_NO_AFEU.
The differences between the two descriptor types are:
* pointeurs 2 and 3 are swaped (Confidentiality key and
Primary EU Context IN)
* HMAC_SNOOP_NO_AFEU
In preparation of IPSEC for SEC1, first step is to make the mapping
helpers more generic so that they can also be used by AEAD functions.
First, the functions are moved before IPSEC functions in talitos.c
talitos_sg_unmap() and unmap_sg_talitos_ptr() are merged as they
are quite similar, the seco
Use helper for all modifications to talitos_ptr in preparation to
the implementation of AEAD for SEC1
to_talitos_ptr_extent_clear() has been removed in favor of
to_talitos_ptr_ext_set() to set any value and
to_talitos_ptr_ext_or() to or the extent field with a value
name has been shorten to help k
This set of patches provides the implementation of AEAD for
talitos SEC1.
Christophe Leroy (6):
crypto: talitos - using helpers for all talitos_ptr operations
crypto: talitos - making mapping helpers more generic
crypto: talitos - Implement AEAD for SEC1 using HMAC_SNOOP_NO_AFEU
crypto: ta
On 21/04/2016 18:00, Laurent Dufour wrote:
> On 13/04/2016 07:14, Michael Ellerman wrote:
>> On Mon, 2016-04-11 at 09:40 +0200, Laurent Dufour wrote:
>>> On 07/04/2016 23:49, Michael Ellerman wrote:
On 7 April 2016 7:23:46 pm AEST, Laurent Dufour
wrote:
> This series is required to
On Fri, May 27, 2016 at 7:21 AM, Andrew Morton
wrote:
> hm, this is all ten year old Mel code.
>
> What's the priority on this? What are the user-visible runtime
> effects, how many people are affected, etc?
Low priority. To get bitten by this you need to enable a zone that appears
after ZONE_MO
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