Hi Uffe,
Could we merge this patchset? ...
It has been a long time to wait for Arnd's response...
Thanks a lot.
Best regards,
Yangbo Lu
> -Original Message-
> From: Yangbo Lu
> Sent: Friday, May 20, 2016 2:06 PM
> To: 'Scott Wood'; Arnd Bergmann; linux-arm-ker...@lists.infradead.org
On Wed, May 25, 2016 at 01:54:23PM +0800, Yongji Xie wrote:
> On 2016/5/25 5:11, Bjorn Helgaas wrote:
> >On Wed, Apr 27, 2016 at 08:43:27PM +0800, Yongji Xie wrote:
> >>The capability of IRQ remapping is abstracted on IOMMU side on
> >>some archs. There is a existing flag IOMMU_CAP_INTR_REMAP for t
On Wed, 2016-05-25 at 10:59 -0400, Robert P. J. Day wrote:
> i asked about this a while ago, didn't see any response, and i'm
> still curious ... i have an MPC8360 system, ported u-boot to it, and
> in the dts file i got from someone, the bus and brg frequencies were
> set to lower values than t
On Wed, 2016-05-25 at 10:03 -0300, Guilherme G. Piccoli wrote:
> On 05/25/2016 02:45 AM, Michael Ellerman wrote:
> >
> > Yeah please increase the bitmap size to 65536. It will only take 8KB of
> > memory,
> > which is negligible.
>
> Well, since I sent a v6 and you replied there too, I guess we
On Thu, May 12, 2016 at 07:04:15PM +0530, Bharata B Rao wrote:
> memory_hotplug_max() uses hot_add_drconf_memory_max() to get maxmimum
> addressable memory by referring to ibm,dyanamic-memory property. There
> are three problems with the current approach:
>
> 1 hot_add_drconf_memory_max() assumes
On Thu, May 12, 2016 at 07:04:14PM +0530, Bharata B Rao wrote:
> Signed-off-by: Bharata B Rao
Reviewed-by: David Gibson
> ---
> arch/powerpc/mm/numa.c | 20 ++--
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.
On Thu, May 26, 2016 at 09:56:07AM +1000, Gavin Shan wrote:
>In commit <8445a87f7092> ("powerpc/iommu: Remove the dependency
>on EEH struct in DDW mechanism"), the PE address was replaced
>with the PCI config address in order to remove dependency on EEH.
>According to PAPR spec, firmware (pHyp or Q
In commit <8445a87f7092> ("powerpc/iommu: Remove the dependency
on EEH struct in DDW mechanism"), the PE address was replaced
with the PCI config address in order to remove dependency on EEH.
According to PAPR spec, firmware (pHyp or QEMU) should accept
"xxBBSSxx" format PCI config address, not "xx
Align the hot loops in our assembly implementation of strncpy(),
strncmp() and memchr().
Signed-off-by: Anton Blanchard
---
Index: linux.junk/arch/powerpc/lib/string.S
===
--- linux.junk.orig/arch/powerpc/lib/string.S
+++ linux.junk
A number of our assembly implementations of string functions do not
align their hot loops. I was going to align them manually, but I
realised that they are are almost instruction for instruction
identical to what gcc produces, with the advantage that gcc does
align them.
In light of that, let's ju
On Wed, 25 May 2016 14:18:43 -0500
Leo Li wrote:
> On Thu, Apr 7, 2016 at 7:45 PM, Boris Brezillon
> wrote:
> > On Wed, 6 Apr 2016 18:53:39 +
> > Yang-Leo Li wrote:
> >
> >>
> >>
> >> > -Original Message-
> >> > From: Brian Norris [mailto:computersforpe...@gmail.com]
> >> > Sent
On Thu, Apr 7, 2016 at 7:45 PM, Boris Brezillon
wrote:
> On Wed, 6 Apr 2016 18:53:39 +
> Yang-Leo Li wrote:
>
>>
>>
>> > -Original Message-
>> > From: Brian Norris [mailto:computersforpe...@gmail.com]
>> > Sent: Wednesday, April 06, 2016 12:53 PM
>> > To: Li Yang
>> > Cc: Scott Wood
i asked about this a while ago, didn't see any response, and i'm
still curious ... i have an MPC8360 system, ported u-boot to it, and
in the dts file i got from someone, the bus and brg frequencies were
set to lower values than they should have been, but we left them there
and, once the system w
On 05/25/2016 02:45 AM, Michael Ellerman wrote:
Hi Guilherme,
Sorry for the very late reply, this got lost in my email filters.
No problem Michael, thanks for replying!
On Mon, 2016-03-28 at 09:36 -0300, Guilherme G. Piccoli wrote:
On 03/25/2016 06:33 AM, Michael Ellerman wrote:
+static
On 05/25/2016 03:26 AM, Michael Ellerman wrote:
On Wed, 2016-18-05 at 01:48:00 UTC, "Guilherme G. Piccoli" wrote:
The domain/PHB field of PCI addresses has its value obtained from a
global variable, incremented each time a new domain (represented by
struct pci_controller) is added on the system.
Aneesh,
I understand what you mean. I tried
range.size, pgprot_val(pgprot_noncached(__pgprot(0;
a few days ago. It compiled but the kernel doesn't boot.
Cheers,
Christian
On 25 May 2016 at 08:58 AM, Christian Zigotzky wrote:
Aneesh,
Thank you for your help. I tried
/* Workaround for
pseries has PowerVM support, the default option is Y.
Signed-off-by: Pan Xinhui
---
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/platforms/pseries/Kconfig | 8
2 files changed, 9 insertions(+)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index
As we need let pv-qspinlock-kernel run on all environment which might
have no powervm, we should runtime choose which qspinlock version to
use.
The default pv-qspinlock use native version. pv_lock initialization
should be done in bootstage with irq disabled. And if there is PHYP,
restore pv_lock_o
pv-qspinlock core has pv_wait/pv_kick which will give a better
performace by yielding and kicking cpu at some cases.
lets support them by adding two corresponding helper functions.
Signed-off-by: Pan Xinhui
---
arch/powerpc/include/asm/spinlock.h | 4
arch/powerpc/lib/locks.c|
Base code to enable qspinlock on powerpc. this patch add some #ifdef
here and there. Although there is no paravirt related code, we can
successfully build a qspinlock kernel after apply this patch.
Signed-off-by: Pan Xinhui
---
arch/powerpc/include/asm/qspinlock.h | 22 +
pseries will use qspinlock by default.
Signed-off-by: Pan Xinhui
---
arch/powerpc/platforms/pseries/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/platforms/pseries/Kconfig
b/arch/powerpc/platforms/pseries/Kconfig
index bec90fb..f669323 100644
--- a/arch/powerpc/platfo
cmpxchg_release is light-wight than cmpxchg, we can gain a better
performace then. On some arch like ppc, barrier impact the performace
too much.
Suggested-by: Boqun Feng
Signed-off-by: Pan Xinhui
---
kernel/locking/qspinlock_paravirt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
change from v2:
__spin_yeild_cpu() will yield slices to lpar if target cpu is running.
remove unnecessary rmb() in __spin_yield/wake_cpu.
__pv_wait() will check the *ptr == val.
some commit message change
change fome v1:
separate into 6 pathes from one patch
If the SRAM region parameters are missing the SRAM driver
probing exits and the L2 region is configured as L2 cache
entirely. This is the expected default behaviour, so it
makes no sense to report it as an error.
Signed-off-by: Claudiu Manoil
---
v2: drop info print on Scott's request
arch/pow
Hi Matt,
"Matthew R. Ochs" writes:
> The purpose for the count is so the AFU driver is only called when it
> has something to send. Otherwise we don't want to be called.
Agreed, but this opens up a possible boundary condition where in we have
non-zero event count and deliver_event callback retur
Aneesh,
Thank you for your help. I tried
/* Workaround for lack of device tree */
if (primary) {
__ioremap_at(range.cpu_addr, (void
*)ISA_IO_BASE,
range.size, HPTE_R_C | HPTE_R_M);
hose-
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