On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> + if (unlikely(fd_status & FM_FD_STAT_RX_ERRORS) != 0) {
> + if (net_ratelimit())
> + netif_warn(priv, hw, net_dev, "FD status = 0x%08x\n",
> + fd_status & FM_FD_STAT
On Tue, 2015-11-03 at 00:33 -0600, Dogra Raghav-B46184 wrote:
> Hi Scott,
>
> I just checked on patchwork and noticed that the original patch has been
> modified as somehow my original comment has become part of the patch:
> + if (!lbc)
> + goto out;
>
> ctrl->saved_regs =
Hi Scott,
I just checked on patchwork and noticed that the original patch has been
modified as somehow my original comment has become part of the patch:
+ if (!lbc)
+ goto out;
ctrl->saved_regs = kmalloc(sizeof(struct fsl_lbc_regs), GFP_KERNEL);
if (!ctrl->s
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, November 03, 2015 11:10 AM
To: Dogra Raghav-B46184
Cc: Kushwaha Prabhakar-B32579 ;
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry sequence
On Mon, 2015-11-02 at 23:31 -0600, Dogr
On Tue, 2015-11-03 at 00:09 -0600, Dogra Raghav-B46184 wrote:
>
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 03, 2015 11:10 AM
> To: Dogra Raghav-B46184
> Cc: Kushwaha Prabhakar-B32579 ;
> linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH 1/2] mpc85xx/lbc:
Map ID values with corresponding register names.These names are then
displayed when user issues perf record with the -I option
followed by perf report/script with -D option.
Signed-off-by: Anju T
---
tools/perf/arch/powerpc/include/perf_regs.h | 114
tools/perf/confi
The perf infrastructure uses a bit mask to find out
valid registers to display. Define a register mask
for supported registers defined in asm/perf_regs.h.
The bit positions also correspond to register IDs
which is used by perf infrastructure to fetch the register
values.CONFIG_HAVE_PERF_REGS enable
The enum definition assigns an 'id' to each register in "struct pt_regs"
of arch/powerpc.The order of these values in the enum definition are
based on the corresponding macros in
arch/powerpc/include/uapi/asm/ptrace.h .
Signed-off-by: Anju T
---
arch/powerpc/include/uapi/asm/perf_regs.h | 54 +++
This short patch series adds the ability to sample the interrupted
machine state for each hardware sample.
To test this patchset,
Eg:
$perf record -I ls // record machine state at interrupt
$perf script -D //read the perf.data file
Sample output obtained for this patchset/ output looks li
On Mon, 2015-11-02 at 23:31 -0600, Dogra Raghav-B46184 wrote:
>
> -Original Message-
> From: Wood Scott-B07421
> Sent: Tuesday, November 03, 2015 4:31 AM
> To: Dogra Raghav-B46184
> Cc: Kushwaha Prabhakar-B32579 ;
> linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH 1/2] mpc85xx/lbc: m
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, November 03, 2015 4:31 AM
To: Dogra Raghav-B46184
Cc: Kushwaha Prabhakar-B32579 ;
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 1/2] mpc85xx/lbc: modify suspend/resume entry sequence
On Mon, 2015-11-02 at 00:12 -0600, Dogra
On Tue, 2015-11-03 at 10:38 +0530, Aneesh Kumar K.V wrote:
> I also ran mmtest configs/config-global-dhp__pagealloc-performance
> config with changes including this series. (ie, the changes tested
> include two patch series, one which change the pte format and this
> series). I am attaching the res
Paul Mackerras writes:
> On Wed, Oct 21, 2015 at 01:42:26AM +0530, Aneesh Kumar K.V wrote:
>> Hi,
>>
>> This patch series is on top of the series posted at
>>
>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-October/135299.html
>> "[PATCH V4 00/31] powerpc/mm: Update page table format f
Denis Kirjanov writes:
> On 10/23/15, Aneesh Kumar K.V wrote:
>> Denis Kirjanov writes:
>>
>>> On 10/17/15, Aneesh Kumar K.V wrote:
Hi All,
This patch series attempt to update book3s 64 linux page table format to
make it more flexible. Our current pte format is very restric
From:
Date: Mon, 2 Nov 2015 14:30:12 +0200
> +static int clear_iram(struct fman *fman)
> +{
> + struct fman_iram_regs __iomem *iram;
> + int i, count;
> +
> + iram = (struct fman_iram_regs __iomem *)(fman->base_addr + IMEM_OFFSET);
"fman->base_addr" is of type "void __iomem *", there
On Tue, 2015-11-03 at 10:48 +1100, Ian Munsie wrote:
> Excerpts from Michael Ellerman's message of 2015-11-02 11:53:45 +1100:
> > On Thu, 2015-10-29 at 13:39 +0100, Frederic Barrat wrote:
> >
> > > When the cxl driver creates a context, it stores the pid of the
> > > calling task, incrementing the
Excerpts from Michael Ellerman's message of 2015-11-02 11:53:45 +1100:
> On Thu, 2015-10-29 at 13:39 +0100, Frederic Barrat wrote:
>
> > When the cxl driver creates a context, it stores the pid of the
> > calling task, incrementing the reference count on the struct
> > pid. Current code mistakenly
On Mon, 2015-11-02 at 00:12 -0600, Dogra Raghav-B46184 wrote:
> -Original Message-
> From: Raghav Dogra [mailto:rag...@freescale.com]
> Sent: Friday, October 30, 2015 11:55 AM
> To: linuxppc-dev@lists.ozlabs.org
> Cc: Wood Scott-B07421 ; Kushwaha Prabhakar-B32579 <
> prabha...@freescale.co
On Fri, Oct 30, 2015 at 07:05:05PM +1100, Alexey Kardashevskiy wrote:
>On 10/30/2015 06:18 PM, Wei Yang wrote:
>>On Fri, Oct 30, 2015 at 03:11:20PM +1100, Alexey Kardashevskiy wrote:
>>>On 10/26/2015 02:15 PM, Wei Yang wrote:
PEs for VFs don't have primary bus. So they have to have their own re
On Mon, 2015-11-02 at 10:41 -0800, Ram Pai wrote:
> On Mon, Nov 02, 2015 at 12:23:36PM +1100, Michael Ellerman wrote:
> > On Fri, 2015-10-30 at 15:31 -0700, Ram Pai wrote:
> > > icswx occasionally under heavy load sets bit 3 of condition register 0.
> >
> > Why?
>
> The hardware manual says that bi
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> Add support for Scater/Gather (S/G) frames. The FMan can place
> the frame content into multiple buffers and provide a S/G Table
> (SGT) into one first buffer with references to the others.
trivia:
> diff --git a/drivers/net/ethernet/frees
This patch fixes a bug where a kernel warning is triggered when performing
a memory hotplug on ppc64. This warning may also occur on any architecture
that has multiple sections per memory block.
[ 78.300767] [ cut here ]
[ 78.300768] WARNING: at ../drivers/base/memory.c
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> Add a series of counters to be exported through ethtool:
> - add detailed counters for reception errors;
> - add detailed counters for QMan enqueue reject events;
> - count the number of fragmented skbs received from the stack;
> - count all
Export all Power8-specific PMU events in sysfs. These will be visible
in /sys/devices/cpu/events and can be used with perf:
perf record -e 'cpu/PM_GCT_NOSLOT_CYC/' ...
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-events-list.h | 1076 +++-
Rename following events to be consistent with the specs.
PM_L1_PREF to PM_LSU_L1_PREF
PM_PPC_CMPL to PM_INST_CMPL
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-events-list.h | 2 +-
arch/powerpc/perf/power8-pmu.c | 6 +++---
2 files changed, 4 insertions
Export generic and cache perf events for Power8 in sysfs.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/perf/power8-events-list.h | 35
arch/powerpc/perf/power8-pmu.c | 76 +-
2 files changed, 73 insertions(+), 38 deletions(-)
creat
We used the PME_ prefix earlier to avoid some macro/variable name
collisions. We have since changed the way we define/use the event
macros so we no longer need the prefix.
By dropping the prefix, we keep the the event macros consistent with
their official names.
Reported-by: Michael Ellerman
Si
For consistency with Power7, export Power8 PMU events in sysfs.
This would also allow users to specify the PMU events by name:
perf stat -e 'cpu/PM_VSU1_FPSCR/' sleep 1
Sukadev Bhattiprolu (4):
powerpc/perf: Remove PME_ prefix for power7 events
powerpc/perf: Export Power8 generic and
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> Add support for Scater/Gather (S/G) frames. The FMan can place
> the frame content into multiple buffers and provide a S/G Table
> (SGT) into one first buffer with references to the others.
trivia: scatter
> diff --git a/drivers/net/ethern
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> This introduces the Freescale Data Path Acceleration Architecture
> (DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
> BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
> the Freescale DPAA QorIQ platforms.
[]
On Mon, 2015-11-02 at 19:31 +0200, Madalin Bucur wrote:
> Introduce managed counterparts for alloc_percpu() and free_percpu().
> Add devm_alloc_percpu() and devm_free_percpu() into the managed
> interfaces list.
trivia, could be fixed later
> +/**
> + * __devm_alloc_percpu - Resource-managed allo
On Mon, Nov 02, 2015 at 12:24:36PM +1100, Michael Ellerman wrote:
> On Fri, 2015-10-30 at 15:13 -0700, Ram Pai wrote:
>
> > The nx-842 compressor overshoots the output buffer corrupting memory.
> > Verified
> > that the following patch the issue on a LE system.
>
> This seems like a bug fix, so
On Mon, Nov 02, 2015 at 12:23:36PM +1100, Michael Ellerman wrote:
> On Fri, 2015-10-30 at 15:31 -0700, Ram Pai wrote:
> > icswx occasionally under heavy load sets bit 3 of condition register 0.
>
> Why?
The hardware manual says that bit is undefined, though it is set under some
conditions.
>
>
Add support for basic ethtool operations.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/Makefile | 2 +-
.../net/ethernet/freescale/dpaa/dpaa_eth_common.c | 2 +
.../net/ethernet/freescale/dpaa/dpaa_eth_common.h | 3 +
drivers/net/ethernet/freescale/dpaa/dpaa
Add a series of counters to be exported through ethtool:
- add detailed counters for reception errors;
- add detailed counters for QMan enqueue reject events;
- count the number of fragmented skbs received from the stack;
- count all frames received on the Tx confirmation path;
- add congestion gro
Introduce managed counterparts for alloc_percpu() and free_percpu().
Add devm_alloc_percpu() and devm_free_percpu() into the managed
interfaces list.
Signed-off-by: Madalin Bucur
Tested-by: Madalin-Cristian Bucur
---
Documentation/driver-model/devres.txt | 4 +++
drivers/base/devres.c
Add support for Scater/Gather (S/G) frames. The FMan can place
the frame content into multiple buffers and provide a S/G Table
(SGT) into one first buffer with references to the others.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 6 +
drivers/net/ether
Allow the selection of the transmission queue based on the CPU id.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/Kconfig | 10 ++
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c| 3 +++
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h| 6 ++
Export Frame Queue and Buffer Pool IDs through sysfs.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/Makefile | 2 +-
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 2 +
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h | 3 +
.../net/ethernet/freescale/d
Add trace points on the hot processing path.
Signed-off-by: Ruxandra Ioana Radulescu
---
drivers/net/ethernet/freescale/dpaa/Makefile | 1 +
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 12 ++
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h | 4 +
.../net/ethernet/freescale
This introduces the Freescale Data Path Acceleration Architecture
(DPAA) Ethernet driver (dpaa_eth) that builds upon the DPAA QMan,
BMan, PAMU and FMan drivers to deliver Ethernet connectivity on
the Freescale DPAA QorIQ platforms.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/
This patch series adds the Ethernet driver for the Freescale
QorIQ Data Path Acceleration Architecture (DPAA).
This version includes changes following the feedback received
on previous versions from Eric Dumazet, Bob Cochran, Joe Perches,
Paul Bolle, Joakim Tjernlund, Scott Wood, David Miller - th
From: Igal Liberman
This patch adds the Ethernet MAC driver supporting the three
different types of MACs: dTSEC, tGEC and mEMAC.
Signed-off-by: Igal Liberman
---
drivers/net/ethernet/freescale/fman/Makefile |3 +-
drivers/net/ethernet/freescale/fman/mac.c| 980
From: Igal Liberman
Add the Data Path Acceleration Architecture Frame Manger Port Driver.
The FMan driver uses a module called "Port" to represent the physical
TX and RX ports.
Each FMan version has different number of physical ports.
This patch adds The FMan Port configuration, initialization an
From: Igal Liberman
The Storage Profiles contain parameters that are used
by the FMan for frame reception and transmission.
Signed-off-by: Igal Liberman
---
drivers/net/ethernet/freescale/fman/Makefile |2 +-
drivers/net/ethernet/freescale/fman/fman_sp.c | 167 +
From: Igal Liberman
Add the Data Path Acceleration Architecture Frame Manger Driver.
The FMan embeds a series of hardware blocks that implement a group
of Ethernet interfaces. This patch adds The FMan configuration,
initialization and runtime control routines.
The FMan driver supports several ha
From: Igal Liberman
Add Frame Manager Multi-User RAM support.
This internal FMan memory block is used by the
FMan hardware modules, the management being made
through the generic allocator.
The FMan Internal memory, for example, is used for
allocating transmit and receive FIFOs.
Signed-off-by: I
From: Igal Liberman
The Freescale Data Path Acceleration Architecture (DPAA) is a set
of hardware components on specific QorIQ multicore processors.
This architecture provides the infrastructure to support
simplified sharing of networking interfaces and accelerators
by multiple CPU cores and the
On Wed, 2015-21-10 at 11:29:13 UTC, Denis Kirjanov wrote:
> Building with CONFIG_DEBUG_SECTION_MISMATCH
> gives the following warning:
>
> WARNING: vmlinux.o(.text+0x41fa8): Section mismatch in reference from
> the function .msi_bitmap_alloc() to the function
> .init.text:.memblock_virt_alloc_try_
On Tue, 2015-27-10 at 15:46:47 UTC, Nathan Fontenot wrote:
> Commit a030e1e4bbd085bbcfd0a23f8d355fcd41f39bed make a change to use
> kstrndup() instead of kmalloc() + strlcpy() in the pseries_of_derive_parent()
> routine that introduces a subtle change in the parent path name generated.
> The kstrnd
On Mon, Nov 02, 2015 at 10:40:36AM +1100, Alexey Kardashevskiy wrote:
>On 11/01/2015 12:53 PM, Wei Yang wrote:
>>On Fri, Oct 30, 2015 at 04:20:48PM +1100, Alexey Kardashevskiy wrote:
>>>On 10/26/2015 02:16 PM, Wei Yang wrote:
Different from PCI bus dependent PE, PE for VFs doesn't have the
>>>
On Mon, Nov 02, 2015 at 09:30:32AM +0800, Boqun Feng wrote:
> According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_
> versions all need to be fully ordered, however they are now just
> RELEASE+ACQUIRE, which are not fully ordered.
>
> So also replace PPC_RELEASE_BARRIER and PPC_ACQUI
On Mon, Nov 02, 2015 at 09:30:31AM +0800, Boqun Feng wrote:
> According to memory-barriers.txt:
>
> > Any atomic operation that modifies some state in memory and returns
> > information about the state (old or new) implies an SMP-conditional
> > general memory barrier (smp_mb()) on each side of th
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