On Fri, Oct 30, 2015 at 02:33:49PM +1100, Alexey Kardashevskiy wrote:
>On 10/26/2015 02:15 PM, Wei Yang wrote:
>>VFs and their corresponding pci_dn instances are created and released
>>dynamically as their PF's SRIOV capability is enabled and disabled.
>>The patch creates and releases EEH devices f
On Fri, Oct 30, 2015 at 02:22:43PM +1100, Alexey Kardashevskiy wrote:
>On 10/26/2015 02:15 PM, Wei Yang wrote:
>>EEH address cache, which helps to locate the PCI device according to
>>the given (physical) MMIO address, didn't cover PCI bridges. Also, it
>>shouldn't return PF
>
>"it shouldn't return
On Fri, Oct 30, 2015 at 02:04:12PM +1100, Alexey Kardashevskiy wrote:
>On 10/26/2015 02:15 PM, Wei Yang wrote:
>>As commit ac205b7bb72f ("PCI: make sriov work with hotplug remove") indicates,
>>VFs, which might be hooked to same PCI bus as their PF should be removed
>
>A comma is missing before "sh
On 10/26/2015 02:16 PM, Wei Yang wrote:
From: Gavin Shan
When passing through SRIOV VF from host to guest via VFIO PCI
infrastructure, the VF is resetted by EEH specific backend
(pcibios_set_pcie_reset_state()). We can't block the PCI config,
otherwise, the reset (FLR or AF FLR), to be complete
On 10/26/2015 02:16 PM, Wei Yang wrote:
When PF is EEH aware while VFs are not, VFs will be removed during EEH
recovery. This is not supported in current code, while will leads to the VF
lost.
This patch fixes this by adding VFs back. VFs should be added back after PF
get recovered properly.
Si
On 10/26/2015 02:16 PM, Wei Yang wrote:
Different from PCI bus dependent PE, PE for VFs doesn't have the
s/Different from/Unlike/
primary bus, on which the PCI hotplug is implemented. The patch
supports error recovery, especially the PCI hotplug for VF's PE.
The patch adds support for erro
On 10/26/2015 02:15 PM, Wei Yang wrote:
After PE reset, OPAL API opal_pci_reinit() is called on all devices
contained in the PE to reinitialize them. However, VFs can't be seen
from skiboot firmware. We have to implement the functions, similar
those in skiboot firmware, to reinitialize VFs after
On 10/26/2015 02:15 PM, Wei Yang wrote:
PEs for VFs don't have primary bus. So they have to have their own reset
backend, which is used during EEH recovery. The patch implements the reset
backend for VF's PE by issuing FLR or AF FLR to the VFs, which are contained
in the PE.
[gwshan: changelog a
On 10/26/2015 02:15 PM, Wei Yang wrote:
Current EEH recovery code works with the assumption: the PE has primary
bus. Unfortunately, that's not true for VF PEs, which generally contains
one or multiple VFs (for VF group case).
What is that "VF group case"? Is not it a "compound PE" thingy which
On 10/26/2015 02:15 PM, Wei Yang wrote:
VFs and their corresponding pci_dn instances are created and released
dynamically as their PF's SRIOV capability is enabled and disabled.
The patch creates and releases EEH devices for VFs when creating and
releasing their pci_dn instances, which means EEH
On 10/26/2015 02:15 PM, Wei Yang wrote:
EEH address cache, which helps to locate the PCI device according to
the given (physical) MMIO address, didn't cover PCI bridges. Also, it
shouldn't return PF
"it shouldn't return" is about the cache, right? eeh_addr_cache_get_dev() -
this guy can "retur
On 10/26/2015 02:15 PM, Wei Yang wrote:
As commit ac205b7bb72f ("PCI: make sriov work with hotplug remove") indicates,
VFs, which might be hooked to same PCI bus as their PF should be removed
A comma is missing before "should be" (or you did not need a comma after
"VFs" may be :) ).
before
Acked-by: Ian Munsie
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On Fri, Oct 30, 2015 at 01:05:43PM +1100, Alexey Kardashevskiy wrote:
>On 10/26/2015 02:15 PM, Wei Yang wrote:
>>The patch caches the VF index in pci_dn, which can be used to calculate
>>VF's bus, device and function number. Those information helps to locate
>>the VF's PCI device instance when doin
On 10/26/2015 02:15 PM, Wei Yang wrote:
The patch caches the VF index in pci_dn, which can be used to calculate
VF's bus, device and function number. Those information helps to locate
the VF's PCI device instance when doing hotplug during EEH recovery if
necessary.
The patch itself does not ma
From: Nishanth Aravamudan
Date: Thu, 29 Oct 2015 08:57:01 -0700
> So, would that imply changing just the NVMe driver code rather than
> adding the dma_page_shift API at all? What about
> architectures that can support the larger page sizes? There is an
> implied performance impact, at least, of s
On Tue, Oct 27, 2015 at 11:06:52AM +0800, Boqun Feng wrote:
> On Tue, Oct 27, 2015 at 01:33:47PM +1100, Michael Ellerman wrote:
> > On Mon, 2015-26-10 at 10:15:36 UTC, Boqun Feng wrote:
> > > This patch fixes two problems to make value-returning atomics and
> > > {cmp}xchg fully ordered on PPC.
> >
On 29/10/15 23:39, Frederic Barrat wrote:
When the cxl driver creates a context, it stores the pid of the
calling task, incrementing the reference count on the struct
pid. Current code mistakenly increments the reference count twice,
once through get_task_pid(), once through get_pid(). The refere
On Fri, 2015-10-30 at 08:48 +0900, Simon Horman wrote:
> Hi all,
>
> I am happy to announce the release of kexec-tools 2.0.11-rc1.
>
> This is an incremental feature pre-release.
>
> So long as no serious problems arise I intend to release kexec-tools 2.0.11
> shortly after the release of the v4
On Fri, 2015-10-16 at 10:48 +0900, Simon Horman wrote:
> On Tue, Oct 06, 2015 at 05:55:49PM -0500, Scott Wood wrote:
> > Commit a304e2d82a8c3 ("ppc64: purgatory: Reset primary cpu endian to
> > big-endian) changed bctr to rfid. rfid is book3s-only and will cause a
> > fatal exception on book3e.
>
This function supports IPI message passing for real
mode callers.
Signed-off-by: Suresh Warrier
---
arch/powerpc/include/asm/smp.h | 1 +
arch/powerpc/kernel/smp.c | 30 ++
2 files changed, 31 insertions(+)
diff --git a/arch/powerpc/include/asm/smp.h b/arch/pow
This patch increases the number of demuxed messages for a
controller with a single ipi to 8 for 64-bit systems
This is required because we want to use the IPI mechanism
to send messages from a CPU running in KVM real mode in a
guest to a CPU in the host to take some action. Currently,
we only supp
When a H_IPI hypercall is made, we often need to switch to the
host to poke the VCPU to which the virtual IPI is targeted.
This is because we cannot do a thread wake-up in real mode in
the guest. Peformance tests have shown that this is impacting
several different workloads - from MongoDB to sma
./drmgr -c cpu -a -r gives the following warning:
[ 2327.035563]
RCU used illegally from offline CPU!
rcu_scheduler_active = 1, debug_locks = 1
[ 2327.035564] no locks held by swapper/12/0.
[ 2327.035565]
stack backtrace:
[ 2327.035567] CPU: 12 PID: 0 Comm: swapper/12 Tainted: G S
4.3.0-rc3-0006
On Thu, Oct 29, 2015 at 08:57:01AM -0700, Nishanth Aravamudan wrote:
> On 29.10.2015 [04:55:36 -0700], Christoph Hellwig wrote:
> > We had a quick cht about this issue and I think we simply should
> > default to a NVMe controler page size of 4k everywhere as that's the
> > safe default. This is al
On Wed, 2015-10-28 at 15:40 +0100, Tomeu Vizoso wrote:
> On 22 October 2015 at 23:27, Scott Wood wrote:
> > On Thu, 2015-10-22 at 15:04 +0200, Tomeu Vizoso wrote:
> > > On 22 October 2015 at 00:51, Scott Wood wrote:
> > > > On Wed, 2015-10-21 at 08:44 -0500, Rob Herring wrote:
> > > > > On Wed, O
Regards,
Igal Liberman
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, October 29, 2015 5:25 PM
> To: Liberman Igal-B31950
> Cc: net...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; Bucur Madalin-Cristian-B32716
>
> Subject: Re: [V5, 2
On 29.10.2015 [04:55:36 -0700], Christoph Hellwig wrote:
> On Wed, Oct 28, 2015 at 01:59:23PM +, Busch, Keith wrote:
> > The "new" interface for all the other architectures is the same as the
> > old one we've been using for the last 5 years.
> >
> > I welcome x86 maintainer feedback to confir
Regards,
Igal Liberman
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, October 28, 2015 11:31 PM
> To: Liberman Igal-B31950
> Cc: net...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; Bucur Madalin-Cristian-B32716
>
> Subject: Re: [V5,
On Thu, 2015-10-29 at 10:22 -0500, Liberman Igal-B31950 wrote:
> Regards,
> Igal Liberman
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, October 28, 2015 11:31 PM
> > To: Liberman Igal-B31950
> > Cc: net...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; linux-
When the cxl driver creates a context, it stores the pid of the
calling task, incrementing the reference count on the struct
pid. Current code mistakenly increments the reference count twice,
once through get_task_pid(), once through get_pid(). The reference
count is only decremented once on detach
On Wed, Oct 28, 2015 at 01:59:23PM +, Busch, Keith wrote:
> The "new" interface for all the other architectures is the same as the
> old one we've been using for the last 5 years.
>
> I welcome x86 maintainer feedback to confirm virtual and DMA addresses
> have the same offset at 4k alignment,
Hi Igal,
[auto build test ERROR on net/master -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/igal-liberman-freescale-com/Freescale-DPAA-FMan/20151028-205843
config: arm-allmodconfig (attached as .config)
Hi Igal,
[auto build test ERROR on net/master -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/igal-liberman-freescale-com/Freescale-DPAA-FMan/20151028-205843
config: arm-allmodconfig (attached as .config)
Hi Igal,
[auto build test ERROR on net/master -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/igal-liberman-freescale-com/Freescale-DPAA-FMan/20151028-205843
config: arm-allmodconfig (attached as .config)
On Thu, Oct 29, 2015 at 02:29:19PM +1100, Daniel Axtens wrote:
>Wei Yang writes:
>
>> EEH address cache, which helps to locate the PCI device according to
>> the given (physical) MMIO address, didn't cover PCI bridges. Also, it
>> shouldn't return PF with address in PF's IOV BARs. Instead, the VFs
Hi Igal,
[auto build test ERROR on net/master -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/igal-liberman-freescale-com/Freescale-DPAA-FMan/20151028-205843
config: arm-allmodconfig (attached as .config)
Hi Anton,
[auto build test ERROR on powerpc/next -- if it's inappropriate base, please
suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Anton-Blanchard/Context-switch-improvements/20151029-092229
config: powerpc-virtex_defconfig (attach
On 10/29/2015 02:17 AM, Alexander Yarygin wrote:
Hemant Kumar writes:
Hi David,
On 10/07/2015 09:41 PM, David Ahern wrote:
On 10/6/15 8:25 PM, Hemant Kumar wrote:
@@ -358,7 +357,12 @@ static bool handle_end_event(struct
perf_kvm_stat *kvm,
time_diff = sample->time - time_begin;
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