This is a part of moving DMA window programming to an iommu_ops
callback. pnv_pci_ioda2_set_window() takes an iommu_table_group as
a first parameter (not pnv_ioda_pe) as it is going to be used as
a callback for VFIO DDW code.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashe
This makes use of the it_page_size from the iommu_table struct
as page size can differ.
This replaces missing IOMMU_PAGE_SHIFT macro in commented debug code
as recently introduced IOMMU_PAGE_XXX macros do not include
IOMMU_PAGE_SHIFT.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already. However PAPR specification allows
the guest to write new TCE value without clearing it first.
Another problem this patch is addressing is the use of pool locks for
external IOMMU users such a
This moves page pinning (get_user_pages_fast()/put_page()) code out of
the platform IOMMU code and puts it to VFIO IOMMU driver where it belongs
to as the platform code does not deal with page pinning.
This makes iommu_take_ownership()/iommu_release_ownership() deal with
the IOMMU table bitmap onl
So far an iommu_table lifetime was the same as PE. Dynamic DMA windows
will change this and iommu_free_table() will not always require
the group to be released.
This moves iommu_group_put() out of iommu_free_table().
This adds a iommu_pseries_free_table() helper which does
iommu_group_put() and i
This enables sPAPR defined feature called Dynamic DMA windows (DDW).
Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus
where devices are allowed to do DMA. These ranges are called DMA windows.
By default, there is a single DMA window, 1 or 2GB big, mapped at zero
on a PC
Signed-off-by: Sukadev Bhattiprolu
---
tools/perf/pmu-events/README | 122 ++
1 file changed, 122 insertions(+)
create mode 100644 tools/perf/pmu-events/README
diff --git a/tools/perf/pmu-events/README b/tools/perf/pmu-events/README
new file mode 100644
From: Andi Kleen
To work with existing mapfiles, assume that the first line in
'mapfile.csv' is a header line and skip over it.
Signed-off-by: Andi Kleen
Signed-off-by: Sukadev Bhattiprolu
Changelog[v2]
All architectures may not use the "Family" to identify. So,
assume first l
From: Andi Kleen
Add support to group the output of perf list by the Topic field
in the JSON file.
Example output:
% perf list
...
Cache:
l1d.replacement
[L1D data line replacements]
l1d_pend_miss.pending
[L1D miss oustandings duration in cycles]
l1d_pend_miss.pending_cycles
Previously we were dropping the useful longer descriptions that some
events have in the event list completely. This patch makes them appear with
perf list.
Old perf list:
baclears:
baclears.all
[Counts the number of baclears]
vs new:
perf list -v:
...
baclears:
baclears.all
[T
Allow assigning categories "Topics" field to the PMU events i.e.
process the topic field from the JSON file and add a corresponding
topic field to the generated C events tables.
Signed-off-by: Andi Kleen
Signed-off-by: Sukadev Bhattiprolu
Changelog[v14]
[Jiri Olsa] Move this independen
Implement support in jevents to parse long descriptions for events
that may have them in the JSON files. A follow on patch will make this
long description available to user through the 'perf list' command.
Signed-off-by: Andi Kleen
Signed-off-by: Sukadev Bhattiprolu
Changelog[v14]
- [Ji
Previously we were dropping the useful longer descriptions that some
events have in the event list completely. Now that jevents provides
support for longer descriptions (see previous patch), add support for
parsing the long descriptions
Signed-off-by: Andi Kleen
Signed-off-by: Sukadev Bhattiprolu
From: Andi Kleen
Automatically adapt the now wider and word wrapped perf list
output to wider terminals. This requires querying the terminal
before the auto pager takes over, and exporting this
information from the pager subsystem.
Acked-by: Namhyung Kim
Signed-off-by: Andi Kleen
Signed-off-by
From: Andi Kleen
Add a --no-desc flag to perf list to not print the event descriptions
that were earlier added for JSON events. This may be useful to
get a less crowded listing.
It's still default to print descriptions as that is the more useful
default for most users.
Signed-off-by: Andi Kleen
From: Andi Kleen
Add a PERF_CPUID variable to override the CPUID of the current CPU (within
the current architecture). This is useful for testing, so that all event
lists can be tested on a single system.
Signed-off-by: Andi Kleen
Signed-off-by: Sukadev Bhattiprolu
v2: Fix double free in earl
From: Andi Kleen
Add support to print alias descriptions in perf list, which
are taken from the generated event files.
The sorting code is changed to put the events with descriptions
at the end. The descriptions are printed as possibly multiple word
wrapped lines.
Example output:
% perf list
.
From: Andi Kleen
Implement the code to match CPU types to mapfile types for x86
based on CPUID. This extends an existing similar function,
but changes it to use the x86 mapfile cpu description.
This allows to resolve event lists generated by jevents.
Signed-off-by: Andi Kleen
Signed-off-by: Suk
At run time (when 'perf' is starting up), locate the specific table
of PMU events that corresponds to the current CPU. Using that table,
create aliases for the each of the PMU events in the CPU. The use
these aliases to parse the user specified perf event.
In short this would allow the user to spe
Implement code that returns the generic CPU ID string for Powerpc.
This will be used to identify the specific table of PMU events to
parse/compare user specified events against.
Signed-off-by: Sukadev Bhattiprolu
Changelog[v14]
- [Jiri Olsa] Move this independent code off into a separate
Jiri Olsa pointed out, that the defines the
attribute '__weak'. We might as well use that.
Signed-off-by: Sukadev Bhattiprolu
---
tools/perf/util/pmu.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index 0fcc624..c6b16b1 1
From: Andi Kleen
The Intel events use a dot to separate event name and unit mask.
Allow dot in names in the scanner, and remove special handling
of dot as EOF. Also remove the hack in jevents to replace dot
with underscore. This way dotted events can be specified
directly by the user.
I'm not fu
From: Andi Kleen
This is a modified version of an earlier patch by Andi Kleen.
We expect architectures to describe the performance monitoring events
for each CPU in a corresponding JSON file, which look like:
[
{
"EventCode": "0x00",
"UMask": "0x01",
"Eve
From: Andi Kleen
I need a JSON parser. This adds the simplest JSON
parser I could find -- Serge Zaitsev's jsmn `jasmine' --
to the perf library. I merely converted it to (mostly)
Linux style and added support for non 0 terminated input.
The parser is quite straight forward and does not
copy any
Separate the event parsing code in perf_pmu__new_alias() out into
a separate function __perf_pmu__new_alias() so that code can be
called indepdently.
This is based on an earlier patch from Andi Kleen.
Signed-off-by: Sukadev Bhattiprolu
---
tools/perf/util/pmu.c | 42 ++
CPUs support a large number of performance monitoring events (PMU events)
and often these events are very specific to an architecture/model of the
CPU. To use most of these PMU events with perf, we currently have to identify
them by their raw codes:
perf stat -e r100f2 sleep 1
This patchs
On Tue, 2015-06-02 at 14:26 +1000, Cyril Bur wrote:
> Powerpc powernv platforms allow access to certain system flash devices
> through a firmwarwe interface. This change adds an mtd driver for these
> flash devices.
>
> Minor updates from Jeremy Kerr and Joel Stanley.
>
> Signed-off-by: Cyril Bur
When we release the device, we should also invalidate the default context.
With this cxl_get_context() will return null after removal.
Signed-off-by: Michael Neuling
---
drivers/misc/cxl/vphb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/cxl/vphb.c b/drivers/misc/cxl/vphb.c
On 06/05/2015 10:27 AM, Gavin Shan wrote:
On Fri, May 29, 2015 at 06:44:45PM +1000, Alexey Kardashevskiy wrote:
The iommu_table struct keeps a list of IOMMU groups it is used for.
At the moment there is just a single group attached but further
patches will add TCE table sharing. When sharing is
On Thu, Jun 04, 2015 at 04:49:57PM -0500, Bjorn Helgaas wrote:
> In include/linux/pci.h, we already #include , so we don't need
> to include directly.
>
> Remove the unnecessary includes. All the files here already include
> .
>
> Signed-off-by: Bjorn Helgaas
> CC: linux-al...@vger.kernel.org
On Thu, 4 Jun 2015 20:57:32 +1000 (AEST)
, Michael Ellerman
wrote:
> On Thu, 2015-04-06 at 09:34:41 UTC, Geert Uytterhoeven wrote:
> > "IS_ENABLED(PPC_PSERIES)" always evaluates to false, as IS_ENABLED() is
> > supposed to be used with the full Kconfig symbol name, including the
> > "CONFIG_" pr
On 06/04/2015 05:57 AM, Michael Ellerman wrote:
> On Thu, 2015-04-06 at 09:34:41 UTC, Geert Uytterhoeven wrote:
>> "IS_ENABLED(PPC_PSERIES)" always evaluates to false, as IS_ENABLED() is
>> supposed to be used with the full Kconfig symbol name, including the
>> "CONFIG_" prefix.
>>
>> Add the missi
On Fri, May 29, 2015 at 06:44:45PM +1000, Alexey Kardashevskiy wrote:
>The iommu_table struct keeps a list of IOMMU groups it is used for.
>At the moment there is just a single group attached but further
>patches will add TCE table sharing. When sharing is enabled, TCE cache
>in each PE needs to be
On Fri, May 29, 2015 at 06:44:44PM +1000, Alexey Kardashevskiy wrote:
>At the moment the DMA setup code looks for the "ibm,opal-tce-kill"
>property which contains the TCE kill register address. Writing to
>this register invalidates TCE cache on IODA/IODA2 hub.
>
>This moves the register address fro
On Fri, May 29, 2015 at 06:44:40PM +1000, Alexey Kardashevskiy wrote:
>Modern IBM POWERPC systems support multiple (currently two) TCE tables
>per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
>for TCE tables. Right now just one table is supported.
>
>This defines iommu_table_gro
On Fri, May 29, 2015 at 06:44:29PM +1000, Alexey Kardashevskiy wrote:
>At the moment iommu_free_table() only releases memory if
>the table was initialized for the platform code use, i.e. it had
>it_map initialized (which purpose is to track DMA memory space use).
>
>With dynamic DMA windows, we wil
On Fri, May 29, 2015 at 06:44:57PM +1000, Alexey Kardashevskiy wrote:
>The existing implementation accounts the whole DMA window in
>the locked_vm counter. This is going to be worse with multiple
>containers and huge DMA windows. Also, real-time accounting would requite
>additional tracking of acco
On Thu, 2015-06-04 at 04:27 -0500, Zhao Qiang-B45475 wrote:
> On Thu, 2015-06-04 at 2:14PM, Wood Scott wrote:
>
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Thursday, June 04, 2015 2:14 PM
> > To: Zhao Qiang-B45475
> > Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
On Fri, 2015-06-05 at 08:01 +1000, Michael Ellerman wrote:
> On Thu, 2015-04-06 at 12:03:17 UTC, Vipin K Parashar wrote:
> > This patch adds support for FSP (Flexible Service Processor)
> > EPOW (Early Power Off Warning) and DPO (Delayed Power Off) events for
> > the PowerNV platform. EPOW events a
On Thu, 2015-04-06 at 12:03:17 UTC, Vipin K Parashar wrote:
> This patch adds support for FSP (Flexible Service Processor)
> EPOW (Early Power Off Warning) and DPO (Delayed Power Off) events for
> the PowerNV platform. EPOW events are generated by FSP due to various
> critical system conditions tha
In include/linux/pci.h, we already #include , so we don't need
to include directly.
Remove the unnecessary includes. All the files here already include
.
Signed-off-by: Bjorn Helgaas
CC: linux-al...@vger.kernel.org
CC: linux-m...@linux-mips.org
CC: linuxppc-dev@lists.ozlabs.org
CC: linux...@vg
We already include from , so just include
directly.
Signed-off-by: Bjorn Helgaas
CC: linuxppc-dev@lists.ozlabs.org
CC: linux-s...@vger.kernel.org
---
arch/powerpc/platforms/52xx/mpc52xx_pci.c |2 +-
arch/s390/kernel/suspend.c|2 +-
2 files changed, 2 insertions(+), 2 de
On Thu, Jun 4, 2015 at 5:20 AM, Michael Ellerman wrote:
> On Wed, 2015-03-06 at 05:10:25 UTC, Rob Herring wrote:
>> With the latest dtc import include fixups, it is no longer necessary to
>> add explicit include paths to use libfdt. Remove these across the
>> kernel.
>
> What are the "latest dtc i
This change adds a char device to access the "PRD" (processor runtime
diagnostics) channel to OPAL firmware.
Includes contributions from Vaidyanathan Srinivasan, Neelesh Gupta &
Vishal Kulkarni.
Signed-off-by: Neelesh Gupta
Signed-off-by: Jeremy Kerr
Acked-by: Stewart Smith
---
v4:
- Addres
Hi Michael,
> Sorry, I put this in but then hit the build break, I was going to fix it up
> but
> would rather you did and tested it, so we may as well do another review :)
whee!
>> @@ -0,0 +1,58 @@
>> +/*
>> + * OPAL Runtime Diagnostics interface driver
>> + * Supported on POWERNV platform
>>
On Thu, 2015-28-05 at 11:52:35 UTC, Dominik Dingel wrote:
> Nobody used these hooks so they were removed from common code,
> and can now be removed from the architectures.
>
> Acked-by: Martin Schwidefsky
> Signed-off-by: Dominik Dingel
> Acked-by: Ralf Baechle
> diff --git a/arch/powerpc/incl
This patch adds support for FSP (Flexible Service Processor)
EPOW (Early Power Off Warning) and DPO (Delayed Power Off) events for
the PowerNV platform. EPOW events are generated by FSP due to various
critical system conditions that require system shutdown. A few examples
of these conditions are hi
This patch adds support for FSP (Flexible Service Processor)
EPOW (Early Power Off Warning) and DPO (Delayed Power Off) events for
the PowerNV platform. EPOW events are generated by FSP due to various
critical system conditions that require system shutdown. A few examples
of these conditions are hi
On Wed, 2015-20-05 at 23:34:16 UTC, Sukadev Bhattiprolu wrote:
> >From 955102eacf035b19080dc659a15d9b8fbd8fae7f Mon Sep 17 00:00:00 2001
> From: Sukadev Bhattiprolu
> Date: Tue, 28 Apr 2015 18:47:58 -0400
> Subject: [PATCH 1/1] powerpc/perf/hv-24x7: Check support before registering
> PMU
>
> We
On Fri, 2015-29-05 at 03:55:59 UTC, Jeremy Kerr wrote:
> This change adds a char device to access the "PRD" (processor runtime
> diagnostics) channel to OPAL firmware.
>
> Includes contributions from Vaidyanathan Srinivasan, Neelesh Gupta &
> Vishal Kulkarni.
>
> Signed-off-by: Neelesh Gupta
> S
On Thu, 2015-04-06 at 09:34:41 UTC, Geert Uytterhoeven wrote:
> "IS_ENABLED(PPC_PSERIES)" always evaluates to false, as IS_ENABLED() is
> supposed to be used with the full Kconfig symbol name, including the
> "CONFIG_" prefix.
>
> Add the missing "CONFIG_" prefix to fix this.
>
> Fixes: a25095d45
On Wednesday 03 June 2015 06:24 AM, Daniel Axtens wrote:
+int64_t opal_nest_ima_control(uint32_t value);
If I'm understanding things correctly, you call this function in patch
3. Quoting from that patch:
+static void nest_init(void *dummy)
+{
+ opal_nest_ima_control(P8_NEST_ENGINE_START
On Wed, 2015-03-06 at 05:10:25 UTC, Rob Herring wrote:
> With the latest dtc import include fixups, it is no longer necessary to
> add explicit include paths to use libfdt. Remove these across the
> kernel.
What are the "latest dtc import include fixups" ?
> diff --git a/arch/powerpc/kernel/Makef
On Wednesday 03 June 2015 06:16 AM, Daniel Axtens wrote:
+static int nest_pmu_create(struct device_node *dev, int pmu_index)
+{
+ struct ppc64_nest_ima_events **p8_events_arr;
+ struct ppc64_nest_ima_events *p8_events;
+ struct property *pp;
+ char *buf;
+ const __
On Wednesday 03 June 2015 05:51 AM, Daniel Axtens wrote:
On Tue, 2015-06-02 at 21:29 +0530, Madhavan Srinivasan wrote:
Patch adds a device tree function to detect the nest pmu
support. Function will look for specific dt property "ibm,ima-chip"
as a detection mechanism for the nest pmu.
For Ne
"IS_ENABLED(PPC_PSERIES)" always evaluates to false, as IS_ENABLED() is
supposed to be used with the full Kconfig symbol name, including the
"CONFIG_" prefix.
Add the missing "CONFIG_" prefix to fix this.
Fixes: a25095d451ece23b ("of: Move dynamic node fixups out of powerpc and into
common code"
On Wednesday 03 June 2015 05:33 AM, Daniel Axtens wrote:
On Tue, 2015-06-02 at 21:29 +0530, Madhavan Srinivasan wrote:
Patch adds generic nest pmu functions and format attribute.
I'm not sure this commit message accurately reflects the content of the
patch. At any rate, please could you:
-
On Thu, 2015-06-04 at 2:14PM, Wood Scott wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, June 04, 2015 2:14 PM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/2] rheap: move rheap.c from arch/powerpc/lib/ to
>
On 06/01/2015 04:24 PM, David Gibson wrote:
On Fri, May 29, 2015 at 06:44:41PM +1000, Alexey Kardashevskiy wrote:
Modern IBM POWERPC systems support multiple (currently two) TCE tables
per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
for TCE tables. Right now just one table i
On Wednesday 03 June 2015 05:33 AM, Daniel Axtens wrote:
On Tue, 2015-06-02 at 21:29 +0530, Madhavan Srinivasan wrote:
Patch adds generic nest pmu functions and format attribute.
I'm not sure this commit message accurately reflects the content of the
patch. At any rate, please could you:
-
On Wednesday 03 June 2015 05:08 AM, Daniel Axtens wrote:
On Tue, 2015-06-02 at 21:29 +0530, Madhavan Srinivasan wrote:
Patch adds cpu hotplug support. First online cpu in a node is picked as
designated thread to read the Nest pmu counter data, and at the time of
hotplug, next online cpu from t
On Wed, 3 Jun 2015 10:26:38 +0200
, Ralf Baechle
wrote:
> On Wed, Jun 03, 2015 at 12:10:25AM -0500, Rob Herring wrote:
> > Date: Wed, 3 Jun 2015 00:10:25 -0500
> > From: Rob Herring
> > To: devicet...@vger.kernel.org, linux-ker...@vger.kernel.org
> > Cc: Grant Likely , Rob Herring ,
> > Ralf
On Mon, 13 Apr 2015 11:49:31 -0500
, Rob Herring
wrote:
> On Mon, Apr 13, 2015 at 8:38 AM, Konstantin Khlebnikov
> wrote:
> > On 13.04.2015 16:22, Rob Herring wrote:
> >>
> >> On Wed, Apr 8, 2015 at 11:59 AM, Konstantin Khlebnikov
> >> wrote:
> >>>
> >>> Node 0 might be offline as well as any o
On Wednesday 03 June 2015 04:44 AM, Daniel Axtens wrote:
On Tue, 2015-06-02 at 21:29 +0530, Madhavan Srinivasan wrote:
Patch creates a file "nest-pmu-c" to contain nest pmu related functions.
"nest-pmu.c"
Patch adds nest pmu init function and cpumask function since Nest pmu units
are per-chi
From: Tang Yuantian
Each time the CPU switches its frequency, the clock nodes in
DTS are walked through to find proper clock source. This is
very time-consuming, for example, it is up to 500+ us on T4240.
Besides, switching time varies from clock to clock.
To optimize this, each input clock of CP
On Wednesday 03 June 2015 04:41 AM, Daniel Axtens wrote:
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) a
On Thu, Jun 04, 2015 at 01:46:15PM +0800, Wei Yang wrote:
>On Wed, Jun 03, 2015 at 10:46:38AM -0500, Bjorn Helgaas wrote:
>>On Wed, Jun 03, 2015 at 03:10:23PM +1000, Gavin Shan wrote:
>>> On Wed, Jun 03, 2015 at 11:31:42AM +0800, Wei Yang wrote:
>>> >On Mon, Jun 01, 2015 at 06:46:45PM -0500, Bjorn
On Wednesday 20 May 2015 06:30 AM, Michael Neuling wrote:
> On Wed, 2015-05-20 at 00:30 +0530, Shreyas B. Prabhu wrote:
>> Doorbell can be used to cause ipi on cpus which are sibling threads on
>> the same core. So icp_native_cause_ipi checks if the destination cpu
>> is a sibling thread of the c
During the PCI plugging event, the PCI devices are rescanned and
their IO and MMIO resources are reassigned. However, the PowerNV
platform will assign PE# based on that, which depends on updating
to window of bridge of the PE's primary bus.
The patch updates the windows of bridge of PE's primary b
The patch moves pcibios_find_pci_bus() to PPC kerenl directory so
that it can be reused by hotplug code for pSeries and PowerNV
platform at the same time.
Signed-off-by: Gavin Shan
Acked-by: Benjamin Herrenschmidt
---
v5:
* Derived from PATCH[v4 12/21]
---
arch/powerpc/kernel/pci-hotplug.c
Except pnv_ioda_configure_pe(), all PE configuration related functions
are already PE oriented. The patch changes the return value from PE
number to PE instance for its callee for the purpose.
Signed-off-by: Gavin Shan
---
v5:
* Split from PATCH[v4 07/21]
---
arch/powerpc/platforms/powernv/pci
PEs were put into the list, maintained by PHB, according its DMA32
weight. After that, the list was iterated to initialize PE's DMA
capability. For now, the PE is created and its DMA capability is
initialized right way. So we don't need the list and the patch
removes that.
Signed-off-by: Gavin Sha
The patch cleans up DMA32 in pci-ioda.c. It shouldn't introduce
behavioural changes:
* Rename various fields in "struct pnv_phb" and "struct pnv_ioda_pe"
as 32-bits DMA should be related to "DMA", not "TCE", and move
them around to reflect their relationship and their relative
im
The patch overrides pcibios_setup_bridge(), called to update PCI
bridge windows at completion of PCI resource assignment, to assign
PE and setup various (resource) mapping in next patch.
Signed-off-by: Gavin Shan
---
v5:
* Split from [PATCH v5 v4 06/21]
---
arch/powerpc/include/asm/pci-bridge.
For P7IOC, the whole available DMA32 space, which is below the
MEM32 space, is divided evenly into 256MB segments. How many
continuous segments assigned to one particular PE depends on
the PE's DMA weight that is figured out from the type of each
PCI devices contained in the PE, and PHB's DMA weigh
The PHB's IO or M32 window is divided evenly to segments, each of
them can be mapped to arbitrary PE# by IODT or M32DT. Current code
figures out the consumed IO and M32 segments by one particular PE
from the windows of the PE's upstream bridge. It won't be reliable
once we extend M64 windows of roo
The patch introduces one more argument to of_fdt_unflatten_tree()
to specify the root node for the FDT blob, which is going to be
unflattened. In the result, the function can be used to unflatten
FDT blob, which represents device sub-tree in subsequent patches.
Signed-off-by: Gavin Shan
---
v5:
The patch simplifies pnv_eeh_reset() by dropping unnecessary nested
if statement. No logic changed by the patch.
Signed-off-by: Gavin Shan
---
v5:
* Split from PATCH[v4 09/21]
* Fixed "quoted string split across lines" from checkpatch.pl
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 65
The patch exports following functions, which are derived from their
original implementation, so that the PCI hotplug logic can reuse
the functions to add or remove pci_dn for all device nodes under
specified PCI slot.
traverse_pci_device_nodes() traverse_pci_devices()
add_pci_device_node
The device tree nodes will be changed dynamically on PCI hotplug
events on PowerNV platform with the help of overlay mechanism.
The patch enables CONFIG_OF_OVERLAY on PowerNV platform to support
that.
Signed-off-by: Gavin Shan
---
v5:
* Derived from PATCH[v4 20/21]
* Enables OF_OVERLAY instea
The original implementation of pnv_ioda_setup_pe_seg() configures
IO and M32 segments by separate logics, which can be merged by
by caching @seg_bitmap, @seg_size, @win in advance. The patch
shouldn't cause any behavioural changes.
Signed-off-by: Gavin Shan
---
v5:
* Split from PATCH[v4 04/21]
The patch exports 4 functions, which base on corresponding OPAL
APIs to get or set PCI slot status. Those functions are going to
be used by PCI hotplug module in subsequent patches:
pnv_pci_get_overlay_dt() opal_get_overlay_dt()
pnv_pci_get_presence_status() opal_pci_get_presence_stat
The pci_dn instances are allocated from memblock or bootmem when
creating PCI controller (hoses) in setup_arch(). The PCI hotplug,
which will be supported by proceeding patches, will release PCI
device nodes and their corresponding pci_dn on unplugging event.
The pci_dn instance memory chunks alloe
There should have an upstream bridge for the PCI bus for which
pnv_pci_reset_secondary_bus() is called. It's impossible to call
the function for root buses. So we needn't do reset for root buses
in pnv_pci_reset_secondary_bus() and simply drop the logic.
Signed-off-by: Gavin Shan
---
v5:
* Spli
pnv_ioda_get_pe() indicates it's increasing refcount to the given
PE instance from the name. However, it gets the instance of the
PE, which contains the indicated PCI device. The patch renames it
to pnv_ioda_dev_to_pe() to reflect its purpose.
Signed-off-by: Gavin Shan
---
v5:
* Split from PATC
The patch adds refcount to PE, which counts number of PCI devices
included in the PE. When last device leaves from the PE, the PE
together with its consumed resources (IO, DMA, PELTM/PELTV) are
released, in order to support PCI hotplug.
Signed-off-by: Gavin Shan
---
v5:
* Derived from PATCH[v4
PowerNV platform is running on top of skiboot firmware, which has
changes supporting PCI slots. PCI slots are identified by PHB's
OPAL ID (PHB slot) or combo of that and PCI slot ID. The patch
changes argument names of opal_pci_reset() and opal_pci_poll()
to reflect the firmware's change. pnv_eeh_p
There might have PCI devices, under the specified PCI bus, asking
for fundamental reset. The patch iterates all PCI devices under
the specified PCI bus and issue fundamental reset to the PCI bus
if any PCI device is asking for that. Otherwise, hot reset is
issued to the PCI bus.
Signed-off-by: Gav
Currently, the PEs and their associated resources are assigned
in ppc_md.pcibios_fixup() except those consumed by SRIOV VFs.
The function is called for once after PCI probing and resources
assignment are finished. Obviously, it's not hotplug friendly.
The patch creates PEs dynamically by ppc_md.pc
In hotplug case, function pcibios_add_pci_devices() is called to
rescan the specified PCI bus, which might not have any child devices.
Access to the PCI bus's child device node will cause kernel crash
without exception. The patch adds condition of skipping scanning
PCI bus without child devices, in
Each PHB maintains an array helping to translate RID (Request
ID) to PE# with the assumption that PE# takes 8 bits, indicating
that we can't have more than 256 PEs. However, pci_dn->pe_number
already had 4-bytes for the PE#.
The patch extends the PE# capacity so that each of them will be
4-bytes l
On P7IOC, the whole DMA32 space is divided evenly to 256MB segments.
Each PE can consume one or multiple DMA32 segments. Current code
doesn't trace the available DMA32 segments and those consumed by
one particular PE. It's conflicting with PCI hotplug.
The patch introduces one bitmap to PHB to tra
Each PHB maintains one instance of "struct pci_controller_ops",
which includes various callbacks called by PCI subsystem. In the
definition of this struct, some callbacks have explicit names for
its arguments, but the left don't have.
The patch removes all explicit names of the arguments to the
ca
The original implementation of pnv_ioda_setup_dma() iterates the
list of PEs and configures the DMA32 space for them one by one.
The function was designed to be called during PHB fixup time.
When configuring PE's DMA32 space in pcibios_setup_bridge(), in
order to support PCI hotplug, we have to hav
The patch changes of_fdt_unflatten_tree() so that it returns the
allocated memory chunk for unflattened device-tree, which can be
released once it's obsoleted.
Signed-off-by: Gavin Shan
---
v5:
* Newly introduced
---
drivers/of/fdt.c | 21 +++--
include/linux/of_fdt.h |
Nobody is using the this function. The patch drops it.
Signed-off-by: Gavin Shan
Reviewed-by: Alexey Kardashevskiy
---
v5:
* Derived from PATCH[v4 08/21]
---
arch/powerpc/platforms/powernv/pci-ioda.c | 71 ---
1 file changed, 71 deletions(-)
diff --git a/arch/powe
The patch moves functions related to releasing PE around so that
we don't need extra declaration for them in subsequent patches.
It doesn't introduce any behavioural changes.
Signed-off-by: Gavin Shan
---
v5:
* Split from PATCH[v4 07/21]
* Fixed coding style complained by checkpatch.pl
---
a
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