Re: [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

Hello Guenter, On 04/07/2015 09:22 PM, Guenter Roeck wrote: > Hi Cedric, > > On Tue, Apr 07, 2015 at 08:03:46PM +0200, Cedric Le Goater wrote: >> >> on a P7 : >> >> # ppc64_cpu --info >> Core 0:0*1*2*3* >> Core 1:4*5*6*7* >> Core 2:

Re: [PATCH] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in of parsing

On Tue, Apr 7, 2015 at 8:49 PM, Benjamin Herrenschmidt wrote: > On Tue, 2015-04-07 at 17:24 -0700, Yinghai Lu wrote: >> For device resource PREF bit setting under bridge 64-bit pref resource, >> we need to make sure only set PREF for 64bit resource, so set >> IORESOUCE_MEM_64 >> for 64bit resourc

Re: [PATCH] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in of parsing

On Tue, 2015-04-07 at 17:24 -0700, Yinghai Lu wrote: > For device resource PREF bit setting under bridge 64-bit pref resource, > we need to make sure only set PREF for 64bit resource, so set IORESOUCE_MEM_64 > for 64bit resource during of device resource flags parsing. > Link: https://bugzilla.ker

Re: [PATCH v2 04/19] powerpc: Create pci_controller_ops.dma_dev_setup and shim

On Tue, 2015-04-07 at 09:44 +0200, Arnd Bergmann wrote: > On Tuesday 07 April 2015 10:31:36 Daniel Axtens wrote: > > > Please see https://patchwork.ozlabs.org/patch/431333/ for related work. > > > > > I'm familiar with that patch series - I've been helping Yijing get it up > > to speed on PowerPC.

Re: powerpc32: fix warning from include/linux/mm.h

On Fri, 2015-03-20 at 18:52 -0500, Scott Wood wrote: > On Fri, Dec 05, 2014 at 12:20:20PM +0100, LEROY Christophe wrote: > > include/linux/mm.h: In function 'is_vmalloc_addr': > > include/linux/mm.h:367:14: warning: comparison between signed and unsigned > > integer expressions [-Wsign-compare] >

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

On Tue, 2015-04-07 at 16:31 -0500, Scott Wood wrote: > On Tue, 2015-04-07 at 10:19 +0200, leroy christophe wrote: > > Le 25/03/2015 01:45, Scott Wood a écrit : > > > On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: > > >> You'll need to collect ACKs, or get the individual patches merged,

Re: [PATCH kernel v7 26/31] powerpc/iommu: Add userspace view of TCE table

On 04/03/2015 07:50 AM, Alex Williamson wrote: Should have sent this with the other comments, but found it hiding on my desktop... On Sat, 2015-03-28 at 01:55 +1100, Alexey Kardashevskiy wrote: In order to support memory pre-registration, we need a way to track the use of every registered memo

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On Tue, 2015-04-07 at 22:13 -0300, Rogério Brito wrote: > Hi, Scott. > > On Apr 07 2015, Scott Wood wrote: > > On Tue, 2015-04-07 at 21:37 -0300, Rogério Brito wrote: > > > I see. If I do some "archaeology" (read: bisect when it stopped > > > working), would that help to discover how the flash is

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

Hi, Scott. On Apr 07 2015, Scott Wood wrote: > On Tue, 2015-04-07 at 21:37 -0300, Rogério Brito wrote: > > I see. If I do some "archaeology" (read: bisect when it stopped > > working), would that help to discover how the flash is connected? > > It will probably give you the address and size of th

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

On Tue, 2015-04-07 at 21:37 -0300, Rogério Brito wrote: > Dear Scott, > > Once again, thank you very much for your answer. > > On Apr 07 2015, Scott Wood wrote: > > On Tue, 2015-04-07 at 20:58 -0300, Rogério Brito wrote: > > > This is good to know. Is there any reasonable dts that I can copy/adap

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

Dear Scott, Once again, thank you very much for your answer. On Apr 07 2015, Scott Wood wrote: > On Tue, 2015-04-07 at 20:58 -0300, Rogério Brito wrote: > > This is good to know. Is there any reasonable dts that I can copy/adapt? > > I'm not familiar with how flash is connected on this chip, so

[PATCH v2 5/5] powerpc/perf/hv-24x7: Use PMU_TXN_READ interface

The 24x7 counters in Powerpc allow monitoring a large number of counters simultaneously. They also allow reading several counters in a single HCALL so we can get a more consistent snapshot of the system. Use the PMU's transaction interface to monitor and read several event counters at once. The id

[PATCH v2 4/5] perf: Define PMU_TXN_READ interface

Define a new PERF_PMU_TXN_READ interface to read a group of counters at once. Note that we use this interface with all PMUs. PMUs that implement this interface will queue the counters to be read in ->read() and read them all at once in ->commit_txn(). PMUs that don't implement PERF_PMU_TXN_READ w

[PATCH v2 3/5] perf: Rename perf_event_read_value

perf_event_read_value() is mostly computing the event count and enabled/ running times. Move the perf_event_read() into caller and rename perf_event_read_value() to perf_event_compute_values(). Changelog[v2] Export symbol perf_event_read() since x86/kvm needs it now. Signed-off-by: Sukade

[PATCH v2 2/5] perf: Split perf_event_read() and perf_event_count()

perf_event_read() does two things: - call the PMU to read/update the counter value - and compute the total count of the event and its children perf_event_reset() needs the first piece but doesn't need the second. Similarly, when we implement the ability to read a group of events

[PATCH v2 1/5] perf: Add a flags parameter to pmu txn interfaces

Currently, the PMU interface allows reading only one counter at a time. But some PMUs like the 24x7 counters in Power, support reading several counters at once. To leveage this functionality, extend the transaction interface to support a "transaction type". The first type, PERF_PMU_TXN_ADD, refers

[PATCH v2 0/5] perf: Implement event group read using txn interface

Unlike normal hardware PMCs, the 24x7 counters[1] in Power8 are stored in memory and accessed via a hypervisor call (HCALL). A major aspect of the HCALL is that it allows retireving _SEVERAL_ counters at once (unlike regular PMCs, which are read one at a time). By reading several counters at once,

[PATCH] powerpc/PCI: Add IORESOURCE_MEM_64 for 64-bit resource in of parsing

For device resource PREF bit setting under bridge 64-bit pref resource, we need to make sure only set PREF for 64bit resource, so set IORESOUCE_MEM_64 for 64bit resource during of device resource flags parsing. Link: https://bugzilla.kernel.org/show_bug.cgi?id=96261 Link: https://bugzilla.kernel.o

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

On Tue, 2015-04-07 at 20:58 -0300, Rogério Brito wrote: > Dear Scott. > > First of all, thank you so very much for your reply. > > On Apr 07 2015, Scott Wood wrote: > > On Sat, 2015-04-04 at 02:40 -0300, Rogério Brito wrote: > > > , > > > | physmap platform flash device: 0040 at ffc0

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

Dear Scott. First of all, thank you so very much for your reply. On Apr 07 2015, Scott Wood wrote: > On Sat, 2015-04-04 at 02:40 -0300, Rogério Brito wrote: > > , > > | physmap platform flash device: 0040 at ffc0 > > | physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank. Manufac

Re: [PATCH 1/4] powerpc/fsl-booke: Add device tree support for T1024/T1023 SoC

On Fri, 2015-04-03 at 18:35 +0800, Shengzhou Liu wrote: > + rcpm: global-utilities@e2000 { > + compatible = "fsl,t1023-rcpm", "fsl,qoriq-rcpm-2.0"; > + reg = <0xe2000 0x1000>; > + }; > + > + sfp: sfp@e8000 { > + compatible = "fsl,t1023-sfp"; > +

Re: [PATCH 3/4] powerpc/fsl-booke: Add T1024 RDB board support

On Fri, 2015-04-03 at 18:35 +0800, Shengzhou Liu wrote: > + board-control@2,0 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "fsl,t1024-cpld", "fsl,deepsleep-cpld"; No "fsl,deepsleep-cpld". Just have the

Re: [PATCH] dt/bindings: qoriq-clock: Add binding for FMan clock mux

On Tue, 2015-04-07 at 07:08 +0300, Igal.Liberman wrote: > From: Igal Liberman > > Signed-off-by: Igal Liberman > --- > .../devicetree/bindings/clock/qoriq-clock.txt | 59 > > 1 file changed, 59 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/

Re: Old regression with MTD devices disappearing from a Kurobox HD/HG

On Sat, 2015-04-04 at 02:40 -0300, Rogério Brito wrote: > Unfortunately, right now, what I see with Linus's tree > (4.0.0-rc6-9-g6c310bc) is the following: > > , > | physmap platform flash device: 0040 at ffc0 > | physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank. Manufactu

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

On Tue, 2015-04-07 at 10:19 +0200, leroy christophe wrote: > Le 25/03/2015 01:45, Scott Wood a écrit : > > On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: > >> You'll need to collect ACKs, or get the individual patches merged, and > >> then we > >> can take patch 8 through the powerpc t

Re: powerpc32: fix warning from include/linux/mm.h

On Tue, 2015-04-07 at 10:07 +0200, leroy christophe wrote: > Le 21/03/2015 00:52, Scott Wood a écrit : > > On Fri, Dec 05, 2014 at 12:20:20PM +0100, LEROY Christophe wrote: > >> include/linux/mm.h: In function 'is_vmalloc_addr': > >> include/linux/mm.h:367:14: warning: comparison between signed and

Re: [Skiboot] [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

On Tue, 2015-04-07 at 20:03 +0200, Cedric Le Goater wrote: > > This is a shortcut. The code is for the ibmpowernv platform and assumes > that we are running on a P8 (8 hardware threads). It would be better to > use a "maximum threads per core" variable but I am not sure this is > available, as

Re: Topology updates and NUMA-level sched domains

On Tue, Apr 07, 2015 at 10:14:10AM -0700, Nishanth Aravamudan wrote: > > So I think (and ISTR having stated this before) that dynamic cpu<->node > > maps are absolutely insane. > > Sorry if I wasn't involved at the time. I agree that it's a bit of a > mess! > > > There is a ton of stuff that assu

Re: [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

Hi Cedric, On Tue, Apr 07, 2015 at 08:03:46PM +0200, Cedric Le Goater wrote: > > on a P7 : > > # ppc64_cpu --info > Core 0:0*1*2*3* > Core 1:4*5*6*7* > Core 2:8*9* 10* 11* > Core 3: 12* 13* 14* 15* >

Re: [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

Hello Guenter, On 04/07/2015 06:44 PM, Guenter Roeck wrote: > On Tue, Apr 07, 2015 at 04:45:56PM +0200, Cédric Le Goater wrote: >> The new OPAL device tree adds a few properties which can be used to add >> extra information on the sensor label. >> >> In the case of a cpu core sensor, the firmware

[PATCH 11/11] crypto: add crypto compression sefltest

Add configurable module to perform self-tests on any crypto compression driver. This allows testing any crypto compression driver with any input buffer, at varying alignments and lengths. It calculates the average bytes per second compression and decompression rates. Any errors reported by the c

[PATCH 10/11] crypto: rewrite crypto 842 to use nx842 constraints

Major rewrite of the crypto 842 driver to use the "constraints" from the NX-842 hardware driver, and split and/or shift input or output buffers to fit the required alignment/length constraints. Add a header to the compressed buffers. Update the MAINTAINERS 842 section with the crypto 842 filename

[PATCH 09/11] crypto: remove LZO fallback from crypto 842

Update the crypto 842 driver to no longer fallback to LZO if the 842 hardware is unavailable. Simplify the crpypto 842 driver to remove all headers indicating 842/lzo. The crypto 842 driver should do 842-format compression and decompression only. It should not fallback to LZO compression/decompr

[PATCH 08/11] drivers/crypto/nx: simplify pSeries nx842 driver

Simplify the pSeries NX-842 driver: do not expect incoming buffers to be exactly page-sized; do not break up input buffers to compress smaller blocks; do not use any internal headers in the compressed data blocks; remove the software decompression implementation. This changes the pSeries NX-842 dr

[PATCH 07/11] drivers/crypto/nx: add PowerNV platform NX-842 driver

Add driver for NX-842 hardware on the PowerNV platform. This allows the use of the 842 compression hardware coprocessor on the PowerNV platform. Signed-off-by: Dan Streetman --- drivers/crypto/nx/Kconfig | 10 + drivers/crypto/nx/Makefile | 2 + drivers/crypto/nx/nx-842-powe

[PATCH 06/11] drivers/crypto/nx: add nx842 constraints

Add "constraints" for the NX-842 driver. The constraints are used to indicate what the current NX-842 platform driver is capable of. The constraints tell the NX-842 user what alignment, min and max length, and length multiple each provided buffers should conform to. These are required because th

[PATCH 05/11] drivers/crypto/nx: add NX-842 platform frontend driver

Add NX-842 frontend that allows using either the pSeries platform or PowerNV platform driver for the NX-842 hardware. Update the MAINTAINERS file to include the new filenames. Signed-off-by: Dan Streetman --- MAINTAINERS| 2 +- crypto/842.c | 2

[PATCH 04/11] drivers/crypto/nx: move nx-842.c to nx-842-pseries.c

Move the entire NX-842 driver for the pSeries platform from the file nx-842.c to nx-842-pseries.c. This is required by later patches that add NX-842 support for the PowerNV platform. This patch does not alter the content of the pSeries NX-842 driver at all, it only changes the filename. Signed-o

[PATCH 03/11] crypto: add software 842 decompression

Add an 842-format software decompression function. Update the MAINTAINERS 842 section to include the new files. This decompression function can decompress any standard-format 842 compressed data. The 842 compressed format is explained in the header comments. This general-use decompression funct

[PATCH 02/11] powerpc: Add ICSWX instruction

Add the asm ICSWX and ICSWEPX opcodes. Add definitions for the Coprocessor Request structures needed to use the icswx calls to coprocessors. Add icswx() function to perform the ICSWX asm using the provided Coprocessor Command Word value and Coprocessor Request Block structure. This is required f

[PATCH 01/11] powerpc: export of_get_ibm_chip_id function

Export the of_get_ibm_chip_id() function. This will be used by the PowerNV NX-842 driver. Signed-off-by: Dan Streetman --- arch/powerpc/kernel/prom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index b8e15c6..f9fb9a2 100644 --- a/a

[PATCH 00/11] add 842 hw compression for PowerNV platform

IBM PowerPC processors starting at version P7+ contain a NX coprocessor that provides various hw-accelerated functions, one of which is memory compression to the IBM "842" compression format. This NX-842 coprocessor is already supported on the pSeries platform, by the nx-842.c driver and the crypt

Re: Topology updates and NUMA-level sched domains

On 07.04.2015 [12:21:47 +0200], Peter Zijlstra wrote: > On Mon, Apr 06, 2015 at 02:45:58PM -0700, Nishanth Aravamudan wrote: > > Hi Peter, > > > > As you are very aware, I think, power has some odd NUMA topologies (and > > changes to the those topologies) at run-time. In particular, we can see > >

Re: [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

On Tue, Apr 07, 2015 at 04:45:56PM +0200, Cédric Le Goater wrote: > The new OPAL device tree adds a few properties which can be used to add > extra information on the sensor label. > > In the case of a cpu core sensor, the firmware exposes the physical > identifier of the core in the "ibm,pir" pr

[PATCH] Correct memory hotplug locking

Memory dlpar handling can return from dlpar_memory() without releasing the device_hotplug lock. Correct this routine to ensure the lock is released. This patch applies on top of my previous updates to memory hotplug: https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-February/124804.html Signed

[PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

The new OPAL device tree adds a few properties which can be used to add extra information on the sensor label. In the case of a cpu core sensor, the firmware exposes the physical identifier of the core in the "ibm,pir" property. The driver translates this identifier in a linux cpu number and pri

Re: [PATCH 4/4] hwmon: (ibmpowernv) pretty print labels

On 04/03/2015 05:49 PM, Guenter Roeck wrote: > On 04/01/2015 03:15 AM, Cédric Le Goater wrote: >> The new OPAL device tree adds a few properties which can be used to add >> extra information on the sensor label. >> >> Signed-off-by: Cédric Le Goater >> --- >> drivers/hwmon/ibmpowernv.c | 22 ++

Re: [PATCH V2] tty: serial: Add const to struct uart_ops declarations

On Sunday 05 April 2015 11:55 PM, Joe Perches wrote: These structs can be const, so make them const. Miscellanea: o Add static to struct uart_ops declaration in bfin_sport_uart Signed-off-by: Joe Perches --- On Sun, 2015-04-05 at 00:04 +0200, Stefan Agner wrote: > On

Re: Topology updates and NUMA-level sched domains

On Mon, Apr 06, 2015 at 02:45:58PM -0700, Nishanth Aravamudan wrote: > Hi Peter, > > As you are very aware, I think, power has some odd NUMA topologies (and > changes to the those topologies) at run-time. In particular, we can see > a topology at boot: > > Node 0: all Cpus > Node 7: no cpus > >

Re: [PATCH 0/8] powerpc/8xx: Getting rid of CONFIG_8xx

Le 25/03/2015 01:45, Scott Wood a écrit : On Fri, 2015-03-13 at 10:34 +1100, Michael Ellerman wrote: On Thu, 2015-03-12 at 16:24 +0100, Christophe Leroy wrote: Two config options exist to define powerpc MPC8xx: * CONFIG_PPC_8xx * CONFIG_8xx In addition, CONFIG_PPC_8xx also defines CONFIG_CPM1

Re: [PATCH v2 11/11] powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

Le 21/03/2015 01:47, Scott Wood a écrit : On Tue, 2015-01-20 at 10:57 +0100, Christophe Leroy wrote: By default, TASK_SIZE is set to 0x8000 for PPC_8xx, which is most likely sufficient for most cases. However, kernel configuration allows to set TASK_SIZE to another value, so the 8xx shall h

[PATCH] dt/bindings: qoriq-clock: Add binding for FMan clock mux

From: Igal Liberman Signed-off-by: Igal Liberman --- .../devicetree/bindings/clock/qoriq-clock.txt | 59 1 file changed, 59 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt

Re: powerpc32: fix warning from include/linux/mm.h

Le 21/03/2015 00:52, Scott Wood a écrit : On Fri, Dec 05, 2014 at 12:20:20PM +0100, LEROY Christophe wrote: include/linux/mm.h: In function 'is_vmalloc_addr': include/linux/mm.h:367:14: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] return addr >= VMALL

Re: [PATCH V2] tty: serial: Add const to struct uart_ops declarations

On 2015-04-05 at 20:24:54 +0200, Joe Perches wrote: [...] > drivers/tty/serial/altera_jtaguart.c| 2 +- > drivers/tty/serial/altera_uart.c| 2 +- For these two drivers: Acked-by: Tobias Klauser ___ Linuxppc-dev mailing list Linux

Re: [PATCH v2 00/19] Refactor PCI controller operations

On Tuesday 31 March 2015 16:00:38 Daniel Axtens wrote: > This patch set moves some PCI controller operations out of ppc_md and > into a new pci_controller_ops struct. > > This is desirable for systems with more than one type of PCI > controller. In particular, it's intended that this new interface

Re: [PATCH v2 04/19] powerpc: Create pci_controller_ops.dma_dev_setup and shim

On Tuesday 07 April 2015 10:31:36 Daniel Axtens wrote: > > Please see https://patchwork.ozlabs.org/patch/431333/ for related work. > > > I'm familiar with that patch series - I've been helping Yijing get it up > to speed on PowerPC. > > > > I think it would be better not to introduce another arc

Re: [PATCH V2] tty: serial: Add const to struct uart_ops declarations

Hi On 04/05/2015 08:24 PM, Joe Perches wrote: These structs can be const, so make them const. Miscellanea: o Add static to struct uart_ops declaration in bfin_sport_uart Signed-off-by: Joe Perches --- [...] for drivers/tty/serial/st-asc.c | 2 +- Acked-by: Patrice Chota