From: Hongtao Jia
MPIC version is useful information for both mpic_alloc() and mpic_init().
The patch provide an API to get MPIC version for reusing the code.
Also, some other IP block may need MPIC version for their own use.
The API for external use is also provided.
Signed-off-by: Jia Hongtao
Add compatible of esdhc for below board:
p2041 p3041 p4080 p5020 p5040
Signed-off-by: Haijun Zhang
CC: Scott Wood
CC: Fleming Andrew-AFLEMING
---
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 1 +
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 1 +
arch/powerpc/boot/dts/fsl/p4080si-post
powerpc, perf: Add generic cache reference and cache miss events for POWER8 PMU
This enables generic cache reference and cache miss events on POWER8 systems by
utilizing raw PMU event codes for L1 cache reference and L1 cache miss events
respectively.
Signed-off-by: Anshuman Khandual
diff --git
From: "Haijun.Zhang"
Overview of P1020RDB-PD device:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 2 USB ports
- 4 TDM ports
- PCIe
Signed-off-by: Haijun Zh
From: "Haijun.Zhang"
The p1020rdb-pd has the similar feature as the p1020rdb.
Therefore, p1020rdb-pd use the same platform file as the p1/p2 rdb board.
Overview of P1020RDB-PD platform:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY)
> -Original Message-
> From: Wood Scott-B07421
> Sent: 29 June 2013 03:46
> To: Singh Sandeep-B37400
> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org;
> Aggrwal Poonam-B10812
> Subject: Re: [1/4] Device tree entry for Freescale TDM controller
>
> On Thu, Mar 07, 20
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.
Signed-off-by: Hongbo Zhang
---
drivers/dma/fsldma.c | 48 ++--
drivers/dma/fsldma.h |4 +
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
arch/powerpc/boot/dts/fsl/qoriq-dma2-0.dtsi | 90 +++
arch/powerpc/boot/dts/fsl/qoriq-dma2-1.dtsi | 90 ++
The Data Address Watchpoint Register (DAWR) on POWER8 can take a 512
byte range but this range must not cross a 512 byte boundary.
Unfortunately we were off by one when calculating the end of the region,
hence we were not allowing some breakpoint regions which were actually
valid. This fixes this
> -Original Message-
> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
> Sent: Monday, July 01, 2013 10:49 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; ga...@kernel.crashing.org; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH v3 1/4] powerpc/mpic: add ir
On Mon, 2013-07-01 at 02:38 +, Wang Dongsheng-B40534 wrote:
> Hi Benjamin & Kumar & scott,
>
> I am not sure who can apply these patches...
>
> Scott already ACK these patches.
>
> A few days ago Scott have a pull request, Scott can accept them? Or ?
I'm happy to pull from Scott. Do somebod
Hi Benjamin & Kumar & scott,
I am not sure who can apply these patches...
Scott already ACK these patches.
A few days ago Scott have a pull request, Scott can accept them? Or ?
[v3,1/4] powerpc/mpic: add irq_set_wake support
http://patchwork.ozlabs.org/patch/234934/
[v3,2/4] powerpc/mpic: add
On Sun, 2013-06-30 at 22:00 +0300, Aaro Koskinen wrote:
> With pm81/pm91/pm121, when the overtemperature state is entered, and
> when it remains on after skipped ticks, the driver will try to leave
> it too soon (immediately on the next tick). This is because the active
> FAILURE_OVERTEMP state is
On Fri, Jun 28, 2013 at 04:14:55PM +0800, Runzhen Wang wrote:
> Thank for Sukadev Bhattip and Xiao Guangrong's help.
> Thank for Michael Ellerman's review.
>
> ChangeLog: v2 -> v3:
>
> 1. Adding a leading zero to all the events code in "power7-events-list.h"
>which don't have a PMC, so that
With pm81/pm91/pm121, when the overtemperature state is entered, and
when it remains on after skipped ticks, the driver will try to leave
it too soon (immediately on the next tick). This is because the active
FAILURE_OVERTEMP state is not visible in "new_failure" variable of the
current tick. Furth
On Tue, Jun 25, 2013 at 08:37 +0200, Anatolij Gustschin wrote:
>
> From: Gerhard Sittig
>
> This patch does not change the content, it merely re-orders
> configuration items and drops explicit options which already
> apply as the default.
>
> Signed-off-by: Gerhard Sittig
> Signed-off-by: Anat
cuda_init_via() is called from find_via_cuda() only, which is __init.
Signed-off-by: Geert Uytterhoeven
---
drivers/macintosh/via-cuda.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/macintosh/via-cuda.c b/drivers/macintosh/via-cuda.c
index 86511c5..d61f271 10064
On Thu, Jun 27, 2013 at 09:19:06PM -0500, Scott Wood wrote:
> On 06/26/2013 09:00:34 PM, Kevin Hao wrote:
> >diff --git a/arch/powerpc/include/asm/mmu-book3e.h
> >b/arch/powerpc/include/asm/mmu-book3e.h
> >index 936db36..bf422db 100644
> >--- a/arch/powerpc/include/asm/mmu-book3e.h
> >+++ b/arch/po
On Thu, Jun 27, 2013 at 08:52:20PM -0500, Scott Wood wrote:
> On 06/27/2013 08:36:37 PM, Kevin Hao wrote:
> >On Thu, Jun 27, 2013 at 02:58:34PM -0500, Scott Wood wrote:
> >> On 06/26/2013 09:00:33 PM, Kevin Hao wrote:
> >> >This is based on the codes in the head_44x.S. Since we always
> >align to
>
On Thu, Jun 27, 2013 at 08:47:27PM -0500, Scott Wood wrote:
> On 06/27/2013 08:36:37 PM, Kevin Hao wrote:
> >On Thu, Jun 27, 2013 at 02:58:34PM -0500, Scott Wood wrote:
> >> On 06/26/2013 09:00:33 PM, Kevin Hao wrote:
> >> >This is based on the codes in the head_44x.S. Since we always
> >align to
>
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