Varun Sethi wrote:
> Following is a brief description of the PAMU hardware:
> PAMU determines what action to take and whether to authorize the action on
> the basis of the memory address, a Logical IO Device Number (LIODN), and
> PAACT table (logically) indexed by LIODN and address. Hardware device
On Wed, 28 Nov 2012 at 16:41, Li Zhong wrote:
> On Tue, 2012-11-27 at 19:22 -0800, Christian Kujau wrote:
> > On Tue, 27 Nov 2012 at 19:06, Christian Kujau wrote:
> > > the same thing[0] happened again in 3.7-rc7, after ~20h uptime:
> >
> > I found the following on patchwork, but this seems to dea
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> This patchset adds arch support to KVM for 64-bit Book3E PowerPC procesosrs
> with Embedded.Hypervisor category. The support is limited to the bolted TLB
> miss
> exception handlers version and was validated on Freescale's e5500 cores
> using P5020
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> Implement ONE_REG interface for EPCR register adding KVM_REG_PPC_EPCR to
> the list of ONE_REG PPC supported registers.
>
> Signed-off-by: Mihai Caraman
> ---
> Documentation/virtual/kvm/api.txt |1 +
> arch/powerpc/include/asm/kvm.h|2
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs for 64-bit
> hosts.
Why would we need this if we have a proper ONE_REG interface for EPCR?
Alex
>
> Signed-off-by: Mihai Caraman
> ---
> arch/powerpc/kvm/booke.c |7 +++
>
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined only
> for 64-bit and HV categories, we will expose it at this point only to 64-bit
> virtual processors running on 64-bit HV hosts.
> Define a reusable setter function for vc
In BookE, EPCR is defined and valid when either the HV or the 64bit
category are implemented. Reflect this in the field definition.
Today the only KVM target on 64bit is HV enabled, so there is no
change in actual source code, but this keeps the code closer to the
spec and doesn't build up artific
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> When delivering guest IRQs, update MSR computation mode according to guest
> interrupt computation mode found in EPCR.
>
> Signed-off-by: Mihai Caraman
> ---
> v1: added intermediate msr variable.
>
> arch/powerpc/kvm/booke.c |9 -
> 1
On 01.12.2012, at 14:28, Alexander Graf wrote:
>
> On 11.10.2012, at 18:13, Mihai Caraman wrote:
>
>> Add emulation helper for getting instruction ea and refactor tlb instruction
>> emulation to use it.
>>
>> Signed-off-by: Mihai Caraman
>> ---
>> v1: use _t_ype instead of _t_arget _r_egister
On 11.10.2012, at 18:13, Mihai Caraman wrote:
> Add emulation helper for getting instruction ea and refactor tlb instruction
> emulation to use it.
>
> Signed-off-by: Mihai Caraman
> ---
> v1: use _t_ype instead of _t_arget _r_egister in tlbilx emulation.
>
> arch/powerpc/include/asm/kvm_ppc.h
* Arnaldo Carvalho de Melo wrote:
> Hi Ingo,
>
> Tested using a cross-compiler and directly on a Raspberry pi (ARM) with
> raspbian.
>
> Please consider pulling.
>
> - Arnaldo
>
> The following changes since commit 18423d3562f396206e0928a71177eeb2edfed077:
>
> Merge tag 'perf-
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