The count register is volatile so we don't need to preserve it.
Store zero to the entry in the exception frame.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig/arch/powe
At the moment system call entry looks like:
crclr so
...
mfcrr9
...
std r9,_CCR(r1)
commit bd19c8994a82 ([POWERPC] system call micro optimisation) put
some space between the crclr and mfcr in order to avoid a stall.
There is still a stall seen between the mfcr and std. We can avoid
th
The XER is a volatile register so there is no need to save and restore
it over a system call - zero it out in the exception stack frame
instead.
This should fix a 5 cycle stall of the mfxer/std seen on POWER7.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
syscall_dotrace_cont and syscall_error_cont tend to complicate perf
output so make them local.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig/arch/powerpc/kernel/entry_
On Tue, 2012-04-03 at 10:55 +1000, Tony Breeds wrote:
> Currently we build all board files regardless of the final zImage
> target. This is sub-optimal (in terms on compilation) and leads to
> problems in one platform needlessly causing failures for other
> platforms.
>
> Use the Kconfig variable
On Wed, 04 Apr 2012 21:21:01 +0200 Wolfgang Denk wrote:
>
> The kernel README says nothing about binutils requirements, the only
> tool related statement is "Make sure you have at least gcc 3.2
> available." Actually I doubt if gcc 3.2 wouldbuild a working kernel
> image.
>
> ELDK 4.2 is based o
On Wed, 2012-04-04 at 19:09 +, Sethi Varun-B16395 wrote:
> > I think that is more due to how you added the MPIC error interrupts
> and
> > issues w/that code. If you are treating the MPIC error interrupts
> as a
> > cascade than they should have a distinct linux IRQ space from the
> > standard
Dear Josh,
In message
you wrote:
>
> > The kernel shouldn't have tried to build that instruction on 8xx, though
> > I suppose if it's in arch/powerpc/boot, we are a bit too eager at
> > building everything including what's not relevant, we might to be a bit
> > more careful at excluding 4xx stuf
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Tuesday, March 27, 2012 7:32 PM
> To: Sethi Varun-B16395
> Cc: Linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH 3/4] powerpc/mpic: Move internal interrupt source
> vector allocation to a separate functio
On Wed, 4 Apr 2012 at 18:06, Suzuki K. Poulose wrote:
> > INFO: Uncompressed kernel (size 0x6d4b80) overlaps the address of the
> > wrapper(0x40)
> > INFO: Fixing the link_address of wrapper to (0x70)
> >Building modules, stage 2.
> >MODPOST 24 modules
> >
> >
> > I st
On Tue, 03 Apr 2012 14:11:12 +0200, Andreas Schwab
wrote:
> Grant Likely writes:
>
> > Can you dump out /debug/powerpc/virq_mapping from both before and
> > after the irq_map patch is applied?
>
> before:
> virq hwirqchip namechip data host name
>16 0x0 MPIC
On 4 April 2012 23:00, Kumar Gala wrote:
...
> What timeframe are you looking for this to go in? 3.4 or 3.5?
>
3.5
Thanks,
Shawn
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On Apr 4, 2012, at 8:32 AM, Shawn Guo wrote:
> Kumar,
>
> Gentle ping ...
>
> Regards,
> Shawn
Was on a bit of travel to nowhere, but that's a different story.
What timeframe are you looking for this to go in? 3.4 or 3.5?
- k
>
> On Fri, Mar 30, 2012 at 01:38:56PM +0800, Shawn Guo wrote:
>
Kumar,
Gentle ping ...
Regards,
Shawn
On Fri, Mar 30, 2012 at 01:38:56PM +0800, Shawn Guo wrote:
> Freescale PowerPC SoCs share a number of IP blocks with Freescale
> ARM/IMX SoCs, FlexCAN, SSI, FEC, eSDHC, USB, etc. There are some
> effort consolidating those drivers to make them work for both
On Apr 1, 2012, at 1:56 AM, Jia Hongtao wrote:
> If PCI is primary bus we should set isa_io/mem_base when parsing PCI bridge
> resources from device tree. The previous way to check the primary bus based
> on a hard-coded address named primary_phb_addr. Now we add a property named
> "fsl,has-isa"
Benjamin Herrenschmidt writes:
> Do you see a relevant difference in the X log ?
Nothing at all.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
___
On 04/03/2012 10:48 PM, Christian Kujau wrote:
On Tue, 3 Apr 2012 at 18:08, Benjamin Herrenschmidt wrote:
I have observed this randomly on the G5 ... sometimes, if I try again,
it works... it's very very odd. There is some kind of race maybe with
async startup ? Or a problem with the vfs path wa
Adding 2 SATA nodes on Bluestone device tree file.
Signed-off-by: Thang Q. Nguyen
---
arch/powerpc/boot/dts/bluestone.dts | 21 +
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/bluestone.dts
b/arch/powerpc/boot/dts/bluestone.dts
index
Thanks Sergei for quick response.
In the original driver (sata_dwc_460ex.c), an instance of the
sata_dwc_host_priv structure is declared and used globally. This will not
require functions to have ata_port structure or alternative structures
(ata_link, hsdev,...) to be declared in the function calls
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