I had the same issue with an MPC885 board. My kernel was 2.6.33. On
that board decrementer exception was not working. I replaced the
board, took new board (MPC885 only, just another board) and the same
kernel worked fine. I don't know how the problem was solved.
-Mohan
On 9/22/11, Scott Wood wro
On Wed, Sep 21, 2011 at 05:28:50PM +0800, Yong Zhang wrote:
> Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
> We run all interrupt handlers with interrupts disabled
> and we even check and yell when an interrupt handler
> returns with interrupts enabled (see commit [b7
On 09/21/2011 01:56 AM, Vineeth wrote:
>>> What was the issue? You really should try to make this work rather than
>>> hack around it.
>
> what we found was the decrementer is not generating an exception when it
> becomes 0. and the timebase registers are not getting incremented too.
Does the de
Hi Roy,
On Fri, Sep 09 2011, Roy Zang wrote:
> From: Xu lei
>
> Freescale eSDHC registers only support 32-bit accesses,
> this patch ensures that all Freescale eSDHC register accesses
> are 32-bit.
>
> Signed-off-by: Xu lei
> Signed-off-by: Roy Zang
> Signed-off-by: Kumar Gala
Pushed to mmc-n
On Wed, Sep 21, 2011 at 12:49:20PM +0200, Wolfram Sang wrote:
> Move the driver to the place where it is expected to be nowadays. Also
> rename its CONFIG-name to match the rest and adapt the defconfigs.
> Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to
> the platforms, beca
On Wed, Sep 21, 2011 at 03:01:21PM +1000, Stephen Rothwell wrote:
> Hi Greg,
>
> Today's linux-next merge of the tty tree got conflicts in
> arch/powerpc/include/asm/udbg.h and arch/powerpc/kernel/udbg.c between
> commit c26afe9e8591 ("powerpc/ps3: Add gelic udbg driver") from the
> powerpc tree a
>> What was the issue? You really should try to make this work rather than
>> hack around it.
what we found was the decrementer is not generating an exception when it
becomes 0. and the timebase registers are not getting incremented too. The
exceptions are enabled in MSR registers.
we are using
Some devices have a dma-window that starts at the address 0. This allows
DMA addresses to be mapped to this address and returned to drivers as a
valid DMA address. Some drivers may not behave well in this case, since
the address 0 is considered an error or not allocated.
The solution to avoid this
On Wed, Sep 21, 2011 at 11:55:36AM +0200, Thomas Gleixner wrote:
> On Wed, 21 Sep 2011, Takashi Iwai wrote:
>
> > At Wed, 21 Sep 2011 17:28:54 +0800,
> > Yong Zhang wrote:
> > >
> > > Since commit [c58543c8: genirq: Run irq handlers with interrupts
> > > disabled],
> >
> > Hm, this id hits a di
On Wed, Sep 21, 2011 at 11:52:00AM +0200, Takashi Iwai wrote:
> At Wed, 21 Sep 2011 17:28:54 +0800,
> Yong Zhang wrote:
> >
> > Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
>
> Hm, this id hits a different commit:
> commit c58543c869606532c2382f027d6466f4672ea75
Move the driver to the place where it is expected to be nowadays. Also
rename its CONFIG-name to match the rest and adapt the defconfigs.
Finally, move selection of REQUIRE_GPIOLIB or WANTS_OPTIONAL_GPIOLIB to
the platforms, because this option is per-platform and not per-driver.
Signed-off-by: Wo
Activate all MPC512x related boards. Also enable GPIO-driver, SPI driver
and at25 to test SPI. Enable DEVTMPFS. Bump to 3.1-rc6.
Signed-off-by: Wolfram Sang
Cc: Anatolij Gustschin
Cc: Benjamin Herrenschmidt
---
arch/powerpc/configs/mpc512x_defconfig | 19 +++
1 files changed,
The RTAS firmware flash update is conducted using an RTAS call that is
serialized by lock_rtas() which uses spin_lock. While the flash is in
progress, rtasd performs scan for any RTAS events that are generated by
the system. rtasd keeps scanning for the RTAS events generated on the
machine. This is
On Wed, Sep 21, 2011 at 12:28 PM, Yong Zhang wrote:
> Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
> We run all interrupt handlers with interrupts disabled
> and we even check and yell when an interrupt handler
> returns with interrupts enabled (see commit [b738a50a:
On Wed, 21 Sep 2011, Takashi Iwai wrote:
> At Wed, 21 Sep 2011 17:28:54 +0800,
> Yong Zhang wrote:
> >
> > Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
>
> Hm, this id hits a different commit:
> commit c58543c869606532c2382f027d6466f4672ea756
> Author: Davi
At Wed, 21 Sep 2011 17:28:54 +0800,
Yong Zhang wrote:
>
> Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
Hm, this id hits a different commit:
commit c58543c869606532c2382f027d6466f4672ea756
Author: David S. Miller
Date: Tue Oct 13 00:49:09 2009 -0700
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this
Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this
On Wed, 21 Sep 2011 02:10:42 +
Tabi Timur-B04825 wrote:
...
> The definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT are wrong:
>
> #define MFB_SET_PIXFMT 0x80014d08
> #define MFB_GET_PIXFMT 0x40014d08
>
> The "01" is the size. However, these ioctls take a __u32 as a paramet
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