On Fri, Sep 9, 2011 at 10:34 AM, Paul E. McKenney
wrote:
> On Fri, Sep 09, 2011 at 10:23:33AM -0700, Olof Johansson wrote:
>> [+linuxppc-dev]
>>
>> On Tue, Sep 6, 2011 at 11:00 AM, Paul E. McKenney
>> wrote:
>> > The trailing isync/lwsync in PowerPC value-returning atomics needs
>> > to be a sync
On Fri, Sep 09, 2011 at 10:23:33AM -0700, Olof Johansson wrote:
> [+linuxppc-dev]
>
> On Tue, Sep 6, 2011 at 11:00 AM, Paul E. McKenney
> wrote:
> > The trailing isync/lwsync in PowerPC value-returning atomics needs
> > to be a sync in order to provide the required ordering properties.
> > The le
[+linuxppc-dev]
On Tue, Sep 6, 2011 at 11:00 AM, Paul E. McKenney
wrote:
> The trailing isync/lwsync in PowerPC value-returning atomics needs
> to be a sync in order to provide the required ordering properties.
> The leading lwsync/eieio can remain, as the remainder of the required
> ordering gua
> -Original Message-
> From: Anton Vorontsov [mailto:cbouatmai...@gmail.com]
> Sent: Friday, September 09, 2011 22:07 PM
> To: Zang Roy-R61911
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
> foundation.org; Xu Lei-B33228; Kumar Gala
> Subject: Re: [PATCH] eSD
On 2011-09-07 at 10:10:51 +0200, Yong Zhang wrote:
> This flag is a NOOP and can be removed now.
>
> Signed-off-by: Yong Zhang
For altera_jtaguart and altera_uart:
Acked-by: Tobias Klauser
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Linuxppc-dev@lists.ozlabs.org
On Fri, Sep 09, 2011 at 08:05:46PM +0800, Roy Zang wrote:
> From: Xu lei
>
> Freescale eSDHC registers only support 32-bit accesses,
> this patch ensures that all Freescale eSDHC register accesses
> are 32-bit.
>
> Signed-off-by: Xu lei
> Signed-off-by: Roy Zang
> Signed-off-by: Kumar Gala
>
> Previously, I sent this patch together with another one. But
> technically they are separated patches. I got some comments from
> Anton about the patch. I will try to address the comment. but for this
> one, it is a stand along patch. I'd like to push it first.
Okay.
> I do not see any comme
> -Original Message-
> From: Wolfram Sang [mailto:w.s...@pengutronix.de]
> Sent: Friday, September 09, 2011 20:33 PM
> To: Zang Roy-R61911
> Cc: c...@laptop.org; linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
> a...@linux-foundation.org; cbouatmai...@gmail.com; Xu Lei-B33228; K
On Fri, Sep 09, 2011 at 12:23:05PM +, Zang Roy-R61911 wrote:
> > > Freescale eSDHC registers only support 32-bit accesses,
> > > this patch ensures that all Freescale eSDHC register accesses
> > > are 32-bit.
> >
> > So, what about the byte-swapping that Anton needed? You are simply
> > remov
> -Original Message-
> From: Wolfram Sang [mailto:w.s...@pengutronix.de]
> Sent: Friday, September 09, 2011 19:40 PM
> To: Zang Roy-R61911
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
> foundation.org; cbouatmai...@gmail.com; Xu Lei-B33228; Kumar Gala
> Subj
> -Original Message-
> From: Wolfram Sang [mailto:w.s...@pengutronix.de]
> Sent: Friday, September 09, 2011 19:40 PM
> To: Zang Roy-R61911
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
> foundation.org; cbouatmai...@gmail.com; Xu Lei-B33228; Kumar Gala
> Subj
PPC __arch_swab32 and __arch_swab16 generates non optimal code.
They do not schedule very well, need to copy its input register
and swab16 needs an extra insn to clear its upper bits.
Fix this with better inline ASM.
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/include/asm/swab.h | 28
Hi,
On Fri, Sep 09, 2011 at 08:05:46PM +0800, Roy Zang wrote:
> From: Xu lei
>
> Freescale eSDHC registers only support 32-bit accesses,
> this patch ensures that all Freescale eSDHC register accesses
> are 32-bit.
So, what about the byte-swapping that Anton needed? You are simply
removing that
From: Xu lei
Freescale eSDHC registers only support 32-bit accesses,
this patch ensures that all Freescale eSDHC register accesses
are 32-bit.
Signed-off-by: Xu lei
Signed-off-by: Roy Zang
Signed-off-by: Kumar Gala
---
This is a patch resend
http://patchwork.ozlabs.org/patch/106245/
based on
> > I would do it in the IO accessors.
> >
> > Thanks,
> Any update for your comment?
It is still valid. You can go that road.
--
Pengutronix e.K. | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/ |
signature.asc
> -Original Message-
> From: Anton Vorontsov [mailto:cbouatmai...@gmail.com]
> Sent: Friday, August 12, 2011 18:05 PM
> To: Zang Roy-R61911
> Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
> foundation.org; Xu Lei-B33228; Kumar Gala; Wood Scott-B07421
> Subject:
Hello All,
We have a powerpc 8260 based system with linux-2.4.20 version.Some
of the pthreads in multi-threaded application is getting defunct after some
time.Want help to solve this problem.
Thanks in advance ,
Shuchitha
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Linuxppc-dev mai
perf events, powerpc: Add POWER7 stalled-cycles-frontend/backend events
Extent the POWER7 PMU driver with definitions for generic front-end and back-end
stall events.
As explained in Ingo's original comment(8f62242246351b5a4bc0c1f00c0c7003edea128a
), the exact definitions of the stall events are
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