Re [PATCH v1] APM821xx: Add support for new SoC APM821xx

Hello all   my company use ARM,amcc CPU for different prouduct. i support to add  [PATCH v1] APM821xx: Add support for new SoC APM821xx , now we do anythings for Linux develop and make easier for  ordinary user .        leowang    2

[PATCH 3/3] Partition migration in the kernel

Enable partition migration in the kernel. To do this a new sysfs file, /sys/kernel/mobility/migration, is created. In order to initiate a migration the stream id (generated by the HMC managing the system) is written to this file. After a migration occurs, and what is the majority of this code, t

[PATCH 2/3] Export rtas_ibm_suspend_me()

Export the rtas_ibm_suspend_me() routine. This is needed to perform partition migration in the kernel. Signed-off-by: Nathan Fontenot --- arch/powerpc/include/asm/rtas.h |1 + arch/powerpc/kernel/rtas.c |4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) Index: linux-next/ar

[PATCH 1/3] Export pseries device tree updating routines

Export routines associated with adding and removing device tree nodes on pseries needed for device tree updating. Signed-off-by: Nathan Fontenot --- arch/powerpc/platforms/pseries/dlpar.c |4 ++-- arch/powerpc/platforms/pseries/pseries.h |9 + 2 files changed, 11 insertions(+),

[PATCH 0/3] Enable partition migration in the kernel

This set of patches implements partition migration capability in the kernel. With this patch partition migration is done by writing the stream id (generated by the HMC managing the system) to a new sysfs file. This then performs the migration of the partition and the necessary device tree upda

Re: [PATCH v4] powerpc/mpc8xxx_gpio.c: extend the driver to support mpc512x gpios

On Mon, Aug 09, 2010 at 07:58:48AM +0200, Anatolij Gustschin wrote: > The GPIO controller of MPC512x is slightly different from > 8xxx GPIO controllers. The register interface is the same > except the external interrupt control register. The MPC512x > GPIO controller differentiates between four int

Re: How to define an I2C-to-SPI bridge device ?

On Fri, Sep 10, 2010 at 08:14:44PM +0200, André Schwarz wrote: > > > At first I thought about registering 4 SPI busses representing the 4 cs# > > > lines and hide the cs# generation from the user. This would make > > > multiple cs# assertions for a single write impossible which is a very > > > usef

Re: How to define an I2C-to-SPI bridge device ?

On Fri, Sep 10, 2010 at 08:14:44PM +0200, André Schwarz wrote: [...] > > Does the device actually generate edge interrupts? Or is it a level > > irq device? If it is a level irq device, then the correct way to > > handle this is to disable the irq line so that the event can be > > handled at non-

[PATCH v1] APM821xx: Add support for new SoC APM821xx

From: Tirumala Marri This patch adds CPU, device tree, defconfig and bluestone board support for APM821xx SoC. Signed-off-by: Tirumala R Marri --- V1: * CPU name changed to 464. * defconfig is created using "make savedefconfig". --- arch/powerpc/boot/dts/bluestone.dts | 254 +

Re: How to define an I2C-to-SPI bridge device ?

Grant, [snip] > > > > 1. > > The SC18IS602 is capable of generating interrupts which is *extremely* > > useful triggering on the end of the actual SPI transaction and not the > > end of I2C chip access. Since we need an IRQ_ACK over I2C (which takes > > lng with IRQ being still asserted) I'm

Re: How to define an I2C-to-SPI bridge device ?

On Fri, Sep 10, 2010 at 10:11:33AM +0200, André Schwarz wrote: > Grant, Anton, > > > > > > There is no longer any need for separate of and non-of drivers for the same > > hardware. Any device may have the of_node pointer in struct device set, > > and drivers can use the pointer as an alternat

[PATCH 14/17] Fix powerpc irqflags

This (sub)patch is separated out for reviewing purposes. Once ACK'd it will need to be rolled into the main patch. Cc: b...@kernel.crashing.org Cc: pau...@samba.org Cc: linuxppc-dev@lists.ozlabs.org --- arch/powerpc/include/asm/hw_irq.h| 113 -- arch/powerpc

Re: how to understand powerpc's BRx ORx

On Sep 10, 2010, at 12:56 AM, hacklu wrote: > I didn't understand the address mask. > it's said that: BR[BA] is the base address,the OR[AM] is the address mask, > "Provides masking for corresponding BRx bits. By masking address > bits independently, SDRAM devices of different size address range

CONFIG_KTIME_SCALAR=y

Noticed that there is a CONFIG_KTIME_SCALAR knob for HIGH_RES on 32 bit which is off for ppc. I wonder not 64 bit math on 32 bit arch is good enough on ppc? Jocke ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.or

Re: CONFIG_PROVE_LOCKING broken on 83xx (and all of powerpc?)

Dear Scott Wood, In message <20100909173735.503c4...@schlenkerla.am.freescale.net> you wrote: > > It actually can load an ELF file, but it doesn't currently support > passing a device tree to it (only argc/argv text arguments, or some > vxworks stuff). I see no problems to extend U-Boot such that

Re: [PATCH 1/3 v2][MTD] P4080/eLBC: Make Freescale elbc interrupt common to elbc devices

On Fri, Sep 10, 2010 at 02:58:15PM +0800, Zang Roy-R61911 wrote: [...] > > > +static struct of_platform_driver fsl_lbc_ctrl_driver = { > > > > Need linux/of_platform.h for this. > It has been include by > fsl_lbc.h->linux/of_platform.h-> linux/platform_device.h > Before submitting the patch, I hav

[PATCHv4] Xilinx Virtex 4 FX Soft FPU support

This patch enables support for Xilinx Virtex 4 FX singe-float FPU.> This patch enables support for Xilinx Virtex 4 FX singe-float FPU. Changelog v3-v4 -Added help for CONFIG_XILINX_SOFTFPU option -Made kernel math emulation dependent on !PPC_FPU. Changelog v2-v3: -Fixed w

Re: How to define an I2C-to-SPI bridge device ?

Grant, Anton, > > There is no longer any need for separate of and non-of drivers for the same > hardware. Any device may have the of_node pointer in struct device set, and > drivers can use the pointer as an alternative to platform_data to get > information about the hardware configuration.