Scott Wood wrote:
Joakim Tjernlund wrote:
Why does not pinning interact well with CPU15? If pinned, you never get
a TLB miss for kernel text so that should mitigate the CPU15 problem.
The nature of the workaround for CPU15 is that we can't keep it pinned
-- we have to take an ITLB miss on eve
Hi Linus !
This contains one code fix, 3 little device-tree fixes and a bunch of
defconfig updates for Freescale platforms for 2.6.32 along with one
defconfig update for PA-Semi.
Overall, a large diffstat but not much actual churn. If you are unhappy
with the defconfig updates at that stage of th
>-Original Message-
>From: Anton Vorontsov [mailto:avoront...@ru.mvista.com]
>Sent: Wednesday, November 11, 2009 5:41 AM
>To: David Miller
>Cc: Fleming Andy-AFLEMING; Jon Loeliger; Kumar
>Gopalpet-B05799; Lennert Buytenhek; Stephen Hemminger;
>net...@vger.kernel.org; linuxppc-...@ozla
>-Original Message-
>From: Anton Vorontsov [mailto:avoront...@ru.mvista.com]
>Sent: Wednesday, November 11, 2009 5:41 AM
>To: David Miller
>Cc: Fleming Andy-AFLEMING; Jon Loeliger; Kumar
>Gopalpet-B05799; Lennert Buytenhek; Stephen Hemminger;
>net...@vger.kernel.org; linuxppc-...@ozla
Jonathan Haws wrote:
All,
I am having some troubles getting interrupts to fire from my kernel module. I
have connected the ISR with a call to request_irq() and have configured my
device to generate interrupts. However, my ISR is called once when I connect
the interrupt for the first time.
--- Begin Message ---
The code under "if (is_global_init())" is bogus, and is_global_init()
itself is not right in mt case.
Contrary to what the comment says, nowadays force_sig_info() does kill
init even if the handler is SIG_DFL. Note that force_sig_info() clears
SIGNAL_UNKILLABLE exactly for t
Before calling gfar_clean_tx_ring() the driver grabs an irqsave
spinlock, and then tries to recycle skbs. But since
skb_recycle_check() returns 0 with IRQs disabled, we'll never
recycle any skbs.
It appears that gfar_clean_tx_ring() and gfar_start_xmit() are
mostly idependent and can work in paral
gfar_error() can arrive at the middle of gfar_start_xmit() processing,
and so it can trigger transfers of BDs that we don't yet expect to
be transmitted.
Fix this by locking the tx queues in gfar_error().
Signed-off-by: Anton Vorontsov
---
drivers/net/gianfar.c |8
1 files changed,
We obviously want to write a modified 'temp' value back to the
register, not the saved IRQ flags.
Signed-off-by: Anton Vorontsov
---
drivers/net/gianfar_sysfs.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/gianfar_sysfs.c b/drivers/net/gianfar_sysfs.c
ind
commit fba4ed030cfae7efdb6b79a57b0c5a9d72c9 ("gianfar: Add Multiple
Queue Support") introduced the following build failure:
CC gianfar.o
gianfar.c: In function 'gfar_restore':
gianfar.c:1249: error: request for member 'napi' in something not a structure
or union
This patch fixes the issue
It is OK to poll with disabled IRQs, so remove the warning.
Signed-off-by: Anton Vorontsov
---
drivers/net/gianfar.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 197b358..79c28f5 100644
--- a/drivers/net/gianfar.c
+
NAPI drivers try to recycle SKBs in their polling routine, but we
generally don't know the context in which the polling will be called,
and the skb recycling itself may require IRQs to be enabled.
This patch adds irqs_disabled() test to the skb_recycle_check()
routine, so that we'll not let the dr
Hi all,
Here are some fixes for the gianfar driver, patches on the way.
Thanks,
--
Anton Vorontsov
email: cbouatmai...@gmail.com
irc://irc.freenode.net/bd2
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Scott Wood wrote on 11/11/2009 00:21:18:
>
> Joakim Tjernlund wrote:
> > Scott Wood wrote on 10/11/2009 23:02:10:
> >> Joakim Tjernlund wrote:
> >> It wasn't the CPU15 workaround that I was worried about taking down the
> >> pinning -- but rather the CPU15 bug itself causing bad code to be
> >>
> -Original Message-
> From: glik...@secretlab.ca [mailto:glik...@secretlab.ca] On Behalf Of Grant
> Likely
> Sent: Tuesday, November 10, 2009 9:45 AM
> To: Richard Röjfors
> Cc: spi-devel-gene...@lists.sourceforge.net; linuxppc-...@ozlabs.org; Andrew
> Morton;
> dbrown...@users.sourcefor
Joakim Tjernlund wrote:
Scott Wood wrote on 10/11/2009 23:02:10:
Joakim Tjernlund wrote:
It wasn't the CPU15 workaround that I was worried about taking down the
pinning -- but rather the CPU15 bug itself causing bad code to be
executed inside the pinned kernel mapping.
Oh, but then one is scr
Scott Wood wrote on 10/11/2009 23:02:10:
>
> Joakim Tjernlund wrote:
> > Scott Wood wrote on 10/11/2009 22:36:32:
> >> Joakim Tjernlund wrote:
> >>> yes, maybe there is a way around that. Perhaps by using one of the
> >>> pinned entries for loaded modules, i.e avoid ITLB misses for kernel space?
Grant Likely wrote:
> Oops, I replied to the original version, but missed the subsequent
> versions. Looks like some of my comments still apply though.
> Overall, the patch changes too many things all at once. You should
> look at splitting it up. At the very least the io accessor changes
> shou
On Tue, Nov 10, 2009 at 12:43 PM, Albrecht Dreà wrote:
> Use the MPC5200 GPT api for the WDT which drastically simplifies this file.
>
> Signed-off-by: Albrecht DreÃ
> ---
>
> Â drivers/watchdog/mpc5200_wdt.c | Â 246
> +++-
> Â 1 files changed, 65 insertions
Hi Grant:
Am 10.11.09 20:59 schrieb(en) Grant Likely:
On Tue, Nov 10, 2009 at 12:43 PM, Albrecht Dreà wrote:
> Use the MPC5200 GPT api for the WDT which drastically simplifies this file.
>
> Signed-off-by: Albrecht DreÃ
> ---
>
> Â drivers/watchdog/mpc5200_wdt.c | Â 246
+++-
Scott Wood wrote on 10/11/2009 17:55:28:
>
> Scott Wood wrote:
> > Joakim Tjernlund wrote:
> >> Why does not pinning interact well with CPU15? If pinned, you never get
> >> a TLB miss for kernel text so that should mitigate the CPU15 problem.
> >
> > The nature of the workaround for CPU15 is that
This set of patches merges the MPC5200 WDT into the GPT code, making it
functional again - currently, the MPC5200 GPT code blocks using the WDT.
Additionally, it defines a new OF property as to reserve and/or enable the
WDT during the boot process which may be a requirement for safety-related
(e.g
Scott Wood wrote on 10/11/2009 00:00:04:
>
> On Mon, Nov 09, 2009 at 03:53:21PM -0600, Scott Wood wrote:
> > On Fri, Nov 06, 2009 at 10:29:44AM +0100, Joakim Tjernlund wrote:
> > > > > With this, the kernel hangs after "Mount-cache hash table entries:
> > > > > 512".
> > > >
> > > > Somewhat su
Scott Wood wrote on 10/11/2009 21:00:07:
>
> Joakim Tjernlund wrote:
> > I think I have misunderstood, its is not CPU15 or 8xx problem per se, it
> > is a general problem that could happen to any ppc CPU, right?
> > 8xx just happen to be the first CPU that hits this case due to my
> > DAR fixing
>
Use the MPC5200 GPT api for the WDT which drastically simplifies this file.
Signed-off-by: Albrecht DreÃ
---
drivers/watchdog/mpc5200_wdt.c | 246 +++-
1 files changed, 65 insertions(+), 181 deletions(-)
diff --git a/drivers/watchdog/mpc5200_wdt.c b/driver
Merge the WDT code into the GPT interface.
Signed-off-by: Albrecht DreÃ
---
Notes:
The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. As this
exceeds the range of an int, some api's had to be changed to u64.
The WDT api is exported as to keep the WDT driver separated from the
Add the "wdt,on-boot" OF property as to reserve a GPT as WDT which may be a
requirement in safety-related (e.g. ISO 61508) applications.
Signed-off-by: Albrecht Dreß
---
Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 15 ++-
1 files changed, 14 insertions(+), 1 deletions(-)
On Tue, Nov 10, 2009 at 12:40 PM, Albrecht Dreß wrote:
> Add the "wdt,on-boot" OF property as to reserve a GPT as WDT which may be a
> requirement in safety-related (e.g. ISO 61508) applications.
>
> Signed-off-by: Albrecht Dreß
> ---
>
> Documentation/powerpc/dts-bindings/fsl/mpc5200.txt | 15
On Tue, Nov 10, 2009 at 1:33 PM, Nathan Fontenot wrote:
> Grant Likely wrote:
>>
>> Merge common code between PowerPC and MicroBlaze
>>
>> Signed-off-by: Grant Likely
>> ---
>>
>> arch/microblaze/kernel/prom.c | 113
>>
>> arch/powerpc/kernel/prom.c |
On Tue, Nov 10, 2009 at 1:26 PM, Albrecht Dreà wrote:
> Hi Grant:
>
> Am 10.11.09 20:59 schrieb(en) Grant Likely:
>>
>> On Tue, Nov 10, 2009 at 12:43 PM, Albrecht DreÃ
>> wrote:
>> > Use the MPC5200 GPT api for the WDT which drastically simplifies this
>> > file.
>> >
>> > Signed-off-by: Albrec
Scott Wood wrote on 10/11/2009 21:27:05:
>
> Joakim Tjernlund wrote:
> > Scott Wood wrote on 10/11/2009 17:55:28:
> >> Except that the invalidation only happens when you take an ITLB miss on
> >> an adjacent page, which means we'd likely never get CPU15 protection for
> >> kernel code if pinning
Joakim Tjernlund wrote:
Scott Wood wrote on 10/11/2009 22:36:32:
Joakim Tjernlund wrote:
yes, maybe there is a way around that. Perhaps by using one of the
pinned entries for loaded modules, i.e avoid ITLB misses for kernel space?
Not sure what you mean... loaded modules won't be pinned, and
On Tue, Nov 10, 2009 at 12:41 PM, Albrecht Dreà wrote:
> Merge the WDT code into the GPT interface.
>
> Signed-off-by: Albrecht DreÃ
> ---
Hi Albrecht,
Thanks for this work. Comments below.
>
> Notes:
>
> The maximum timeout for a 5200 GPT @ 33 MHz clock is ~130 seconds. Â As this
> exceeds
Grant Likely wrote:
Merge common code between PowerPC and MicroBlaze
Signed-off-by: Grant Likely
---
arch/microblaze/kernel/prom.c | 113
arch/powerpc/kernel/prom.c| 114
drivers/of/base.c | 1
Scott Wood wrote on 10/11/2009 22:36:32:
>
> Joakim Tjernlund wrote:
> > Scott Wood wrote on 10/11/2009 21:27:05:
> >> Joakim Tjernlund wrote:
> >>> Scott Wood wrote on 10/11/2009 17:55:28:
> Except that the invalidation only happens when you take an ITLB miss on
> an adjacent page, wh
Joakim Tjernlund wrote:
Scott Wood wrote on 10/11/2009 00:00:04:
syscall_exit_cont, SRR0/SRR1 were being loaded immediately prior to a page
boundary, with the rfi after the page boundary. On crossing the boundary,
we take an ITLB miss (which goes from possibility to certainty with the
CPU15 wo
On Tue, Nov 10, 2009 at 9:19 AM, Richard Röjfors
wrote:
> Grant Likely wrote:
>> Oops, I replied to the original version, but missed the subsequent
>> versions. Looks like some of my comments still apply though.
>> Overall, the patch changes too many things all at once. You should
>> look at spl
[ Resending with linuxppc-dev list domain fixed ]
On Wed, 2009-11-04 at 13:23 +0100, Max Vozeler wrote:
> I installed Ubuntu 8.10 on this Powerbook G4 ("alu" I think)
> for a friend of mine. As soon as therm_adt746x got loaded, the
> fan turned into a noise steam engine.
>
> This was on Ubun
On Mon, Nov 09, 2009 at 09:40:09AM -0700, Grant Likely wrote:
> The TX and RX irq handlers are identical. Merge them
Applied, thanks.
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Hello,
When having high traffic on the MPC5200B ATA (MWDMA2), FEC (100MBit)
and LPC (MTD FLASH read) I will get the typical
FEC_IEVENT_RFIFO_ERROR's.
Without the FLASH reads, that we use to stress the probably existing
LPC arbiter or MPC5200B silicon bug when running UDMA2+LPC, and which
should n
CPU is MPC8548, kernel version is 2.6.31.5,CONFIG_FSL_DMA and
CONFIG_ASYNC_TX_DMA options are all enabled.
#mdadm -C /dev/md0 --assume-clean -l5 -n3 /dev/sd{a,b,c}
#dd if=/dev/zero of=/dev/md0 bs=1M count=1000
Oops: Exception in kernel mode, sig: 5 [#1]
MPC85xx CDS
Modules linked in:
NIP: c01c45d8
Hi,
I've a PPC8313e based board running linux2.6.29 on it. Also I've a
FRAM interfaced to it via SPI. This FRAM almost similar to SPI based
EEPROM, so I'm trying to use EEPROM's driver AT25.
Kernel Configuration :
SPI support --> selected
Freescale MPC83xx/QUICC Engi
This one enables the mpc52xx_spi driver for usage of user defined gpio lines
as chipselect. This way we can control some more spi devices than only one
Signed-off-by: Luotao Fu
---
drivers/spi/mpc52xx_spi.c | 57 +---
1 files changed, 53 insertions(+), 4
Before reading status register to check MODF failure, we have to clear it
first since the MODF flag will be set after initializing the spi master,
if the hardware comes up with a low SS. The processor datasheet reads:
Mode Fault flag -- bit sets if SS input goes low while SPI is configured as a
mas
Hi Grant,
here are several patches for the dedicated spi controller on mpc5200 SOC. The
patchset contains two fixes and an enhancement. I noticed that your original V4
Patch is still pending for mainline. So I made the patches against the latest
version in your -next tree. Tested on a mpc5200b ma
Signed-off-by: Luotao Fu
---
drivers/spi/mpc52xx_spi.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/mpc52xx_spi.c b/drivers/spi/mpc52xx_spi.c
index 5b036f2..79ba678 100644
--- a/drivers/spi/mpc52xx_spi.c
+++ b/drivers/spi/mpc52xx_spi.c
@@ -430,6 +430,8 @@
JFFS2 uses lesser compression ratio and inflate always
ends up in "copy direct from output" case.
This patch tries to optimize the direct copy procedure.
Uses get_unaligned() but only in one place.
The copy loop just above this one can also use this
optimization, but I havn't done so as I have not
Am Dienstag 10 November 2009 07:27:30 schrieb Rusty Russell:
> This is nicer for modern R/O protection. And noone needs it non-const, so
> constify the callers as well.
>
> Signed-off-by: Rusty Russell
> To: Christian Borntraeger
> Cc: linuxppc-...@ozlabs.org
> ---
> drivers/char/hvc_beat.c
Scott Wood wrote on 10/11/2009 00:00:04:
>
> On Mon, Nov 09, 2009 at 03:53:21PM -0600, Scott Wood wrote:
> > On Fri, Nov 06, 2009 at 10:29:44AM +0100, Joakim Tjernlund wrote:
> > > > > With this, the kernel hangs after "Mount-cache hash table entries:
> > > > > 512".
> > > >
> > > > Somewhat surp
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