Re: [PATCH 01/11] async_tx: don't use src_list argument of async_xor() for dma addresses

2008-11-14 Thread Benjamin Herrenschmidt
On Fri, 2008-11-14 at 17:42 -0700, Dan Williams wrote: > I don't like the stack space implications of this change. Especially > for large arrays we will be carrying two 'src_cnt' size arrays on the > stack, one from MD and one from async_tx. However, I think the > current scheme of overwriting in

Re: [PATCH] mpc832x_rdb: fix swapped ethernet ids

2008-11-14 Thread David Gibson
On Fri, Nov 14, 2008 at 10:16:19AM -0500, Michael Barkowski wrote: > David Gibson wrote: >> On Thu, Nov 13, 2008 at 10:18:28AM -0500, Michael Barkowski wrote: >>> ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and >>> ethernet1 should be enet0 (UCC2/eth0), to be consistent with

Re: [PATCH 02/11] async_tx: add support for asynchronous GF multiplication

2008-11-14 Thread Dan Williams
On Thu, Nov 13, 2008 at 8:15 AM, Ilya Yanok <[EMAIL PROTECTED]> wrote: > This adds support for doing asynchronous GF multiplication by adding > four additional functions to async_tx API: > async_pqxor() does simultaneous XOR of sources and XOR of sources > GF-multiplied by given coefficients. > a

Re: [PATCH 01/11] async_tx: don't use src_list argument of async_xor() for dma addresses

2008-11-14 Thread Dan Williams
On Thu, Nov 13, 2008 at 8:15 AM, Ilya Yanok <[EMAIL PROTECTED]> wrote: > Using src_list argument of async_xor() as a storage for dma addresses > implies sizeof(dma_addr_t) <= sizeof(struct page *) restriction which is > not always true. > > Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]> > --- I don

Re: [PATCH 2/2] powerpc/mpc5200: Add MDMA/UDMA support to MPC5200 ATA driver

2008-11-14 Thread Jeff Garzik
ACK ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Hollis Blanchard
On Friday 14 November 2008 11:29:35 Milton Miller wrote: > > I simply don't see a good place to do this in the kernel. It would have > > to be before the first lmb_alloc() call, which for safety would put it > > inside early_init_devtree() -- along with the other lmb_reserve() > > calls.[1] > > > >

[PATCH] powerpc: Correct page-in counter for CMM

2008-11-14 Thread Robert Jennings
Linux will report the number of page-ins so that the hypervisor can better determine partition memory pressure. The hardware page size and the OS page size can be different. In the case where the hardware page size is 4k and the OS is running with 64k pages the prior patch would under-report the

Please pull linux-2.6-mpc52xx.git

2008-11-14 Thread Grant Likely
Hi Ben and Paulus. Please pull the 'merge' branch of my MPC5200 tree (url below). I've got mpc5200 bug fixes, virtex bug fixes and defconfig updates in it. This all needs to go into 2.6.28. This branch does have both mpc5200 and Xilinx Virtex 4xx changes. I've cleared it with Josh that it is ok

Re: [PATCH V4] workaround for mpc52xx erratum #364 (serial may not be reset in break state)

2008-11-14 Thread Grant Likely
On Thu, Nov 6, 2008 at 1:11 AM, René Bürgel <[EMAIL PROTECTED]> wrote: > This patch is a workaround for bug #364 found in the MPC52xx processor. > The errata document can be found under > http://www.freescale.com/files/32bit/doc/errata/MPC5200E.pdf?fpsp=1&WT_TYPE=Errata&WT_VENDOR=FREESCALE&WT_FILE_

[patch v3] smp-ipi-names

2008-11-14 Thread Milton Miller
With the new generic smp call function helpers, I noticed the code in smp_message_recv was a single function call in many cases. While getting the message number from the ipi data is easy, we can reduce the path length by a function and data dependent switch by registering seperate ipi actions for

Canyonlands PCIE Interrupt Handler

2008-11-14 Thread Deepak Pandian
Hi, I am trying to implement a platform driver for msi. Whenever I write in to the PCIE-IH space, the kernel stops abruptly and the system is reset. Below is the part of the code which lead me to the brick wall! I am getting the PCIEIH base addr from dts . if (of_address_to_resource

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Milton Miller
Resend with correct reply threading. On Fri Nov 14 at 06:54:15 EST in 2008, Hollis Blanchard wrote: On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote: Again, why can't we just stick something in the kernel code that reserves the last page ? It could be in prom.c or it could be cal

Re: [PATCH] [v3] powerpc/4xx: work around CHIP11 errata in a more PAGE_SIZE-friendly way

2008-11-14 Thread Milton Miller
In-Reply-To: <[EMAIL PROTECTED]> On Fri Nov 14 at 06:54:15 EST in 2008, Hollis Blanchard wrote: On Thu, 2008-11-13 at 07:44 +1100, Benjamin Herrenschmidt wrote: Again, why can't we just stick something in the kernel code that reserves the last page ? It could be in prom.c or it could be called

Re: Re[2]: [2/2] powerpc: support for 256K pages on PPC 44x

2008-11-14 Thread Milton Miller
On Nov 13, 2008, at 10:32 PM, Yuri Tikhonov wrote: On Tuesday, November 11, 2008 Milton Miller wrote: #ifdef CONFIG_PTE_64BIT typedef unsigned long long pte_basic_t; +#ifdef CONFIG_PPC_256K_PAGES +#define PTE_SHIFT (PAGE_SHIFT - 7) This seems to be missing the comment on how many ptes

Re: [PATCH] mpc832x_rdb: fix swapped ethernet ids

2008-11-14 Thread Michael Barkowski
David Gibson wrote: On Thu, Nov 13, 2008 at 10:18:28AM -0500, Michael Barkowski wrote: ethernet0 (called FSL UEC0 in U-Boot) should be enet1 (UCC3/eth1), and ethernet1 should be enet0 (UCC2/eth0), to be consistent with U-Boot so that the interfaces do not swap addresses when control passes from

Re: [PATCH] powerpc/virtex: fix various format/casting printk mismatches

2008-11-14 Thread Josh Boyer
On Thu, Nov 13, 2008 at 09:53:04PM -0700, Grant Likely wrote: >From: Grant Likely <[EMAIL PROTECTED]> > >Various printk format string in code used by the Xilinx Virtex platform >are not 32-bit/64-bit safe. Add correct casting to fix the bugs. > >Signed-off-by: Grant Likely <[EMAIL PROTECTED]> Thi