On Fri, Nov 23, 2018 at 04:19:49AM +0100, Florian Zumbiehl wrote:
> Hi,
>
> > T: Bus=01 Lev=02 Prnt=03 Port=01 Cnt=01 Dev#= 4 Spd=12 MxCh= 0
> > D: Ver= 1.10 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1
> > P: Vendor=0557 ProdID=2008 Rev=03.00
> > S: Manufacturer=Prolific Technology Inc.
>
On Thu, Nov 22, 2018 at 09:27:46PM +0100, Nikolaj Fogh wrote:
> Improve baud-rate generation by using rounding-to-closest instead of
> truncation in divisor calculation.
>
> Results have been verified by logic analyzer on an FT232RT (232BM) chip.
> The following table shows the wanted baud rate, t
Le 22/11/2018 à 18:15, Oliver Neukum a écrit :
On Do, 2018-11-22 at 12:06 +0100, Frédéric Parrenin wrote:
Le 22/11/2018 à 11:22, Oliver Neukum a écrit :
On Mi, 2018-11-21 at 16:50 +0100, Frédéric Parrenin wrote:
which over rides the Mac on the dock. So, the answer is, "it's not an
i
From: Ofer Heifetz
The mvebu xHCI host driver does not have suspend/resume support. Use of
the XHCI_RESET_ON_RESUME quirk is mandatory in order to avoid failures
after resume. This will work only if no USB device is plugged-in.
While at it, mention in the Kconfig file that this IP is also presen
Hello,
As part of an effort to bring suspend to RAM support to Armada 3700
SoCs (main target: ESPRESSObin), this series handles the work around
the USB3 host IP.
First, a change in the core adds support for the new PHY framework by
following the phy_set_mode()/phy_power_on() sequence (patch 1). T
The USB3 node is wired to the first PHY of the COMPHY IP.
Signed-off-by: Miquel Raynal
---
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
b/arch/arm64/boot/dts/marvell/armada-372
Current implementation of the USB core does not take into account the
new PHY framework. Correct the situation by adding a call to
phy_set_mode() before phy_power_on().
Signed-off-by: Miquel Raynal
---
drivers/usb/core/hcd.c | 5 +
drivers/usb/core/phy.c | 28
d
On 11/23/18 10:21 AM, Johan Hovold wrote:
On Fri, Nov 23, 2018 at 04:19:49AM +0100, Florian Zumbiehl wrote:
Can you tell what the physical chip is labeled as, if anything?
First one is Aten UC-232A:
https://www.aten.com/global/en/products/usb-&-thunderbolt/usb-converters/uc232a/
and another i
Hi Ran,
Ran Wang writes:
>> > Then, DWC3 core driver continued to call function
>> > dwc3_host_init()->platform_device_add(xhci)…
>> > xhci_plat_probe()->usb_add_hcd()->xhci_plat_setup()->xhci_gen_setup->
>> > xhci_reset(), which would reset xHCI controller. At this point, the
>> > VBUS EN pin (
There are two new Realtek card readers require ums-realtek to work
correctly.
Add the new IDs to support them.
Signed-off-by: Kai-Heng Feng
---
drivers/usb/storage/unusual_realtek.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/usb/storage/unusual_realtek.h
b/drivers/
Hi David,
On 22.11.2018 22:17, David Miller wrote:
> From: Igor Russkikh
> Date: Wed, 21 Nov 2018 10:13:48 +
>
>> @@ -832,6 +832,10 @@ static struct sk_buff *aqc111_tx_fixup(struct usbnet
>> *dev, struct sk_buff *skb,
>> /*Length of actual data*/
>> tx_desc |= skb->len & AQ_TX_DES
Hi Sandeep,
> On Nov 22, 2018, at 12:23 PM, Singh, Sandeep wrote:
>
> From: Sandeep Singh
>
> Occasionally AMD SNPS 3.0 xHC does not respond to
> CSS when set, also it does not flag anything on SRE and HCE
> to point the internal xHC errors on USBSTS register. This stalls
> the entire system w
Hi Minas,
On 2018-11-22 07:53, Minas Harutyunyan wrote:
> On 11/21/2018 7:45 PM, Marek Szyprowski wrote:
>> This reverts commit dccf1bad4be7eaa096c1f3697bd37883f9a08ecb.
>>
>> The reverted commit breaks locking in the DWC2 driver. It causes random
>> crashes or memory corruption related issues on
Hi Pawel,
On 18/11/18 12:08, Pawel Laszczak wrote:
> Patch adds PCI specific glue driver that creates and registers in-system
> cdns-usb3 platform device. Thanks to that we will be able to use
> the cdns-usb3 platform driver for USBSS-DEV controller
> build on PCI board
>
> Signed-off-by: Pawel L
On 18/11/18 12:08, Pawel Laszczak wrote:
> Thsi patch aim at documenting USB related dt-bindings for the
s/Thsi/This
> Cadence USBSS-DRD controller.
>
> Signed-off-by: Pawel Laszczak
> ---
> .../devicetree/bindings/usb/cdns3-usb.txt | 17 +
> 1 file changed, 17 insertions
Hi,
On 15/10/18 8:15 PM, Lubomir Rintel wrote:
> Turned from arch/arm/mach-mmp/devices.c into a proper PHY driver, so
> that in can be instantiated from a DT.
>
> Acked-by: Kishon Vijay Abraham I
> Signed-off-by: Lubomir Rintel
I'm unable to apply this patch as the raw format of this patch [1]
On 18/11/18 12:09, Pawel Laszczak wrote:
> Patch adds core.c and core.h file that implements initialization
> of platform driver and adds function responsible for selecting,
> switching and running appropriate Device/Host mode.
>
> Signed-off-by: Pawel Laszczak
> ---
> drivers/usb/cdns3/Makefile
On Fri, 23 Nov 2018 at 07:06, Kai Heng Feng wrote:
>
> Hi Ulf,
>
> > On Nov 8, 2018, at 8:17 PM, Oleksandr Natalenko
> > wrote:
> >
> >> This is based on Ulf's work [1] [2].
> >> This patch series can keep rtsx_usb suspended, to save ~0.5W on Intel
> >> platforms and ~1.5W on AMD platforms.
> >>
The bug is not easily reproducable, as it may occur very infrequently
(we had machines with 20minutes heavy downloading before it occurred)
However, on a virual machine (VMWare on Windows 10 host) it occurred
pretty frequently (1-2 seconds after a speedtest was started)
dev->tx_skb mab be freed vi
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On Fri, 2018-11-23 at 13:51 +0100, Bernd Eckstein wrote:
> This causes the following problems:
> - double free of the skb or potential memory leak
> - in dmesg: 'recvmsg bug' and 'recvmsg bug 2' and eventually
> general protection fault
For what i
On 18/11/18 12:09, Pawel Laszczak wrote:
> Patch adds host-export.h and host.c file and mplements functions that
> allow to initialize, start and stop XHCI host driver.
>
> Signed-off-by: Pawel Laszczak
> ---
> drivers/usb/cdns3/Kconfig | 10 ++
> drivers/usb/cdns3/Makefile | 1 +
>
Hi Kai-heng,
On 11/23/2018 2:59 PM, Kai Heng Feng wrote:
> Hi Sandeep,
>
>> On Nov 22, 2018, at 12:23 PM, Singh, Sandeep wrote:
>>
>> From: Sandeep Singh
>>
>> Occasionally AMD SNPS 3.0 xHC does not respond to
>> CSS when set, also it does not flag anything on SRE and HCE
>> to point the intern
Ugh... We also had a long thread about the v2 patch but it turns out
the list was not CC'd. I should have checked for that.
You have to pass a flag to say if the caller holds the lock or not...
regards,
dan carpenter
On 18/11/18 12:09, Pawel Laszczak wrote:
> Patch adds supports for detecting Host/Device mode.
> Controller has additional OTG register that allow
> implement even whole OTG functionality.
> At this moment patch adds support only for detecting
> the appropriate mode based on strap pins and ID pin.
On Wed, Nov 07, 2018 at 01:34:01AM +0800, Kai-Heng Feng wrote:
> The QCA Rome USB Bluetooth controller has several issues once LPM gets
> enabled:
> - Fails to get enumerated in coldboot. [1]
> - Drains more power (~ 0.2W) when the system is in S5. [2]
> - Disappears after a warmboot. [2]
>
> The
On Wed, Oct 31, 2018 at 01:52:09PM +0800, Kai-Heng Feng wrote:
> USB Bluetooth controller QCA ROME (0cf3:e007) sometimes stops working
> after S3:
> [ 165.110742] Bluetooth: hci0: using NVM file: qca/nvm_usb_0302.bin
> [ 168.432065] Bluetooth: hci0: Failed to send body at 4 of 1953 (-110)
>
>
On Wed, Nov 21, 2018 at 06:33:51PM +0100, Julia Lawall wrote:
> From: kbuild test robot
>
> drivers/usb/misc/ft232h-intf.c:816:27-32: WARNING: conversion to bool not
> needed here
>
> Remove unneeded conversion to bool
>
> Semantic patch information:
> Relational and logical operators evalua
On Fri, 23 Nov 2018 16:10:54 +0100
Greg KH gre...@linuxfoundation.org wrote:
...
>> Fixes: 0772a5bf580c ("usb: misc: add driver for FT232H based FPGA
>> configuration devices")
>
>I can't find this commit anywhere, nor the file that this patch touches.
>
>What tree is it in?
This new driver was
From: Sandeep Singh
Occasionally AMD SNPS 3.0 xHC does not respond to
CSS when set, also it does not flag anything on SRE and HCE
to point the internal xHC errors on USBSTS register. This stalls
the entire system wide suspend and there is no point in stalling
just because of xHC CSS is not respon
* Kishon Vijay Abraham I [181123 07:59]:
> On 17/11/18 7:07 PM, Tony Lindgren wrote:
> > + /* Allow aggressive PM for USB, it's only needed for n_gsm port */
> > + if (phy_pm_runtime_enabled(ddata->generic_phy))
> > + phy_pm_runtime_put(ddata->generic_phy);
>
> phy_*() API's are gen
All Documentation files outside the uAPI are all licensed with,
at least, GPL 2.0. So, mark them as such.
The ondes at media/uapi are at least GFDL 1.1+.
Signed-off-by: Mauro Carvalho Chehab
---
Documentation/media/.gitignore| 2 ++
Documentation/media/Makefile
Right now, almost every file under Documentation/media don't contain any
licensing text. That's bad, specially uAPI documents are licensed under
GFDL[1].
[1] This is due to historical reasons: by the time they were written, it was
believed that the best license for documents would be GFDL.
Also
On Fri, 23 Nov 2018, Kai-Heng Feng wrote:
> There are two new Realtek card readers require ums-realtek to work
> correctly.
>
> Add the new IDs to support them.
>
> Signed-off-by: Kai-Heng Feng
> ---
> drivers/usb/storage/unusual_realtek.h | 10 ++
> 1 file changed, 10 insertions(+)
>
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