On Jan 05 2017 or thereabouts, Grant Grundler wrote:
> Local "#define DRIVER_LICENSE" obfuscates which license is used
> in MODULE_LICENSE(). "fgrep -R MODULE_LICENSE" is more informative
> when the string is hard coded in MODULE_LICENSE.
>
> Signed-off-by: Grant Grundler
> ---
> Most of the ker
Hi guys,
On Thu, Jan 05, 2017 at 05:54:02PM +0200, Mika Westerberg wrote:
> > +static ssize_t
> > +typec_altmode_roles_show(struct device *dev, struct device_attribute *attr,
> > +char *buf)
> > +{
> > + struct typec_mode *mode = container_of(attr, struct typec_mode,
> > +
On Friday, January 6, 2017 12:29:12 PM CET Raviteja Garimella wrote:
> Hi Arnd,
>
> On Fri, Jan 6, 2017 at 3:33 AM, Arnd Bergmann wrote:
> > On Thursday, January 5, 2017 1:53:16 PM CET Raviteja Garimella wrote:
> >> The UDC is based on Synopsys Designware core USB (2.0) Device controller
> >> IP.
Commit 05ee799f2021 ("usb: dwc2: Move gadget settings into core_params")
changes to type u16 for DT binding "g-rx-fifo-size" and
"g-np-tx-fifo-size" but use type u32 for "g-tx-fifo-size". Finally the
the first two parameters cannot be passed successfully with wrong data
format. This is found the da
On Thu, 5 Jan 2017, Grant Grundler wrote:
> Local "#define DRIVER_LICENSE" obfuscates which license is used
> in MODULE_LICENSE(). "fgrep -R MODULE_LICENSE" is more informative
> when the string is hard coded in MODULE_LICENSE.
Applied to hid.git#for-4.11/upstream. Thanks,
--
Jiri Kosina
SUSE
On Tue, Jan 03, 2017 at 11:25:33PM +0800, Icenowy Zheng wrote:
> V3s SoC features a USB PHY controller and a MUSB OTG controller.
>
> Add device nodes for them.
>
> Signed-off-by: Icenowy Zheng
This can be merged in your other DTSI patch.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linu
On Tue, Jan 03, 2017 at 11:25:32PM +0800, Icenowy Zheng wrote:
> Allwinner H3/V3s features a variant of MUSB controller, which lacks one
> endpoint.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Maxime Ripard
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linu
On Tue, Jan 03, 2017 at 11:25:31PM +0800, Icenowy Zheng wrote:
> Allwinner V3s come with a USB PHY controller slightly different to other
> SoCs, with only one PHY.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Maxime Ripard
Thanks,
Maxime
--
Maxime Ripard, Free Electro
On Thu, Jan 05, 2017 at 02:01:51PM +0800, Peter Chen wrote:
> Hi all,
>
> This is a follow-up for my last power sequence framework patch set [1].
> According to Rob Herring and Ulf Hansson's comments[2]. The kinds of
> power sequence instances will be added at postcore_initcall, the match
> criter
On Tue, 3 Jan 2017 18:18:02 +0100, Vincent Pelletier
wrote:
> Sadly, this fix alone is not enough to get a functional device. I did
> not investigate much yet, and need to get some sleep.
I investigated more.
The next issue is that often (>9 times out of 10) the dwc3 fails to
respond to the SET_
On Fri, Jan 06, 2017 at 12:54:05PM +0200, Heikki Krogerus wrote:
> Hi guys,
>
> On Thu, Jan 05, 2017 at 05:54:02PM +0200, Mika Westerberg wrote:
> > > +static ssize_t
> > > +typec_altmode_roles_show(struct device *dev, struct device_attribute
> > > *attr,
> > > + char *buf)
> > >
On Fri, Jan 06, 2017 at 05:18:41PM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jan 05, 2017 at 02:01:51PM +0800, Peter Chen wrote:
> > Hi all,
> >
> > This is a follow-up for my last power sequence framework patch set [1].
> > According to Rob Herring and Ulf Hansson's comments[2]. The kinds of
>
DTR and RTS will be asserted by the tty-layer when the port is opened
and deasserted on close (if HUPCL is set). Make sure the initial state
is not-asserted before the port is first opened as well.
Fixes: 664d5df92e88 ("USB: usb-serial ch341: support for DTR/RTS/CTS")
Cc: stable
Signed-off-by: Jo
This series fixes a number of problems with the ch341 driver, and adds
support for a class of CH340 devices which does not seem to support changing
the intial line settings (and does not support using the init vendor command to
do so either).
I noticed that using the init command to update the lin
Clean up the control-transfer debug messages by dropping redundant
information and unnecessary casts.
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
in
Make sure to stop the interrupt URB before returning on errors during
open.
Fixes: 664d5df92e88 ("USB: usb-serial ch341: support for DTR/RTS/CTS")
Cc: stable
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --g
A short control transfer would currently fail to be detected, something
which could lead to stale buffer data being used as valid input.
Check for short transfers, and make sure to log any transfer errors.
Fixes: 6ce76104781a ("USB: Driver for CH341 USB-serial adaptor")
Signed-off-by: Johan Hovol
Some CH340 devices appear unable to change the initial LCR settings, so
set a sane 8N1 default during probe to enable basic support for such
devices.
Also drop a redundant LCR read during device initialisation.
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 14 +-
1 fi
A recent change added support for modifying the default line-control
settings, but did not make sure that the modified settings were used as
part of reconfiguration after a device has been reset during resume.
This caused a port that was open before suspend to be unusable until
being closed and re
Revert to using direct register writes to set the divisor and
line-control registers.
A recent change switched to using the init vendor command to update
these registers, something which also enabled support for CH341A
devices. It turns out that simply setting bit 7 in the divisor register
is suff
The modem-status register was read as part of device configuration at
port_probe and then again at open (and reset-resume). During open (and
reset-resume) the MSR was read before submitting the interrupt URB,
something which could lead to an MSR-change going unnoticed when it
races with open (reset
Rename the line-control-register variable in set_termios to "lcr" and
use u8 type to match the shadow register.
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/d
Rename the shadow modem-control register currently named "line_control"
to the less confusing "mcr".
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/serial/ch341.c b/drivers/
Fix reset-resume handling which failed to resubmit the read and
interrupt URBs, thereby leaving a port that was open before suspend in a
broken state until closed and reopened.
Fixes: 1ded7ea47b88 ("USB: ch341 serial: fix port number changed after
resume")
Fixes: 2bfd1c96a9fb ("USB: serial: ch341:
The modem-control signals are managed by the tty-layer during open and
should not be asserted prematurely when set_termios is called from
driver open.
Also make sure that the signals are asserted only when changing speed
from B0.
Fixes: 664d5df92e88 ("USB: usb-serial ch341: support for DTR/RTS/CT
The private baud_rate variable is used to configure the port at open and
reset-resume and must never be set to (and left at) zero or reset-resume
and all further open attempts will fail.
Fixes: aa91def41a7b ("USB: ch341: set tty baud speed according to tty
struct")
Fixes: 664d5df92e88 ("USB: usb-s
Rename the shadow modem-status register currently named "line_status" to
the less confusing "msr".
Also rename the helper function used to parse the interrupt data.
Signed-off-by: Johan Hovold
---
drivers/usb/serial/ch341.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
The dsps glue uses PLATFORM_DEVID_AUTO when creating the musb-hdrc
platform devices, this causes that the id will change in each system
depending on the order of driver probe, the order of the usb instances
defined in device-tree, or the list of enabled devices which use also
PLATFORM_DEVID_AUTO in
On 12/02/2016 06:19 PM, Brian Norris wrote:
> Hi all,
>
> On Thu, Nov 17, 2016 at 05:13:43PM +0530, Sriram Dash wrote:
>> From: Arnd Bergmann
>>
>> For xhci-hcd platform device, all the DMA parameters are not
>> configured properly, notably dma ops for dwc3 devices.
>>
>> The idea here is that
On Fri, Jan 06, 2017 at 01:29:49PM -0600, Bin Liu wrote:
> The dsps glue uses PLATFORM_DEVID_AUTO when creating the musb-hdrc
> platform devices, this causes that the id will change in each system
> depending on the order of driver probe, the order of the usb instances
> defined in device-tree, or
On Wed, Jan 4, 2017 at 6:03 PM, Alexandre Bailon wrote:
> Sometime, a transfer may not be queued due to a race between runtime pm
> and cppi41_dma_issue_pending().
> Sometime, cppi41_runtime_resume() may be interrupted right before to
> update device PM state to RESUMED.
> When it happens, if a ne
On Thu, Jan 5, 2017 at 6:50 PM, Leo Yan wrote:
> When use configfs to configure USB port as as ethernet gadget, the
> kernel has panic with below backtrace; it clearly indicates the
> coherent memory allocation is happened in the interrupt context,
> but the function __get_vm_area_node() is possib
On Fri, Jan 6, 2017 at 4:45 AM, Leo Yan wrote:
> Commit 05ee799f2021 ("usb: dwc2: Move gadget settings into core_params")
> changes to type u16 for DT binding "g-rx-fifo-size" and
> "g-np-tx-fifo-size" but use type u32 for "g-tx-fifo-size". Finally the
> the first two parameters cannot be passed s
On Thu, Jan 5, 2017 at 6:01 PM, John Youn wrote:
> From: Vardan Mikayelyan
>
> Remove DMA memory free from EP disable flow by replacing
> dma_alloc_coherent with dmam_alloc_coherent.
>
> Cc: John Stultz
> Signed-off-by: Vardan Mikayelyan
> Signed-off-by: John Youn
> ---
>
> Hi John,
>
> Can yo
Add all the necessary platform code to initialize the dwc3
USB host controller found on OCTEON III processors. This
code initializes the clocks and resets the USB core with
PHYs. It is then passed off to the platform independent
DWC3 driver found in the 'drivers/usb/dwc3' directory.
Based off code
Hi,
On Fri, Jan 06, 2017 at 05:42:24PM -0600, Steven J. Hill wrote:
> Add all the necessary platform code to initialize the dwc3
> USB host controller found on OCTEON III processors. This
> code initializes the clocks and resets the USB core with
> PHYs. It is then passed off to the platform indep
add debugfs support for experimenting with USB timing delay
values on the fly. Values are read/written from debugfs at
/sys/kernel/debug/usb/timing.
Signed-off-by: Todd Brandt
---
v2:
- moved the debug code from hub.c to usb.c
- use debugfs instead of /sys/kernel/usb
v5:
- allow setting tdrstr
Add a kernel parameter that replaces the USB_RESUME_TIMEOUT
and other hardcoded delay numbers with the USB spec minimums.
The USB subsystem currently uses some padded values for USB spec timing
delays. This patch keeps the current values by default, but if the kernel
is booted with usbcore.timing_
The USB resume code in the kernel currently uses a set of hard coded
delay values that are defined in the USB 2.0 spec. These are the
most important ones:
- tdrsmdn: resume signal time (20ms - infinity) usb 2.0 spec 7.1.7.7
- trsmrcy: resume recovery time (10ms) usb 2.0 spec 7.1.7.7
- trstrcy:
Dear reader,
I'm using a Seagate Dockstar with Debian jessie kernel 3.16 and an
usb-to-pata bridge from prolific,
usb device id 067b:3507.
On every boot, the kernel is saying
»[5.058082] usb 1-1.4: new high-speed USB device number 3 using
orion-ehci
[5.291227] usb 1-1.4: New USB devic
On 1/6/2017 3:10 PM, John Stultz wrote:
> On Thu, Jan 5, 2017 at 6:01 PM, John Youn wrote:
>> From: Vardan Mikayelyan
>>
>> Remove DMA memory free from EP disable flow by replacing
>> dma_alloc_coherent with dmam_alloc_coherent.
>>
>> Cc: John Stultz
>> Signed-off-by: Vardan Mikayelyan
>> Signe
From: Leo Yan
Commit 05ee799f2021 ("usb: dwc2: Move gadget settings into core_params")
changes to type u16 for DT binding "g-rx-fifo-size" and
"g-np-tx-fifo-size" but use type u32 for "g-tx-fifo-size". Finally the
the first two parameters cannot be passed successfully with wrong data
format. This
On 1/6/2017 1:52 PM, John Stultz wrote:
> On Fri, Jan 6, 2017 at 4:45 AM, Leo Yan wrote:
>> Commit 05ee799f2021 ("usb: dwc2: Move gadget settings into core_params")
>> changes to type u16 for DT binding "g-rx-fifo-size" and
>> "g-np-tx-fifo-size" but use type u32 for "g-tx-fifo-size". Finally the
On Fri, 6 Jan 2017 15:21:17 +, Vincent Pelletier
wrote:
> The next issue is that often (>9 times out of 10) the dwc3 fails to
> respond to the SET_CONFIGURATION standard request. As a result, only
> EP0 works.
I captured a successful enumeration, there are also corrupted pids:
002:03.271'422
44 matches
Mail list logo
