Hi Felipe,
On Tue, Sep 2, 2014 at 8:04 PM, Felipe Balbi wrote:
> Hi,
>
> On Tue, Sep 02, 2014 at 04:42:18PM +0530, Vivek Gautam wrote:
>> Adding phy calibrate callback, which facilitates setting certain
>> PHY settings post initialization of the PHY controller.
>> Exynos5420 and Exynos5800 have
This patch adds support of the PHY framework for ChipIdea drivers.
Changes are done in both the ChipIdea common code and in the drivers
accessing the PHY. This is done by adding a new PHY member in
ChipIdea's structures and by taking care of it in the code.
Signed-off-by: Antoine Tenart
---
driv
This patch modify the generic code handling PHYs to allow them to be
supplied from the drivers. This adds checks to ensure no PHY was already
there when looking for one in the generic code. This also makes sure we
do not modify its state in the generic HCD functions, it was provided by
the driver.
This patch prepares the introduction of the generic PHY support in the
USB ChipIdea common functions. The USB PHY member of the ChipIdea
structure ('transceiver') is renamed to 'usb_phy', the 'phy' member of
the ChipIdea pdata structure is renamed to 'usb_phy' and modifications
are done in all driv
Move the usb_otg member from struct usb_phy to struct ci_hdrc. Rework
its initialization taking in account this modification.
Signed-off-by: Antoine Tenart
---
drivers/usb/chipidea/ci.h | 1 +
drivers/usb/chipidea/host.c| 5 +++--
drivers/usb/chipidea/otg_fsm.c | 16 +++-
From: Sebastian Hesselbarth
Enable usb1 on Google Chromecast which is connected to micro-USB
plug used for external power supply, too.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2cd-google-chromecast.dts | 4
1 file changed, 4 insertion
This patch prepares the introduction of the generic PHY support in the
USB OTG common functions. The USB PHY member of the OTG structure is
renamed to 'usb_phy' and modifications are done in all drivers accessing
it. Renaming this pointer will allow to keep the compatibility for USB
PHY drivers.
S
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Tenart
Acked-by: Alan Stern
---
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/core/hcd.c| 20 ++--
drivers/usb/core/hub.c
Before using the PHY framework instead of the USB PHY one, we need to
move the OTG state into another place, since it won't be available when
USB PHY isn't used. This patch moves the OTG state into the OTG
structure, and makes all the needed modifications in the drivers
using the OTG state.
Signed
Hi all,
This is an attempt to add more common USB code aware of the generic PHY
framework, while keeping the compatibility for the USB PHY one. It does
not add the full support, some USB PHY specific functions not being
available currently in the generic PHY subsystem (e.g. usb_phy_set_power()).
B
The patch adding support to the generic PHY framework introduced a
'gen_phy' member in the HCD structure. Rename it to 'phy' to have a
consistent USB framework.
Signed-off-by: Antoine Tenart
Acked-by: Alan Stern
---
drivers/usb/core/hcd.c | 22 +++---
include/linux/usb/hcd.h |
This patch adds support of the PHY framework in OTG and keeps the USB
PHY compatibility. Here the only modification is to add PHY member in
the OTG structure, along with the USB PHY one.
Signed-off-by: Antoine Tenart
---
include/linux/usb/otg.h | 3 +++
1 file changed, 3 insertions(+)
diff --gi
The chip controller node now also describes the Marvell Berlin reset
controller. Add the required 'reset-cells' property.
Signed-off-by: Antoine Tenart
Acked-by: Philipp Zabel
---
arch/arm/boot/dts/berlin2.dtsi | 1 +
arch/arm/boot/dts/berlin2cd.dtsi | 1 +
arch/arm/boot/dts/berlin2q.dtsi |
Enable the 2 available USB PHY and USB nodes on the Marvell Berlin BG2Q
DMP.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2q-marvell-dmp.dts | 53 ++
1 file changed, 53 insertions(+)
diff --git a/arch/arm/boot/dts/berlin2q-marvell-dmp.dts
b/arch/arm/boo
Add a USB2 ChipIdea driver for ci13xxx, with optional PHY, clock
and DMA mask, to support USB2 ChipIdea controllers that don't need
specific functions.
Tested on the Marvell Berlin SoCs USB controllers.
Signed-off-by: Antoine Tenart
---
drivers/usb/chipidea/Makefile | 1 +
drivers/usb/c
Adds nodes describing the Marvell Berlin BG2Q USB PHY and USB. The BG2Q
SoC has 3 USB host controller, compatible with ChipIdea.
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2q.dtsi | 52 +
1 file changed, 52 insertions(+)
diff --git a/arch/a
Add the reset binding documentation to the SoC binding documentation as
the reset driver in Marvell Berlin SoC is part of the chip/system
control registers. This patch adds the required properties to configure
the reset controller.
Signed-off-by: Antoine Tenart
Acked-by: Philipp Zabel
---
Docum
Document the USB2 ChipIdea driver (ci13xxx) bindings.
Signed-off-by: Antoine Tenart
---
.../devicetree/bindings/usb/ci-hdrc-usb2.txt | 22 ++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
diff --git a/Docume
Add a reset controller for Marvell Berlin SoCs which is used by the
USB PHYs drivers (for now).
Signed-off-by: Antoine Tenart
Signed-off-by: Sebastian Hesselbarth
Acked-by: Philipp Zabel
---
drivers/reset/Makefile | 1 +
drivers/reset/reset-berlin.c | 131 ++
This series adds the support for ChipIdea USB2 (ci13xxx) controllers,
the USB PHYs of the Marvell Berlin SoCs and also adds a reset
controller for these SoCs.
The reset controller is used by the PHY driver and shares the
existing chip controller node with the clocks and one pin controller.
The Ma
The Marvell Berlin SoCs now has a reset controller. Add the needed
configuration.
Signed-off-by: Antoine Tenart
---
arch/arm/mach-berlin/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index 24f85be71671..5803f773a065 1006
Add the driver driving the Marvell Berlin USB PHY. This allows to
initialize the PHY and to use it from the USB driver later.
Signed-off-by: Antoine Tenart
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-berlin-usb.c | 224
Document the bindings of the Marvell Berlin USB PHY driver.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/phy/berlin-usb-phy.txt | 16
1 file changed, 16 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/berlin-usb-phy.txt
diff --git
From: Sebastian Hesselbarth
Adds nodes describing the Marvell Berlin BG2CD USB PHY and USB. The BG2CD
SoC has 2 USB ChipIdea controllers, with usb0 host-only and usb1 dual-role
capable.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Antoine Tenart
---
arch/arm/boot/dts/berlin2cd.dtsi | 3
Hayes Wang writes:
> + ether_addr_copy(dev->perm_addr, dev->dev_addr);
This isn't strictly necessary. register_netdev() will do it for you as
long as you leave the default addr_assign_type (NET_ADDR_PERM). And you
do.
Bjørn
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On Tue, 2014-09-02 at 11:39 -0400, Alan Stern wrote:
> The way resets are carried out is also changed. Now the driver will
> call usb_queue_reset_device() instead of calling usb_reset_device()
> directly. This avoids a deadlock that would arise when a device is
> unplugged: The hid_reset() routin
Again, please do not top post.
https://en.wikipedia.org/wiki/Posting_style#Top-posting
On Tue, Sep 02, 2014 at 03:43:52PM -0500, Sergio De León wrote:
> Hi Johan
>
> Here are the debug logs you asked me
>
> * dmesg output while connecting the device without dynamic debug
> * dmesg outpu
Hi,
This is regarding an issue we are facing with the gadget serial driver
(driver/usb/gadget/serial.c).
We have a hardware limitation and the USB hardware can only have
bconfigurationvalue 0 or 1.
In the CDC ACM config in gadget serial driver the configuration value
is set to 2. Is there a speci
On Tue, 2014-09-02 at 11:39 -0400, Alan Stern wrote:
> This patch changes the way usbhid carries out Clear-Halt and reset.
>
> Currently, after a Clear-Halt on the interrupt-IN endpoint, the driver
> immediately restarts the interrupt URB, even if the Clear-Halt failed.
> This doesn't work out wel
On Tue, 2014-09-02 at 11:39 -0400, Alan Stern wrote:
> This patch changes the way usbhid carries out Clear-Halt and reset.
>
> Currently, after a Clear-Halt on the interrupt-IN endpoint, the driver
> immediately restarts the interrupt URB, even if the Clear-Halt failed.
> This doesn't work out wel
I've probably got this wrong...
I try to run several cameras with compressed streams (MJPEG) using maxpacket
3*1024 isoc-endpoints.
EHCI should be able to transmit 8 microframes * 1024 bytes * 3 packets of data
per frame (approx 24MB/sec).
Two cameras work fine, but when I connect a third camera
It does not matter if I reduce resolution to 640x480x1 fps.
I still can only use two cameras. maxpacket requirement for those streams drop
a bit, but it doesn't help.
Kernel is 3.6.4, powerpc 8347 machine.--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a mes
Hi!
In short: How should a udc driver handle a situation when the host sends
more data than req.length in the receiving OUT request? What
should be reported to the gadget driver? What should be done with the
excess data?
Currently the gr_udc driver does not accept OUT requests if req.length
i
On Tue, Sep 2, 2014 at 6:23 PM, Johan Hovold wrote:
> On Tue, Sep 02, 2014 at 11:45:55AM +0300, Octavian Purdila wrote:
>> On Tue, Sep 2, 2014 at 11:00 AM, Lee Jones wrote:
>> > On Mon, 01 Sep 2014, Johan Hovold wrote:
>
>> >> I haven't looked at the details of the protocol for the device in
>> >
Hi Greg,
Here's a new set of fixes. Pretty minor stuff. I tested with platforms
which I have access to.
Cheers
The following changes since commit 69e273c0b0a3c337a521d083374c918dc52c666f:
Linux 3.17-rc3 (2014-08-31 18:23:04 -0700)
are available in the git repository at:
git://git.kernel.o
Hi,
On Wed, Sep 03, 2014 at 12:59:27PM +0530, Vivek Gautam wrote:
> > On Tue, Sep 02, 2014 at 04:42:18PM +0530, Vivek Gautam wrote:
> >> Adding phy calibrate callback, which facilitates setting certain
> >> PHY settings post initialization of the PHY controller.
> >> Exynos5420 and Exynos5800 have
On Wed, Sep 03, 2014 at 09:32:14AM +0530, Vivek Gautam wrote:
> On Tue, Sep 2, 2014 at 8:07 PM, Felipe Balbi wrote:
> > On Mon, Sep 01, 2014 at 01:30:21PM +0530, Vivek Gautam wrote:
> >> On Thu, Aug 28, 2014 at 8:36 PM, Daniele Forsi wrote:
> >> > 2014-08-28 10:02 GMT+02:00 Vivek Gautam:
> >> >
>
On Wed, Sep 03, 2014 at 02:48:43PM +0530, Anjana V Kumar wrote:
> Hi,
>
> This is regarding an issue we are facing with the gadget serial driver
> (driver/usb/gadget/serial.c).
>
> We have a hardware limitation and the USB hardware can only have
> bconfigurationvalue 0 or 1.
what kind of limitat
Intensive tests with USB audio devices connected to a musb host port
have shown reproducible pops and clicks in both the playback and the
capture stream.
These are related to how the early_tx hrtimer is set up, and it turns
out they can be fixed by reducing the timer's slack value from 40 to
25 us
On 09/03/2014 03:43 AM, Johan Hovold wrote:
Again, please do not top post.
https://en.wikipedia.org/wiki/Posting_style#Top-posting
On Tue, Sep 02, 2014 at 03:43:52PM -0500, Sergio De León wrote:
Hi Johan
Here are the debug logs you asked me
* dmesg output while connecting the device
On Wed, Sep 03, 2014 at 04:39:48PM +0300, Octavian Purdila wrote:
> On Tue, Sep 2, 2014 at 6:23 PM, Johan Hovold wrote:
> > That should be possible using the regmap bus read and write operations.
>
> I took a closer look on the regmap bus read/write operations and I
> think they are not fit for
Need include it for irq_of_parse_and_map(), the related error with
allmodconfig under microblaze:
drivers/usb/host/ehci-xilinx-of.c: In function ‘ehci_hcd_xilinx_of_probe’:
drivers/usb/host/ehci-xilinx-of.c:156:2: error: implicit declaration of
function ‘irq_of_parse_and_map’ [-Werror=implici
On Wed, 3 Sep 2014, Oliver Neukum wrote:
> What happens if we lose events? Especially with keyboards
> I see a problem with dropping a release event because this
> will trigger autorepeat. So should we generate a release
> event for all pressed keys on reset?
That's a separate issue, not directly
On Wed, 3 Sep 2014, Andreas Larsson wrote:
> Hi!
>
> In short: How should a udc driver handle a situation when the host sends
> more data than req.length in the receiving OUT request? What
> should be reported to the gadget driver? What should be done with the
> excess data?
It depends. If req
On Wed, 3 Sep 2014, Christian Melki wrote:
> I've probably got this wrong...
>
> I try to run several cameras with compressed streams (MJPEG) using maxpacket
> 3*1024 isoc-endpoints.
> EHCI should be able to transmit 8 microframes * 1024 bytes * 3 packets of
> data per frame (approx 24MB/sec).
On 09/02/2014 03:34 PM, Andrew Bresticker wrote:
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
The series,
Reviewed-by: Stephen Warren
I'd like Thierry to review at least the XUSB p
On 09/02/2014 03:34 PM, Andrew Bresticker wrote:
Add support for the on-chip xHCI host controller present on Tegra SoCs.
The driver is currently very basic: it loads the controller with its
firmware, starts the controller, and is able to service messages sent
by the controller's firmware. The h
On Wed, 3 Sep 2014, Peter Chen wrote:
> > PS: I also have an old patch that adds a reset callback to
> > g-mass-storage. Peter asked for this around the same time the other
> > work was done. The idea was that disconnect must flush the buffers to
> > the backing storage device, whereas a reset c
On Wed, 3 Sep 2014, Peter Chen wrote:
> > Okay. Let's start by adding the reset field to struct
> > usb_gadget_driver. The initial implementation in the four gadget
> > drivers can be very simple: It calls the disconnect handler. (At some
> > later time we can add a ->reset callback to struct
>
On Wed, 3 Sep 2014, Peter Chen wrote:
> On Fri, Aug 22, 2014 at 02:31:18PM +0530, Pratyush Anand wrote:
> > On Tue, Aug 19, 2014 at 09:51:51AM +0800, Peter Chen wrote:
> > > Changes for v3:
> > > - Add possible role switch for unsupported HNP capable OTG B-peripheral,
> > > see USB OTG & EH 2.0 sp
On Wed, Sep 03, 2014 at 09:27:30AM -0500, Felipe Balbi wrote:
> Hi Greg,
>
> Here's a new set of fixes. Pretty minor stuff. I tested with platforms
> which I have access to.
>
> Cheers
>
> The following changes since commit 69e273c0b0a3c337a521d083374c918dc52c666f:
>
> Linux 3.17-rc3 (2014-08
> From: Alan Stern
>
> On Fri, 29 Aug 2014, Matthew Dharm wrote:
> > Is there an 'easy' way to override the detected size of a storage
> > device from userspace? If we had that, someone could write a helper
> > application which looked for this particular fubar and try to Do The
> > Right Thing(
On Wed, 3 Sep 2014, Dale R. Worley wrote:
> > From: Alan Stern
> >
> > On Fri, 29 Aug 2014, Matthew Dharm wrote:
> > > Is there an 'easy' way to override the detected size of a storage
> > > device from userspace? If we had that, someone could write a helper
> > > application which looked for t
On Sat, 30 Aug 2014, Matthew Dharm wrote
> I was thinking of something that could notice a USB device which is formatted
> NTFS and has a partition table and filesystem that indicates a much bigger
> capacity than what the drive reports. Under this circumstances, you could do
> something like po
Hi,
I've been tracking down two issues and one of them seems to be a problem
with either usbcore or xhci.
DWC3, when acting as host, instantiates an xhci platform-device and sets
itself as the parent of that. That's all fine and dandy until I try to
modprobe -r dwc3.ko which causes XHCI to hang:
> From: Alan Stern
> Anyway, I can try writing a patch to add this capability. We'll see if
> it can solve your problem.
Unfortunately, I think there is genuine value in such a hack. E.g.,
I've got two USB-to-SATA adapters. One works correctly. One does
not. But at this point, I can't atta
Mathias,
On Tue, Aug 19, 2014 at 10:01 AM, Andrew Bresticker
wrote:
> It was suggested in the review of the Tegra xHCI driver [1] that we
> allow xHCI drivers to be built as individual modules (like EHCI) instead
> of building them all into the single xhci-hcd module as they are today.
>
> Patche
On Wed, 2014-09-03 at 15:05 -0400, Alan Stern wrote:
> On Wed, 3 Sep 2014, Dale R. Worley wrote:
>
> > > From: Alan Stern
> > >
> > > On Fri, 29 Aug 2014, Matthew Dharm wrote:
> > > > Is there an 'easy' way to override the detected size of a storage
> > > > device from userspace? If we had that
Hi,
On Mon, Sep 01, 2014 at 06:36:50PM +0530, Stefan Agner wrote:
> I think I still miss a Signed-Off-By Felipe Balbi here...
>
> All the rest should make it into 3.18, but USB without PHY is no fun to
> use ;-)
this is already in my testing/next
https://git.kernel.org/cgit/linux/kernel/git/bal
Hi,
On Tue, Sep 02, 2014 at 06:08:47PM +0100, Peter Griffin wrote:
> +static int st_dwc3_remove(struct platform_device *pdev)
> +{
> + struct st_dwc3 *dwc3_data = platform_get_drvdata(pdev);
> +
> + device_for_each_child(&pdev->dev, NULL, st_dwc3_remove_child);
you might want to use of_pl
On Wed, 3 Sep 2014, James Bottomley wrote:
> Before we embark on elaborate hacks, why don't we just make the capacity
> writeable (by root) in sysfs from userspace (will require block change)?
> We can then encode all the nasty heuristics (including gpt reading) in
> userspace as a udev rule.
Tha
On Wed, 3 Sep 2014, Felipe Balbi wrote:
> Hi,
>
> I've been tracking down two issues and one of them seems to be a problem
> with either usbcore or xhci.
>
> DWC3, when acting as host, instantiates an xhci platform-device and sets
> itself as the parent of that. That's all fine and dandy until I
Hi,
On Wed, Sep 03, 2014 at 04:41:34PM -0400, Alan Stern wrote:
> On Wed, 3 Sep 2014, Felipe Balbi wrote:
>
> > Hi,
> >
> > I've been tracking down two issues and one of them seems to be a problem
> > with either usbcore or xhci.
> >
> > DWC3, when acting as host, instantiates an xhci platform-
On 09/03/2014 09:48 AM, Antoine Tenart wrote:
> Add a reset controller for Marvell Berlin SoCs which is used by the
> USB PHYs drivers (for now).
>
> Signed-off-by: Antoine Tenart
> Signed-off-by: Sebastian Hesselbarth
> Acked-by: Philipp Zabel
> ---
> drivers/reset/Makefile | 1 +
> d
HI,
On Wed, Sep 03, 2014 at 03:47:16PM -0500, Felipe Balbi wrote:
> Hi,
>
> On Wed, Sep 03, 2014 at 04:41:34PM -0400, Alan Stern wrote:
> > On Wed, 3 Sep 2014, Felipe Balbi wrote:
> >
> > > Hi,
> > >
> > > I've been tracking down two issues and one of them seems to be a problem
> > > with eithe
On Tue, 2 Sep 2014, Alan Stern wrote:
> This patch changes the way usbhid carries out Clear-Halt and reset.
>
> Currently, after a Clear-Halt on the interrupt-IN endpoint, the driver
> immediately restarts the interrupt URB, even if the Clear-Halt failed.
> This doesn't work out well when the rea
Currently, we disable pm_runtime before all register
accesses are done, this is dangerous and might lead
to abort exceptions due to the driver trying to access
a register which is clocked by a clock which was long
gated.
Fix that by moving pm_runtime_put_sync() and pm_runtime_disable()
as the last
We can't suspend the PHYs before dwc3_core_exit_mode()
has been called, that's because the host and/or device
sides might still need to communicate with the far end
link partner.
Fixes: 8ba007a (usb: dwc3: core: enable the USB2 and USB3 phy in probe)
Cc: # v3.9+
Suggested-by: Alan Stern
Signed-o
On Wed, 3 Sep 2014, Alan Stern wrote:
> > What happens if we lose events? Especially with keyboards
> > I see a problem with dropping a release event because this
> > will trigger autorepeat. So should we generate a release
> > event for all pressed keys on reset?
>
> That's a separate issue, not
Hello.
On 09/03/2014 11:40 AM, Antoine Tenart wrote:
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Tenart
Acked-by: Alan Stern
I'm going to steal this patch and post it along with the HCD
we don't to gate clocks until our children are
done with their remove path.
Fixes: af310e9 (usb: dwc3: omap: use runtime API's to enable clocks)
Cc: # v3.9+
Signed-off-by: Felipe Balbi
---
drivers/usb/dwc3/dwc3-omap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/u
On Wed, Sep 03, 2014 at 04:41:03PM -0500, Felipe Balbi wrote:
> We can't suspend the PHYs before dwc3_core_exit_mode()
> has been called, that's because the host and/or device
> sides might still need to communicate with the far end
> link partner.
>
> Fixes: 8ba007a (usb: dwc3: core: enable the U
Hello.
On 09/03/2014 11:40 AM, Antoine Tenart wrote:
The USB PHY member of the HCD structure is renamed to 'usb_phy' and
modifications are done in all drivers accessing it.
Signed-off-by: Antoine Tenart
Acked-by: Alan Stern
---
drivers/usb/chipidea/host.c | 2 +-
drivers/usb/core/hcd
On Wed, 2014-09-03 at 16:30 -0400, Alan Stern wrote:
> On Wed, 3 Sep 2014, James Bottomley wrote:
>
> > Before we embark on elaborate hacks, why don't we just make the capacity
> > writeable (by root) in sysfs from userspace (will require block change)?
> > We can then encode all the nasty heurist
On Thu, Sep 04, 2014 at 01:31:17AM +0200, Piotr Król wrote:
> Fixes: 588b48caf65c ("usbip: move usbip userspace code out of staging")
> which introduced build failure by not changing uapi/usbip.h include path
> according to new location.
>
> Signed-off-by: Piotr Król
> ---
> tools/usb/usbip/libs
On Thu, Sep 04, 2014 at 07:49:23AM +0800, Peter Chen wrote:
> On Wed, Sep 03, 2014 at 02:02:04PM -0400, Alan Stern wrote:
> > On Wed, 3 Sep 2014, Peter Chen wrote:
> >
> > > On Fri, Aug 22, 2014 at 02:31:18PM +0530, Pratyush Anand wrote:
> > > > On Tue, Aug 19, 2014 at 09:51:51AM +0800, Peter Chen
Fixes: 588b48caf65c ("usbip: move usbip userspace code out of staging")
which introduced build failure by not changing uapi/usbip.h include path
according to new location.
Signed-off-by: Piotr Król
---
tools/usb/usbip/libsrc/usbip_common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
On Wed, Sep 03, 2014 at 01:45:32PM -0400, Alan Stern wrote:
> On Wed, 3 Sep 2014, Peter Chen wrote:
>
> > > PS: I also have an old patch that adds a reset callback to
> > > g-mass-storage. Peter asked for this around the same time the other
> > > work was done. The idea was that disconnect must
On Wed, Sep 03, 2014 at 01:53:23PM -0400, Alan Stern wrote:
> On Wed, 3 Sep 2014, Peter Chen wrote:
>
> > > Okay. Let's start by adding the reset field to struct
> > > usb_gadget_driver. The initial implementation in the four gadget
> > > drivers can be very simple: It calls the disconnect handl
On Wed, 3 Sep 2014, Felipe Balbi wrote:
> > > On the other hand, core.c:dwc3_remove() doesn't call
> > > dwc3_core_exit_mode() until after doing a lot of other things.
> > > Shouldn't it call dwc3_core_exit_mode() first?
> >
> > yup. At least the PHYs still need to the be alive for as long as
On Thu, 4 Sep 2014, Peter Chen wrote:
> > > > Hi Greg & Alan, any comments for this patchset?
> > >
> > > In patch 2/6, why did you move the !is_targeted(udev) code from
> > > usb_enumerate_device_otg() to usb_enumerate_device()? Why not leave
> > > the code where it is?
> > >
> >
> > TPL su
On Thu, 4 Sep 2014, Peter Chen wrote:
> > > Alan, this problem seems not to be existed at g_mass_storage,
> > > g_mass_storage
> > > has not .disconnect API and only fsg_disable will be called when bus reset
> > > occurs.
> >
> > That sounds like a bug. Shouldn't there be a disconnect callback?
On Wed, Sep 03, 2014 at 09:48:15PM -0400, Alan Stern wrote:
> On Thu, 4 Sep 2014, Peter Chen wrote:
>
> > > > > Hi Greg & Alan, any comments for this patchset?
> > > >
> > > > In patch 2/6, why did you move the !is_targeted(udev) code from
> > > > usb_enumerate_device_otg() to usb_enumerate_devi
On Wed, Sep 3, 2014 at 8:19 PM, Felipe Balbi wrote:
> On Wed, Sep 03, 2014 at 02:48:43PM +0530, Anjana V Kumar wrote:
>> Hi,
>>
>> This is regarding an issue we are facing with the gadget serial driver
>> (driver/usb/gadget/serial.c).
>>
>> We have a hardware limitation and the USB hardware can on
We have only needed to enable otg initialization when both of
below conditions are satisfied:
- The controller is otg capable
- The gadget function is enabled
If the controller is otg capable, but is host-only configuration, we do
not need to access register otgsc and do any otg operations (eg, c
Hi,
-Original Message-
From: linux-usb-ow...@vger.kernel.org [mailto:linux-usb-ow...@vger.kernel.org]
On Behalf Of Antoine Tenart
Sent: Wednesday, September 03, 2014 3:41 PM
To: ba...@ti.com; gre...@linuxfoundation.org; Chen Peter-B29397; kis...@ti.com;
st...@rowland.harvard.edu
Cc: Anto
On Wed, Sep 3, 2014 at 8:12 PM, Felipe Balbi wrote:
> Hi,
>
> On Wed, Sep 03, 2014 at 12:59:27PM +0530, Vivek Gautam wrote:
>> > On Tue, Sep 02, 2014 at 04:42:18PM +0530, Vivek Gautam wrote:
>> >> Adding phy calibrate callback, which facilitates setting certain
>> >> PHY settings post initializati
This patch introduces ioctl named FUNCTIONFS_ENDPOINT_DESC, which
returns endpoint descriptor to userspace. It works only if function
is active.
Signed-off-by: Robert Baldyga
Acked-by: Michal Nazarewicz
---
drivers/usb/gadget/function/f_fs.c | 23 +++
include/uapi/linux/usb
This patchset contains changes in FunctionFS making it easier and
safer to use. It fixes bug in endpoint files handling code, adds new
ioctl allowing to obtain endpoint descriptor, and introduces virtual
address mapping which allows to separate endpoint address space in
function from physical endpo
This patch introduces virtual endpoint address mapping. It separates
function logic form physical endpoint addresses making it more hardware
independent.
Following modifications changes user space API, so to enable them user
have to switch on the FUNCTIONFS_VIRTUAL_ADDR flag in descriptors.
Endpo
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