Hi Marek,
On 19/07/19 5:51 PM, Marek Szyprowski wrote:
> Hi Kishon,
>
> On 2019-07-19 12:04, Kishon Vijay Abraham I wrote:
>> Hi Marek,
>>
>> On 19/07/19 3:22 PM, Marek Szyprowski wrote:
>>> Commit 36914111e682 ("drivers: phy: add calibrate method"
Hi Marek,
On 19/07/19 3:22 PM, Marek Szyprowski wrote:
> Commit 36914111e682 ("drivers: phy: add calibrate method") added support
> for generic phy_calibrate() method, but it didn't explain in detail when
> such method is supposed to be called. Add some more documentation directly
> to the phy.h t
Hi,
On 16/01/19 8:58 PM, Jeffrey Hugo wrote:
> On 1/16/2019 1:58 AM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On 16/01/19 2:20 PM, Kishon Vijay Abraham I wrote:
>>>
>>>
>>> On 15/01/19 11:41 PM, Bjorn Andersson wrote:
>>>> On Mon 1
Hi,
On 15/01/19 8:10 AM, Chunfeng Yun wrote:
> Hi,
> On Fri, 2019-01-11 at 14:31 +0100, Miquel Raynal wrote:
>> Marvell Armada 3700 SoC has two USB controllers, each of them being
>> wired to an internal UTMI PHY. Add a driver to control them.
>>
>> Igal Liberman worked on supporting the PHY, I to
Hi,
On 16/01/19 2:20 PM, Kishon Vijay Abraham I wrote:
>
>
> On 15/01/19 11:41 PM, Bjorn Andersson wrote:
>> On Mon 14 Jan 08:36 PST 2019, Jeffrey Hugo wrote:
>>
>>> MSM8998 contains one QUSB2 PHY which is very similar to the existing
>>> sdm845 suppor
On 15/01/19 11:38 PM, Bjorn Andersson wrote:
> On Mon 14 Jan 08:36 PST 2019, Jeffrey Hugo wrote:
>
>> USB on msm8998 utilizes the QUSB2 and QMP phys, similar to sdm845.
>>
>> Signed-off-by: Jeffrey Hugo
>> ---
>> Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt | 5 +
>> Documenta
On 15/01/19 11:41 PM, Bjorn Andersson wrote:
> On Mon 14 Jan 08:36 PST 2019, Jeffrey Hugo wrote:
>
>> MSM8998 contains one QUSB2 PHY which is very similar to the existing
>> sdm845 support.
>>
>
I don't seem to have the dt-binding patch in my inbox. Can you send them as
well?
Thanks
Kishon
>
On 12/12/18 12:22 PM, Felipe Balbi wrote:
>
> Hi
>
> Pawel Laszczak writes:
+ cdns->phy = devm_phy_get(dev, "cdns3,usbphy");
+ if (IS_ERR(cdns->phy)) {
+ ret = PTR_ERR(cdns->phy);
+ if (ret == -ENOSYS || ret == -ENODEV) {
>>>
>>> Are you sure you can ge
Hi,
On 15/10/18 8:15 PM, Lubomir Rintel wrote:
> Turned from arch/arm/mach-mmp/devices.c into a proper PHY driver, so
> that in can be instantiated from a DT.
>
> Acked-by: Kishon Vijay Abraham I
> Signed-off-by: Lubomir Rintel
I'm unable to apply this patch as the raw for
Hi Tony,
On 17/11/18 7:07 PM, Tony Lindgren wrote:
> I noticed that phy_pm_runtime_get_sync() and phy_pm_runtime_put() are not
> currently doing anything for phy-mapphone-mdm6600, only the sysfs interface
> for works for "auto" and "on".
>
> This is because of the shared GPIO pins between mdm6600
Hi,
On 27/10/18 3:28 PM, Yu Chen wrote:
> This driver handles usb phy power on and shutdown for hi3660 Soc of
> Hisilicon.
>
> Cc: Kishon Vijay Abraham I
> Cc: "David S. Miller"
> Cc: Greg Kroah-Hartman
> Cc: Mauro Carvalho Chehab
> Cc: Andrew Morton
&g
On Thursday 23 August 2018 02:12 AM, Lubomir Rintel wrote:
> Turned from arch/arm/mach-mmp/devices.c into a proper PHY driver, so
> that in can be instantiated from a DT.
>
> Signed-off-by: Lubomir Rintel
Acked-by: Kishon Vijay Abraham I
If this has to be merged via linux-phy
Hi,
On Monday 19 March 2018 09:42 PM, Martin Blumenstingl wrote:
> Hi Roger,
>
> On Mon, Mar 19, 2018 at 9:49 AM, Roger Quadros wrote:
>> Hi,
>>
>> On 19/03/18 00:29, Martin Blumenstingl wrote:
>>> Hi Roger,
>>>
>>> On Fri, Mar 16, 2018 at 3:32 PM, Roger Quadros wrote:
+some TI folks
Hi Tony,
On Wednesday 07 March 2018 08:26 PM, Tony Lindgren wrote:
> Let's add support for the GPIO controlled USB PHY on the MDM6600 modem.
> It is used on some Motorola Mapphone series of phones and tablets such
> as Droid 4.
>
> The MDM6600 is hardwired to the first OHCI port in the Droid 4 ca
Hi Tony,
On Thursday 01 March 2018 09:20 AM, Tony Lindgren wrote:
> Let's add support for the GPIO controlled USB PHY on the MDM6600 modem.
> It is used on some Motorola Mapphone series of phones and tablets such
> as Droid 4.
Generally PHY configuration is done for the PHYs that is connected to
On Thursday 01 February 2018 06:08 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Wednesday 31 January 2018 10:51 AM, Manu Gautam wrote:
>> Hi Kishon,
>>
>>
>> On 1/16/2018 4:26 PM, Manu Gautam wrote:
>>> QUSB-v2 and QMP-v3 USB PHYs are present on Q
Hi,
On Wednesday 31 January 2018 10:51 AM, Manu Gautam wrote:
> Hi Kishon,
>
>
> On 1/16/2018 4:26 PM, Manu Gautam wrote:
>> QUSB-v2 and QMP-v3 USB PHYs are present on Qualcomm's 14nm
>> and 10nm SOCs.
>> This patch series adds support for runtime PM for these
>> USB PHYs and adds fixes in drive
Hi Arnd,
On Thursday 11 January 2018 11:46 PM, Eric Anholt wrote:
> Arnd Bergmann writes:
>
>> On Thu, Jan 11, 2018 at 2:30 PM, Kishon Vijay Abraham I
>> wrote:
>>> On Thursday 11 January 2018 02:27 AM, Arnd Bergmann wrote:
>>>> On Mon, Jan 8,
Hi Arnd,
On Thursday 11 January 2018 02:27 AM, Arnd Bergmann wrote:
> On Mon, Jan 8, 2018 at 7:32 PM, Kishon Vijay Abraham I wrote:
>> Hi Arnd,
>>
>> On Monday 08 January 2018 06:31 PM, Arnd Bergmann wrote:
>>> Stefan Wahren reports a problem with a warning fix tha
Hi Arnd,
On Monday 08 January 2018 06:31 PM, Arnd Bergmann wrote:
> Stefan Wahren reports a problem with a warning fix that was merged
> for v4.15: we had lots of device nodes with a 'phys' property pointing
> to a device node that is not compliant with the binding documented in
> Documentation/de
Hi,
On Wednesday 03 January 2018 04:58 PM, Manu Gautam wrote:
> Add following USB speed related PHY modes:
> LS (Low Speed), FS (Full Speed), HS (High Speed), SS (Super Speed)
>
> Speed related information is required by some QCOM PHY drivers
> to program PHY monitor resume/remote-wakeup events i
Hi,
On Friday 29 December 2017 09:54 AM, Manu Gautam wrote:
> Hi,
>
>
> On 12/28/2017 4:34 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
> [snip]
>>
>>>> I'd prefer adding modes in enum phy_mode according to speed and using
>>>>
On Thursday 07 December 2017 05:23 PM, Chunfeng Yun wrote:
> When system is running, if usb2 phy is forced to bypass utmi signals,
> all PLL will be turned off, and it can't detect device connection
> anymore, so replace force mode with auto mode which can bypass utmi
> signals automatically if n
Hi,
On Wednesday 20 December 2017 02:11 PM, Manu Gautam wrote:
> Hi
>
>
> On 12/20/2017 12:47 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
> [snip]
>>>> Why not use a notification mechanism instead of adding new APIs in
>>>> phy-core.
Hi,
On Wednesday 20 December 2017 11:59 AM, Manu Gautam wrote:
> Hi,
>
>
> On 12/20/2017 11:19 AM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Tuesday 12 December 2017 08:54 PM, Manu Gautam wrote:
>>> Hi,
>>>
>>>
>>> On 12/12
Hi,
On Tuesday 12 December 2017 08:54 PM, Manu Gautam wrote:
> Hi,
>
>
> On 12/12/2017 5:13 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Tuesday 21 November 2017 02:53 PM, Manu Gautam wrote:
>>> QCOM USB PHYs can monitor resume/remote-wakeup event in
Hi,
On Tuesday 21 November 2017 02:53 PM, Manu Gautam wrote:
> QCOM USB PHYs can monitor resume/remote-wakeup event in
> suspended state. However PHY driver must know current
> operational speed of PHY in order to set correct polarity of
> wakeup events for detection. E.g. QUSB2 PHY monitors DP/DM
Felipe,
On Monday 09 October 2017 05:30 PM, Andrzej Pietrasiewicz wrote:
> From: Vivek Gautam
>
> Adding phy calibration sequence for USB 3.0 DRD PHY present on
> Exynos5420/5800 systems.
> This calibration facilitates setting certain PHY parameters viz.
> the Loss-of-Signal (LOS) Detector Thres
On Wednesday 18 October 2017 07:44 AM, Chanwoo Choi wrote:
> Gently Ping.
>
> Dear Kishon,
>
> Could you please review this patch for 'drivers/phy/*'?
sorry for the delay.. here it is
Acked-by: Kishon Vijay Abraham I
>
> Regards,
> Chanwoo Choi
>
&
On Monday 09 October 2017 05:30 PM, Andrzej Pietrasiewicz wrote:
> Hi all,
>
> This is the fourth version of patches in this thread.
>
> The series fixes problems with enumerating of SuperSpeed devices
> on an Odroid XU3. There was a patch series from Vivek Gautam in
> circulation, but it got l
Hi,
On Thursday 05 October 2017 05:41 PM, Andrzej Pietrasiewicz wrote:
> Some quirky UDCs (like dwc3 on exynos) need to have heir phys calibrated
%s/heir/their
> e.g. for using super speed.
The commit log should also include when phy calibrate should be used and why
existing API's is not suffici
Hi,
On Tuesday 03 October 2017 06:29 PM, Andrzej Pietrasiewicz wrote:
> Hi all,
>
> This is the second version of patches in this thread.
>
> The series fixes problems with enumerating of SuperSpeed devices
> on an Odroid XU3. There was a patch series from Vivek Gautam in
> circulation, but it g
Hi,
On Monday 18 September 2017 07:50 PM, Andrzej Pietrasiewicz wrote:
> Hi,
>
> W dniu 18.09.2017 o 14:43, Felipe Balbi pisze:
>>
>> Hi,
>>
>> Andrzej Pietrasiewicz writes:
>>> +static int exynos5_usbdrd_phy_reset(struct phy *phy)
>>> +{
>>> +struct phy_usb_instance *inst = phy_
On Thursday 21 September 2017 04:01 PM, Chunfeng Yun wrote:
> Chip bank of version-1 is initialized as NULL, but it's used
> by pcie_phy_instance_power_on/off(), so assign it a right
> address.
merged. How was this not noticed before?
Thanks
Kishon
>
> Signed-off-by: Chunfeng Yun
> ---
> dri
Hi,
On Monday 18 September 2017 04:08 PM, Felipe Balbi wrote:
>
> Hi,
>
> Andrzej Pietrasiewicz writes:
>> From: Vivek Gautam
>>
>> Adding phy calibration sequence for USB 3.0 DRD PHY present on
>> Exynos5420/5800 systems.
>> This calibration facilitates setting certain PHY parameters viz.
>>
Chunfeng
On Thursday 03 August 2017 03:50 PM, Chunfeng Yun wrote:
> hi,
>
> I made a mistake, please ignore the patches with Change-Id, very sorry
No problem. However can you resend the series after fixing all checkpatch
warnings?
Thanks
Kishon
--
To unsubscribe from this list: send the line "
On Monday 17 July 2017 06:50 AM, Chanwoo Choi wrote:
> This patch replaces the deprecated extcon API as following:
> - extcon_set_cable_state_() -> extcon_get_state()
>
> Cc: Kishon Vijay Abraham I
> Cc: Raviteja Garimella
> Signed-off-by: Chanwoo Choi
Acked-by: K
con_set_state_sync()
>
> Cc: linux-rockc...@lists.infradead.org
> acked-by: Kishon Vijay Abraham I
^
should be 'A' here.
-Kishon
> Signed-off-by: Chanwoo Choi
> ---
> drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 10 +-
> 1 file changed, 5 insertions
in
>> qcom_qmp_phy_com_init().
>>
>> Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
>>
>> Cc: Kishon Vijay Abraham I
>> Signed-off-by: Vivek Gautam
>
> This patch got missed. Can you please pull this in?
merged now, thanks!
On Monday 12 June 2017 01:42 PM, Tony Lindgren wrote:
> Commit 8ae904e3c236 ("phy: cpcap-usb: Add CPCAP PMIC USB support")
> is missing return statement as noted by Colin Ian King
> . If the optional pins are not configured,
> we just want to return early and not attempt to configure the pins.
>
On Friday 09 June 2017 03:50 PM, Felipe Balbi wrote:
> ->set_mode() can be used to tell PHY to prepare itself to enter USB
> Host/Peripheral mode and that's very important for DRD
> configurations.
>
> Signed-off-by: Felipe Balbi
>
> changes since v1:
> - rebase on PHY -next
removed this ch
On Friday 09 June 2017 03:50 PM, Felipe Balbi wrote:
> TUSB1211 is software compatible with TUSB1210 and as such we don't
> need an entire new driver to control it. Let's add its product ID to
> the existing TUSB1210 driver instead.
>
> Signed-off-by: Felipe Balbi
merged this series, thanks!
Hi,
On Friday 09 June 2017 03:27 PM, Felipe Balbi wrote:
>
> Hi,
>
> Kishon Vijay Abraham I writes:
>> On Thursday 08 June 2017 05:19 PM, Felipe Balbi wrote:
>>> TUSB1211 is software compatible with TUSB1210 and as such we don't
>>> need an entir
Hi Felipe,
On Thursday 08 June 2017 05:19 PM, Felipe Balbi wrote:
> TUSB1211 is software compatible with TUSB1210 and as such we don't
> need an entire new driver to control it. Let's add its product ID to
> the existing TUSB1210 driver instead.
>
> Signed-off-by: Felipe Balbi
> ---
> drivers/p
On Tuesday 23 May 2017 06:07 AM, Tony Lindgren wrote:
> Some Motorola phones like droid 4 use a custom CPCAP PMIC that has a
> multiplexing USB PHY.
>
> This USB PHY can operate at least in four modes using pin multiplexing
> and two control GPIOS:
>
> - Pass through companion PHY for the SoC U
On Monday 22 May 2017 03:32 AM, Wolfram Sang wrote:
> include/linux/i2c is not for client devices. Move the header file to a
> more appropriate location.
>
> Signed-off-by: Wolfram Sang
Acked-by: Kishon Vijay Abraham I
> ---
> arch/arm/mach-omap2/common.h| 2 +
Signed-off-by: Vivek Gautam
> Acked-by: Heiko Stuebner
> Acked-by: Viresh Kumar
> Acked-by: Krzysztof Kozlowski
> Acked-by: Yoshihiro Shimoda
> Reviewed-by: Jaehoon Chung
> Cc: Kishon Vijay Abraham I
> Cc: David S. Miller
> Cc: Geert Uytterhoeven
> Cc: Yos
Hi Vivek,
On Thursday 11 May 2017 12:17 PM, Vivek Gautam wrote:
> Ulpi phy header is not used for anything. Remove the same
> from qcom-hs and qcom-hsic phy drivers.
>
> Signed-off-by: Vivek Gautam
> Suggested-by: Stephen Boyd
> Cc: Kishon Vijay Abraham I
&
Signed-off-by: Vivek Gautam
> Acked-by: Heiko Stuebner
> Acked-by: Viresh Kumar
> Acked-by: Krzysztof Kozlowski
> Acked-by: Yoshihiro Shimoda
> Reviewed-by: Jaehoon Chung
> Cc: Kishon Vijay Abraham I
> Cc: David S. Miller
> Cc: Geert Uytterhoeven
> Cc: Yos
Hi Tony,
On Monday 10 April 2017 09:49 AM, Tony Lindgren wrote:
> Some Motorola phones like droid 4 use a custom CPCAP PMIC that has a
> multiplexing USB PHY.
>
> This USB PHY can operate at least in four modes using pin multiplexing
> and two control GPIOS:
>
> - Pass through companion PHY for
Fengguang Wu
> Cc: Kishon Vijay Abraham I
> Signed-off-by: Vivek Gautam
> ---
>
> Hi Kishon,
>
> This patch is fixing the build failures for architectures
> such as, tile, and ia64, that don't enable COMMON_CLK by default.
> You can either squash this into the qmp
On Friday 31 March 2017 01:05 PM, Chunfeng Yun wrote:
> The default value of RX detection stable time is 10us, and this
> margin is too big for some critical cases which cause U3 link fail
> and link to U2(probability is about 1%). So change it to 5us.
>
merged all the phy patches in this series
On Thursday 06 April 2017 11:21 AM, Vivek Gautam wrote:
> Hi Kishon,
> Here's the series with fixed checkpatch warnings/checks.
> Please pick it for phy/next.
>
> This patch series adds couple of PHY drivers for Qualcomm chipsets.
> a) qcom-qusb2 phy driver: that provides High Speed USB function
Hi Vivek,
On Wednesday 05 April 2017 06:02 PM, Vivek Gautam wrote:
> This patch series adds couple of PHY drivers for Qualcomm chipsets.
> a) qcom-qusb2 phy driver: that provides High Speed USB functionality.
> b) qcom-qmp phy driver: that is a combo phy providing support for
>USB3, PCIe, UFS
Hi Vivek,
On Wednesday 05 April 2017 05:07 PM, Vivek Gautam wrote:
> Hi Kishon,
>
>
> On 04/05/2017 04:34 PM, Kishon Vijay Abraham I wrote:
>> Hi Vivek,
>>
>> On Monday 20 March 2017 06:49 PM, Vivek Gautam wrote:
>>> This is the next version to an earli
On Monday 06 March 2017 06:59 AM, Meng Dongyang wrote:
> The config information of RK3328 about address and port property
> is different from other platform. So adds config information in the
> data of match table and the device tree bindings description for
> usb2-phy.
>
> Changes in v2:
> - m
ed 'Acked-by' and 'Reviewed-by'
> tags.
>
> This series is based on linux-phy/next branch.
>
> [1] https://www.spinics.net/lists/arm-kernel/msg568370.html
>
> Signed-off-by: Vivek Gautam
> Cc: Kishon Vijay Abraham I
> Cc: linux-arm-ker...@lists.i
Hi Tony,
On Monday 27 March 2017 08:35 PM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I [170326 23:27]:
>> On Thursday 23 March 2017 05:16 AM, Tony Lindgren wrote:
>>> +static const struct phy_ops ops = {
>>> + .owner = THIS_MODULE,
>>> +};
&g
On Wednesday 01 March 2017 03:43 PM, Meng Dongyang wrote:
> The config information of RK3328 about address and port property
> is different from before platform. So add config information in the
> data of match table and documentation of the device tree bindings
> of u2phy.
merged, thanks.
-Kis
Hi Tony,
On Thursday 23 March 2017 05:16 AM, Tony Lindgren wrote:
> Some Motorola phones like droid 4 use a custom CPCAP PMIC that has a
> multiplexing USB PHY.
>
> This USB PHY can operate at least in four modes using pin multiplexing
> and two control GPIOS:
>
> - Pass through companion PHY fo
Hi,
On Monday 06 March 2017 07:19 PM, Chunfeng Yun wrote:
> the reference clock of HighSpeed port is 48M which comes from PLL;
> the reference clock of SuperSpeed port is 26M which usually comes
> from 26M oscillator directly, but some SoCs are not, add it for
> compatibility, and put them into po
On Thursday 26 January 2017 04:02 AM, Stephen Boyd wrote:
> This patch series continues the usb chipidea rewrite for
> Qualcommm platforms. I've dropped the patches that were applied
> to Peter's tree for chipidea. Now the phy drivers are left,
> along with the patch to call phy_set_mode() at th
Hi,
On Tuesday 24 January 2017 01:28 AM, Stephen Boyd wrote:
> Quoting Kishon Vijay Abraham I (2017-01-22 00:46:21)
>> Hi,
>>
>> On Saturday 21 January 2017 12:20 AM, Stephen Boyd wrote:
>>> Some USB PHYs need to be told about vbus changing state
>>> expl
Hi,
On Saturday 21 January 2017 12:20 AM, Stephen Boyd wrote:
> Some USB PHYs need to be told about vbus changing state
> explicitly. For example the qcom USB HS PHY needs to toggle a bit
> when vbus goes from low to high (VBUSVLDEXT) to cause the
> "session valid" signal to toggle. This signal wi
On Friday 06 January 2017 07:26 PM, Maxime Ripard wrote:
> On Tue, Jan 03, 2017 at 11:25:31PM +0800, Icenowy Zheng wrote:
>> Allwinner V3s come with a USB PHY controller slightly different to other
>> SoCs, with only one PHY.
>>
>> Add support for it.
>>
>> Signed-off-by: Icenowy Zheng
>
> Acke
ample.
>
> Cc: Wei Xu
> Cc: Guodong Xu
> Cc: Amit Pundir
> Cc: Rob Herring
> Cc: John Youn
> Cc: Douglas Anderson
> Cc: Chen Yu
> Cc: Kishon Vijay Abraham I
> Cc: Felipe Balbi
> Cc: Greg Kroah-Hartman
> Cc: linux-usb@vger.kernel.org
> Signed-off-
On Friday 23 September 2016 07:10 PM, Hans de Goede wrote:
> The sunxi musb has a bug where sometimes it will generate a babble
> error on device disconnect instead of a disconnect irq. When this
> happens the musb-controller switches from host mode to device mode
> (it clears MUSB_DEVCTL_SESSION
nted their own PM.
>>
>> Fixes: 467d5c980709 ("usb: musb: Implement session bit based
>> runtime PM for musb-core")
>> Tested-by: Ladislav Michl
>> Tested-by: Laurent Pinchart
>> Signed-off-by: Tony Lindgren
>
> I would need Kishon's Acked
On Wednesday 09 November 2016 08:00 AM, Yoshihiro Shimoda wrote:
> This patch adds sysfs "role" for usb role swap. This parameter can be
> read and write. If you use this file as the following, you can swap
> the usb role.
>
> For example:
> 1) Connect a usb cable using 2 Salvator-x boards
> 2
Hi,
On Saturday 12 November 2016 04:09 PM, Nicolae Rosia wrote:
> All users are DT-only and it makes no sense to keep
> unused code
Are you sure about this? I still see a bunch of board files in mach-omap2 using
twl4030.
Thanks
Kishon
>
> Signed-off-by: Nicolae Rosia
> ---
> drivers/phy/Kconf
On Monday 07 November 2016 06:35 PM, Alexandre Bailon wrote:
> If we configure the da8xx OTG phy in OTG mode, neither device or host
> mode will work. That is because the PHY is not able to detect and notify
> the driver that value of ID pin changed.
> To work despite this hardware limitation, th
On Thursday 03 November 2016 09:33 PM, Axel Haslam wrote:
> The ohci device name has changed in the board configuraion files,
> hence, change the phy lookup table to match the new name.
>
> Signed-off-by: Axel Haslam
merged, thanks.
-Kishon
> ---
> drivers/phy/phy-da8xx-usb.c | 5 +++--
> 1
On Friday 04 November 2016 11:04 AM, Sekhar Nori wrote:
> Hi Kishon,
>
> On Thursday 03 November 2016 10:20 PM, Kishon Vijay Abraham I wrote:
>>
>>
>> On Wednesday 02 November 2016 06:14 PM, Axel Haslam wrote:
>>> There is only one ohci on the da8xx series o
Hi,
On Thursday 03 November 2016 10:56 PM, Alexandre Bailon wrote:
> On 11/03/2016 05:34 PM, Kishon Vijay Abraham I wrote:
>> Hi,
>>
>> On Thursday 03 November 2016 08:56 PM, Alexandre Bailon wrote:
>>> The USB PHY is able to operate in OTG, host or peripheral.
>&
On Wednesday 02 November 2016 06:14 PM, Axel Haslam wrote:
> There is only one ohci on the da8xx series of chips,
> so remove the ".0" when creating the phy. Also add
> the "-da8xx" postfix to be consistent across davinci
> usb drivers.
>
> Signed-off-by
Hi,
On Thursday 03 November 2016 08:56 PM, Alexandre Bailon wrote:
> The USB PHY is able to operate in OTG, host or peripheral.
> Some board may be wired to work act only as host or peripheral.
> In such case, the dr_mode property of controller must be set to
> host or peripheral. But doing that w
On Wednesday 26 October 2016 02:17 AM, John Youn wrote:
> On 10/25/2016 7:15 AM, Randy Li wrote:
>> I forget to add a dummy function in case the CONFIG_GENERIC_PHY
>> is disabled.
>>
>> Signed-off-by: Randy Li
>
> Fixes: cac18ecb6f44 ("phy: Add reset callback")
> Tested-by: John Youn
>
> Hi K
for a nop-phy driver.
> This can be further extended to add required features.
>
> Inspired by phy-generic driver in drivers/usb/phy.
>
> Signed-off-by: Vivek Gautam
> Cc: Kishon Vijay Abraham I
> Cc: Felipe Balbi
> ---
>
> Hi Kishon, Felipe,
>
> This patch has
On Monday 19 September 2016 10:12 PM, Kevin Hilman wrote:
> Kishon Vijay Abraham I writes:
>
>> Hi Kevin,
>>
>> On Wednesday 14 September 2016 09:36 PM, Kevin Hilman wrote:
>>> Kishon,
>>>
>>> Martin Blumenstingl writes:
>>>
>>
Hi,
On Sunday 18 September 2016 10:20 PM, Hans de Goede wrote:
> The sunxi musb has a bug where sometimes it will generate a babble
> error on device disconnect instead of a disconnect irq. When this
> happens the musb-controller switches from host mode to device mode
> (it clears MUSB_DEVCTL_SESS
Hi,
On Monday 19 September 2016 01:26 AM, Martin Blumenstingl wrote:
> Hi Kishon,
>
> On Fri, Sep 16, 2016 at 10:19 AM, Kishon Vijay Abraham I
> wrote:
>> Hi,
>>
>> On Friday 09 September 2016 09:44 PM, Martin Blumenstingl wrote:
>>> On Fri, Sep
Hi Kevin,
On Wednesday 14 September 2016 09:36 PM, Kevin Hilman wrote:
> Kishon,
>
> Martin Blumenstingl writes:
>
>> This is a new driver for the USB PHY found in Meson8b and GXBB SoCs.
>>
>> Signed-off-by: Martin Blumenstingl
>> Signed-off-by: Jerome Brunet
>> Tested-by: Kevin Hilman
>
>
Hi,
On Friday 09 September 2016 09:44 PM, Martin Blumenstingl wrote:
> On Fri, Sep 9, 2016 at 5:33 PM, Kevin Hilman wrote:
>> However, the problem with all of the solutions proposed (runtime PM ones
>> included) is that we're forcing a board-specific design issue (2 devices
>> sharing a reset lin
On Saturday 10 September 2016 05:48 PM, Kishon Vijay Abraham I wrote:
>
> On Wed, Sep 07, 2016 at 02:35:19PM -0700, Stephen Boyd wrote:
>> The high-speed phy on qcom SoCs is controlled via the ULPI
>> viewport.
>>
>> Cc: Kishon Vijay Abraham I
>>
Hi,
On Sunday 04 September 2016 03:25 AM, Randy Li wrote:
> On the rk3288 USB host-only port (the one that's not the OTG-enabled
> port) the PHY can get into a bad state when a wakeup is asserted (not
> just a wakeup from full system suspend but also a wakeup from
> autosuspend).
>
> We can get t
Hi,
On Tuesday 30 August 2016 08:00 PM, Al Cooper wrote:
> Add a new USB Phy driver for Broadcom STB SoCs. This driver
> supports all Broadcom STB ARM SoCs. This driver in combination
> with the generic ohci, ehci and xhci platform drivers will enable
> USB1.1, USB2.0 and USB3.0 support. This Phy
Hi,
On Monday 22 August 2016 06:30 PM, Heiko Stübner wrote:
> Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I:
>> Hi,
>>
>> On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
>>> It is a hardware bug in RK3288, the only way to solve it is to
>
Hi,
On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
> It is a hardware bug in RK3288, the only way to solve it is to
> reset the phy.
>
> Signed-off-by: Randy Li
> ---
> drivers/phy/phy-rockchip-usb.c | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/drivers/phy
Hi,
On Monday 22 August 2016 01:44 PM, Jisheng Zhang wrote:
> + Kishon
>
> Hi Peter, Kishon,
>
> On Mon, 22 Aug 2016 15:29:07 +0800 Peter Chen wrote:
>
>> On Mon, Aug 22, 2016 at 02:39:21PM +0800, Jisheng Zhang wrote:
>>> Hi Peter,
>>>
>>> On Mon, 22 Aug 2016 13:33:08 +0800 Peter Chen wrote:
>>
Hi,
On Thursday 18 August 2016 03:47 PM, Felipe Balbi wrote:
>
> Hi,
>
> Hans de Goede writes:
>
> [...]
>
>> void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
>> {
>> struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
> [...]
>
> $ scripts/c
Hi Kevin,
On Saturday 13 August 2016 02:54 AM, Kevin Hilman wrote:
> On Wed, May 25, 2016 at 6:18 AM, Sekhar Nori wrote:
>> On Monday 23 May 2016 08:44 PM, David Lechner wrote:
>>> On 05/09/2016 06:46 PM, David Lechner wrote:
v5 changes: renamed "usbphy" to "usb_phy" or "usb-phy" as appropri
Hi,
On Friday 22 July 2016 12:30 PM, Frank Wang wrote:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
>
On Friday 12 August 2016 08:36 AM, Icenowy Zheng wrote:
> Signed-off-by: Icenowy Zheng
Added "Update sun4i usb phy dt binding documentation to include support for
Allwinner A64 usb phy." and then merged this.
Thanks
Kishon
> ---
> Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt | 1 +
On Friday 12 August 2016 08:36 AM, Icenowy Zheng wrote:
> There's something unknown in the pmu part that shared with H3.
> It's renamed as PMU_UNK1 from PMU_UNK_H3.
>
> Signed-off-by: Icenowy Zheng
Fixed the following checkpatch warning and merged this to linux-phy tree.
WARNING: line over 80
Hi,
On Friday 12 August 2016 03:58 AM, Rafał Miłecki wrote:
> From: Rafał Miłecki
>
> Northstar is a family of SoCs used in home routers. They have USB 2.0
> and 3.0 controllers with PHYs that need to be properly initialized.
> This driver provides PHY init support in a generic way and can be bo
On Tuesday 09 August 2016 01:25 AM, Hans de Goede wrote:
> Hi Kishon,
>
> As discussed before, here is a resend now that rc1 is out (and includes
> the new of_usb_get_dr_mode_by_phy helper this patch needs).
>
> Please merge this for 4.9-rcX some of the musb-sunxi glue changes
> already merged
Hi,
On Tuesday 10 May 2016 05:09 AM, David Lechner wrote:
> We will be using a generic syscon device for the TI DA8XX SoC CFGCHIPx
> retisters. This will be used by a number of planned drivers including a
> new USB PHY driver and common clock framework drivers.
>
> The same defines are removed fr
Hi,
On Tuesday 05 July 2016 02:47 AM, Hans de Goede wrote:
> Hi Kishon,
>
> Thanks for merging one of the 2 pending phy-sun4i-usb patches, I see
> that the other one actually has a conflict after merging in
> linux-phy/fixes. So here is a rebased version of it.
>
> Note can you please make sure
If dr_mode is not specified in the dts, do not register phy0 as we then
> do not know how to treat it. This is actually a good thing as this means
> we will not be registering phy0 on devices where the otg controller is
> not enabled in the devicetree.
>
> Signed-off-by: Hans de
Hi Bin,
On Monday 27 June 2016 06:17 PM, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Tuesday 10 May 2016 05:09 AM, David Lechner wrote:
>> The initial use for this is for PHYs that have a mode related to USB OTG.
>> There are several SoCs (e.g. TI OMAP and DA8xx) that have
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