Hi Vinod,
Thanks for the reply.
On Fri, May 17, 2013 at 01:34:23PM +0100, Vinod Koul wrote:
> On Thu, May 16, 2013 at 04:35:53PM +0100, Will Deacon wrote:
> > Right, so I think I understand what's causing this, but I'll leave it to
> > Andriy to suggest a fix. The proble
On Fri, May 17, 2013 at 11:07:37AM +0100, Ming Lei wrote:
> On Fri, May 17, 2013 at 5:54 PM, Will Deacon wrote:
> > On Fri, May 17, 2013 at 10:48:23AM +0100, Ming Lei wrote:
> >> On Fri, May 17, 2013 at 5:36 PM, Will Deacon wrote:
> >> >
> >> > It&
that aren't running a
bleeding-edge libc-dev.
Signed-off-by: Will Deacon
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/vmlinux.lds.S | 15 +++
scripts/sortextable.c | 5 +
3 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/Kcon
Hi Chen,
On Mon, May 20, 2013 at 06:42:46AM +0100, Chen Gang wrote:
>
> Add the extern variable 'screen_info' according to arm32 has done.
>
> The related error:
> drivers/video/console/vgacon.c:1305: undefined reference to `screen_info'
>
>
> Signed-off-by: Chen Gang
> ---
> arch/arm64/ke
Hi David,
On Fri, May 17, 2013 at 07:33:53PM +0100, David Daney wrote:
> On 05/17/2013 09:43 AM, Will Deacon wrote:
> > As is done for other architectures, sort the exception table at
> > build-time rather than during boot.
> >
> > Since sortextable appears to be a stan
On Fri, May 17, 2013 at 07:49:50PM +0100, Sam Ravnborg wrote:
> On Fri, May 17, 2013 at 05:43:41PM +0100, Will Deacon wrote:
> > + . = ALIGN(8);
> > + __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
> > + __start___ex_table = .;
> &g
On Mon, May 20, 2013 at 08:15:04AM +0100, Marc Zyngier wrote:
> On Mon, 20 May 2013 14:48:05 +0800, Chen Gang
> wrote:
> > Need 'EXPORT_SYMBOL_GPL(read_current_timer)' if build with allmodconfig.
> >
> > The related error:
> > ERROR: "read_current_timer" [lib/rbtree_test.ko] undefined!
> > ER
Hi Andy,
On Mon, May 20, 2013 at 08:52:34AM +0100, Andy Shevchenko wrote:
> On Fri, 2013-05-17 at 15:18 +0100, Will Deacon wrote:
> > On Fri, May 17, 2013 at 01:34:23PM +0100, Vinod Koul wrote:
> > > On Thu, May 16, 2013 at 04:35:53PM +0100, Will Deacon wrote:
> >
On Tue, May 21, 2013 at 05:06:52AM +0100, Chen Gang wrote:
> On 05/20/2013 05:56 PM, Will Deacon wrote:
> > Should be ok once the arch timer driver has moved exclusively to virtual
> > time. I'm also not sure we even need to implement read_current_timer() --
> > it&
On Tue, May 21, 2013 at 08:51:39AM +0100, Chen Gang wrote:
> On 05/21/2013 02:57 PM, Geert Uytterhoeven wrote:
> > On Tue, May 21, 2013 at 5:15 AM, Chen Gang wrote:
> >>> >> I think it would be better if we added a something like
> >>> >> CONFIG_HAVE_VGA_CONSOLE, which VGA_CONSOLE can then depend
access to already freed
> structures.
>
> The patch introduces specific error message for this, though it doesn't
> increase the counter of the failed tests.
>
> Signed-off-by: Andy Shevchenko
> Reported-by: Will Deacon
Thanks for persevering with this! Although this pat
On Tue, May 21, 2013 at 06:24:15PM +0100, Andy Shevchenko wrote:
> On Tue, May 21, 2013 at 6:11 PM, Will Deacon wrote:
> > Hi Andy,
> >
> > On Tue, May 21, 2013 at 01:33:17PM +0100, Andy Shevchenko wrote:
> >> When thread is going to be stopped we have to
that aren't running a
bleeding-edge libc-dev.
Signed-off-by: Will Deacon
---
arch/arm64/Kconfig | 1 +
arch/arm64/kernel/vmlinux.lds.S | 10 +-
scripts/sortextable.c | 5 +
3 files changed, 7 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/Kconfig b/
Hello,
On Mon, May 27, 2013 at 03:00:12AM +0100, Chen Gang wrote:
>
> When failure occurs at the last looping cycle (when 'i == 0'), it will
> print "bad PC value" instead of "(%08x) ", which needs additional 1
> byte.
>
> If not add 1 byte, the 'str' may be memory overflow.
>
>
> Signed-off-b
On Tue, May 28, 2013 at 11:48:20AM +0100, Po-Yu Chuang wrote:
> This bug was introduced in commit e651eab0.
> Some v4/v5 platforms failed to boot due to this.
>
> Signed-off-by: Po-Yu Chuang
> ---
> arch/arm/mm/mmu.c |4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a
On Tue, May 28, 2013 at 03:03:36PM +0100, Sricharan R wrote:
> On Tuesday 28 May 2013 06:35 PM, Will Deacon wrote:
> > On Tue, May 28, 2013 at 11:48:20AM +0100, Po-Yu Chuang wrote:
> >> This bug was introduced in commit e651eab0.
> >> Some v4/v5 platforms
On Wed, May 29, 2013 at 03:14:58AM +0100, Po-Yu Chuang wrote:
> Will,
> I guess nobody noticed this because the MMU of later v7 processors
> fetches page table
> from D-cache. It even doesn't need to clean pmd to PoU.
It does if it's UP. The walker is only guaranteed to read from L1 if you
have th
Hello,
On Wed, May 29, 2013 at 09:46:42AM +0100, richard -rw- weinberger wrote:
> On Wed, May 29, 2013 at 10:24 AM, Wang, Yalin
> wrote:
> > I have download the latest linux kernel code 3.9.4
> > And Compare with 3.4.0 kernel .
> >
> > It seems there is no change for this part ,
> > So it will
Hi Stefano,
On Wed, Mar 27, 2013 at 12:50:39PM +, Stefano Stabellini wrote:
> Check for the presence of PSCI before setting smp_ops, use PSCI if it is
> available.
>
> This is useful because at least when running on Xen it's possible to have a
> PSCI node for example on a Versatile Express or
On Wed, Mar 27, 2013 at 04:33:58PM +, Rob Herring wrote:
> On 03/27/2013 08:38 AM, Will Deacon wrote:
> > On Wed, Mar 27, 2013 at 12:50:39PM +, Stefano Stabellini wrote:
> >> +struct smp_operations __initdata psci_smp_ops = {
> >> + .smp_init_cpus
On Wed, Mar 27, 2013 at 04:23:15PM +, Stefano Stabellini wrote:
> OK, let's see if I can make this acceptable to you.
>
>
> Would you agree on a patch that moves virt_smp_ops out of mach-virt and
> renames them to psci_smp_ops (maybe to arch/arm/kernel/psci_smp_ops.c)?
Moving the code out of
On Wed, Mar 27, 2013 at 05:50:51PM +, Arnd Bergmann wrote:
> On Wednesday 27 March 2013, Will Deacon wrote:
> > The channel is common, sure, but I wouldn't expect the semantics of each
> > call to be identical between firmware implementations (going back to my
> > pr
On Thu, Mar 28, 2013 at 03:39:42PM +, Nicolas Pitre wrote:
> On Thu, 28 Mar 2013, Rob Herring wrote:
>
> > On 03/28/2013 09:51 AM, Nicolas Pitre wrote:
> > > On Thu, 28 Mar 2013, Stefano Stabellini wrote:
> > >
> > >> - the interface to bring up secondary cpus is different and based on
> > >>
dation check for ARM, so that events in the
OFF state are still considered when enable_on_exec is true.
Cc: Peter Zijlstra
Cc: Arnaldo Carvalho de Melo
Cc: Jiri Olsa
Reported-by: Sudeep KarkadaNagesha
Signed-off-by: Will Deacon
---
CC'ing some of the core guys here because I think this affec
Hi Ian,
On Tue, Mar 05, 2013 at 09:29:57AM +, Ian Campbell wrote:
> On Tue, 2013-03-05 at 08:08 +0000, Will Deacon wrote:
> > Cheers Rob, that was enough to reproduce for me. The problem is likely that
> > CONFIG_AEABI=n, so the ABI doesn't actually mandate even base regi
Hello,
On Thu, Mar 07, 2013 at 02:47:48AM +, Ming Lei wrote:
> Commit 14318efb(ARM: 7587/1: implement optimized percpu variable access)
> introduces arm's __my_cpu_offset to optimize percpu vaiable access,
> which really works well on hackbench test, but may cause __my_cpu_offset
> to return g
On Wed, Mar 06, 2013 at 05:20:32AM +, Stephen Boyd wrote:
> On 03/05/13 14:03, Stephen Boyd wrote:
> > On 03/05/13 00:34, Will Deacon wrote:
> >> I was looking at this the other day and wondered whether we could set
> >> HWCAP_IDIV in __v7_setup, depending
On Thu, Jul 26, 2012 at 02:44:14PM +0100, Will Deacon wrote:
> The asm-generic version of kvm_para.h is always exported, confusing the
> Kbuild wildcarding that tries to detect whether the source architecture
> is exporting the header, since asm-* matches the generic version.
>
On Thu, Aug 02, 2012 at 09:29:11PM +0100, Sam Ravnborg wrote:
> On Thu, Aug 02, 2012 at 05:19:20PM +0300, Avi Kivity wrote:
> > Can you get it reviewed by someone who is familiar with this? This is
> > probably the third fix for the this issue.
>
> IMO the patch is wrong.
> Any use of wildcards i
header. This also saves a word in each lock because
> we don't need the break_lock member anymore.
>
> Signed-off-by: Stephen Boyd
> ---
>
> It seems we define the arch_spin_is_contended() macro but we don't
> use it on SMP && PREEMPT kernels?
Thanks, I miss
hout this patch, building rand-enIHAOL results in:
>
> /tmp/ccwCsCXC.s: Assembler messages:
> /tmp/ccwCsCXC.s:49: Error: selected processor does not support ARM mode `bfi
> r3,r2,#0,#8'
>
> Signed-off-by: Arnd Bergmann
> Cc: Will Deacon
> Cc: Russell King
> ---
>
>
> Acked-by: Stephen Boyd
>
> I ran into this last week but forgot to send the patch. Thanks.
Looks good to me, thanks Arnd:
Acked-by: Will Deacon
On the topic of the timer stuff: Shinya/Stephen, did you have a chance to
look at the registration stuff that was proposed? I'm ha
On Wed, Aug 22, 2012 at 06:57:20PM +0100, Stephen Boyd wrote:
> On 08/22/12 10:49, Will Deacon wrote:
> > On the topic of the timer stuff: Shinya/Stephen, did you have a chance to
> > look at the registration stuff that was proposed? I'm happy to push it if
> > p
On Thu, Aug 23, 2012 at 12:51:01AM +0100, Tixy wrote:
> On Wed, 2012-08-22 at 18:41 +, Arnd Bergmann wrote:
> > On Wednesday 22 August 2012, Nicolas Pitre wrote:
> > > On Wed, 22 Aug 2012, Arnd Bergmann wrote:
> > > > >
> > > > > The ldrex/strex instructions are available on ARMv6. It's only
architectures which rely on the page flags being in a particular
state for fresh allocations can adjust the flags accordingly when a
page is freed into the pool.
Cc: Michal Hocko
Signed-off-by: Will Deacon
---
v2: Made ia64 and powerpc code a nop, moved hook to free_huge_page
arch/ia64/include
On Thu, Aug 23, 2012 at 06:11:56PM +0100, Michal Hocko wrote:
> On Thu 23-08-12 17:37:13, Will Deacon wrote:
> > The core page allocator ensures that page flags are zeroed when freeing
> > pages via free_pages_check. A number of architectures (ARM, PPC, MIPS)
> > rely on this
Hi Ralf,
On Wed, Sep 19, 2012 at 04:53:46PM +0100, Ralf Baechle wrote:
> On Wed, Sep 19, 2012 at 10:12:28AM +0100, Catalin Marinas wrote:
>
> > >> 5) void update_mmu_cache(struct vm_area_struct *vma,
> > >> unsigned long address, pte_t *ptep)
> > >
> > > Yes please.
> >
Hi Stephen,
On Thu, Sep 20, 2012 at 05:57:40PM +0100, Stephen Boyd wrote:
> The reset value of the BCR, BVR, WCR, and WVR registers are all
> UNKNOWN on ARMv7. Unfortunately, reset_ctrl_regs() clears these
> registers *after* enabling monitor mode, not before, and so some
> implementations may exp
Hello,
ARM recently moved to asm-generic/mutex-xchg.h for its mutex implementation
after our previous implementation was found to be missing some crucial
memory barriers. However, I'm seeing some problems running hackbench on
SMP platforms due to the way in which the MUTEX_SPIN_ON_OWNER code opera
On Tue, Aug 07, 2012 at 02:48:42PM +0100, Peter Zijlstra wrote:
> On Tue, 2012-08-07 at 12:56 +0100, Will Deacon wrote:
> > ARM recently moved to asm-generic/mutex-xchg.h for its mutex implementation
> > after our previous implementation was found to be missing some crucial
>
On Thu, Jul 12, 2012 at 12:57:08PM +0100, Michal Hocko wrote:
> On Thu 12-07-12 12:26:45, Will Deacon wrote:
> > Well, the comment in linux/page-flags.h does state that:
> >
> > * PG_arch_1 is an architecture specific page state bit. The generic code
> > * guarante
On Tue, Aug 07, 2012 at 06:14:36PM +0100, Nicolas Pitre wrote:
> On Tue, 7 Aug 2012, Will Deacon wrote:
> > The symptoms are that a bunch of hackbench tasks are left waiting on an
> > unlocked mutex and therefore never get woken up to claim it. I think this
> > boils down to t
On Tue, Aug 07, 2012 at 06:33:44PM +0100, Will Deacon wrote:
> What I think is happening is that B writes the -1 in __mutex_lock_common
> and, after seeing a NULL owner (C may not have set that yet), drops through
> to the:
>
> if (atomic_xchg(&lock->count, -1) == 1
Hi Cyril,
On Wed, Aug 01, 2012 at 12:04:36AM +0100, Cyril Chemparathy wrote:
> This series is a follow on to the RFC series posted earlier (archived at [1]).
> The major change introduced here is the modification to the kernel patching
> mechanism for phys_to_virt/virt_to_phys, in order to support
Hi Nicolas,
Thanks for the replies.
On Thu, Aug 09, 2012 at 06:12:15AM +0100, Nicolas Pitre wrote:
> On Tue, 7 Aug 2012, Will Deacon wrote:
> > diff --git a/kernel/mutex.c b/kernel/mutex.c
> > index a307cc9..27b7887 100644
> > --- a/kernel/mutex.c
> > +++ b/kernel/m
On Thu, Aug 09, 2012 at 05:57:33PM +0100, Nicolas Pitre wrote:
> On Thu, 9 Aug 2012, Nicolas Pitre wrote:
> > Yes, that looks fine. I'd remove that if (prev < 0) entirely though.
> > We'll just swap a 0 for a 0 if the count wasn't < 0, or a 0 for a 1 if
> > the mutex just got unlocked which is
On Thu, Aug 09, 2012 at 07:09:02PM +0100, Nicolas Pitre wrote:
> On Thu, 9 Aug 2012, Will Deacon wrote:
> > On Thu, Aug 09, 2012 at 05:57:33PM +0100, Nicolas Pitre wrote:
> > > On Thu, 9 Aug 2012, Nicolas Pitre wrote:
> > > diff --git a/include/asm-generic/mutex-xchg.h
the fastpath, ensuring that
any blocked waiters are woken up when the mutex is released.
Cc: Arnd Bergmann
Cc: Thomas Gleixner
Cc: Chris Mason
Cc: Ingo Molnar
Cc: Nicolas Pitre
Cc:
Signed-off-by: Will Deacon
---
Nico: Can I add your S-o-B to this please? Also, preliminary benchmarks
Hi Peter,
On Mon, Aug 13, 2012 at 09:15:04AM +0100, Peter Zijlstra wrote:
> On Thu, 2012-08-09 at 12:57 -0400, Nicolas Pitre wrote:
> >
> > In other words, I think this should look like this:
> >
> > diff --git a/include/asm-generic/mutex-xchg.h
> > b/include/asm-generic/mutex-xchg.h
> > index
On Mon, Aug 13, 2012 at 03:05:17PM +0100, Peter Zijlstra wrote:
> Acked-by: Peter Zijlstra
Thanks Peter.
> Will you carry this through the ARM tree or do you want me/Ingo to take
> it?
Please can you guys take it? The move to mutex-dec can go through the ARM
tree but it's probably best if you t
Hi Ben,
On Wed, Aug 15, 2012 at 05:29:26AM +0100, Ben Hutchings wrote:
> On Mon, 2012-08-13 at 15:13 -0700, Greg Kroah-Hartman wrote:
> > From: Greg KH
> >
> > 3.4-stable review patch. If anyone has any objections, please let me know.
> >
> > ----
On Wed, Aug 15, 2012 at 03:49:56PM +0100, Greg Kroah-Hartman wrote:
> > Will Deacon wrote:
> > > The additional patch should also be CC'd to stable and is sitting in -tip
> > > somewhere I believe, so it shouldn't be long before it does hit mainline.
> &g
On Wed, Aug 15, 2012 at 02:03:47PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +#ifdef CONFIG_AARCH32_EMULATION
> > +#define compat_thumb_mode(regs) \
> > + (((regs)->pstate & COMPAT_PSR_T_BIT))
> > +#else
> > +#define compat_thumb_mode(regs) (0)
> > +#e
On Wed, Aug 15, 2012 at 03:15:39PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +
> > +void elf_set_personality(int personality)
> > +{
> > + switch (personality & PER_MASK) {
> > + case PER_LINUX:
> > + clear_thread_flag(TIF_32BIT);
On Wed, Aug 15, 2012 at 03:34:04PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +asmlinkage int compat_sys_personality(compat_ulong_t personality)
> > +{
> > + int ret;
> > +
> > + if (personality(current->personality) == PER_LINUX32 &&
> > + per
On Wed, Aug 15, 2012 at 04:07:36PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +const struct user_regset_view *task_user_regset_view(struct task_struct
> > *task)
> > +{
> > +#ifdef CONFIG_AARCH32_EMULATION
> > + if (test_tsk_thread_flag(task, TIF_32BIT
On Wed, Aug 15, 2012 at 04:11:11PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > From: Will Deacon
> >
> > This patch adds support for the AArch64 performance counters.
> >
> > Signed-off-by: Will Deacon
&
On Wed, Aug 15, 2012 at 04:21:14PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +
> > +/*
> > + * Use compiler builtins for simple inline operations.
> > + */
> > +static inline unsigned long __ffs(unsigned long word)
> > +{
> > + return __builtin_ffsl(wo
;8
>From 92f785a58bbc378c194800a2b12360528bdf4c6f Mon Sep 17 00:00:00 2001
From: Will Deacon
Date: Mon, 13 Aug 2012 18:08:13 +0100
Subject: [PATCH] mm: hugetlb: add arch hook for clearing page flags before
entering pool
The core page allocator ensures that page flags are zeroed when freeing
pages via free_pa
Signed-off-by: Will Deacon
---
kernel/trace/trace_syscalls.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/kernel/trace/trace_syscalls.c b/kernel/trace/trace_syscalls.c
index 96fc733..4bc7d92 100644
--- a/kernel/trace/trace_syscalls.c
+++ b/kernel/trace
On Thu, Aug 16, 2012 at 06:25:27PM +0100, Michal Hocko wrote:
> On Thu 16-08-12 17:09:54, Will Deacon wrote:
> > On Wed, Aug 08, 2012 at 05:26:07PM +0100, Michal Hocko wrote:
> > > I guess the cleanest way is to hook into dequeue_huge_page_node and add
&g
On Thu, Aug 16, 2012 at 07:06:14PM +0100, Michal Hocko wrote:
> On Thu 16-08-12 18:34:59, Will Deacon wrote:
> > I just did it that way to match the flag clearing for normal pages. I can
> > move it into dequeue if you think it's worthwhile but in the worst case it
> >
On Mon, Jul 23, 2012 at 03:56:02PM +0100, Lee Jones wrote:
> On 23/07/12 15:50, Lee Jones wrote:
> >> I was wondering if I may bother you for some help. I've been having
> >> serious issues with testing the new mop500 sound system you have in your
> >> ASoC for-next branch. I've fixed a few issues
Hi Cyril,
Thanks for this, certainly looks like an interesting platform!
Of course, in order to perform any sort of sensible review, I'll need some
silicon to test it on :)
On Tue, Jul 24, 2012 at 02:09:02AM +0100, Cyril Chemparathy wrote:
> TI's scalable KeyStone II architecture includes suppor
On Tue, Jul 24, 2012 at 02:09:09AM +0100, Cyril Chemparathy wrote:
> This patch changes the membank structure's size field to phys_addr_t to allow
> banks larger than 4G.
This has already been fixed:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7465/1
Will
--
To unsubscribe f
On Thu, Aug 16, 2012 at 07:20:15PM +0100, Michal Hocko wrote:
> On Thu 16-08-12 17:09:54, Will Deacon wrote:
> > +static inline void arch_clear_hugepage_flags(struct page *page)
> > +{
> > + flush_dcache_page(page);
> > +}
> > +
>
> Why do we need t
On Fri, Aug 17, 2012 at 08:06:07AM +0100, Arnd Bergmann wrote:
> Sorry for the dumb question, but why do you even need PTRACE_GET_THREAD_AREA
> for 64 bit tasks? I thought the thread pointer is a GPR, or is this just
> for compat tasks?
The TLS is stored in a co-processor register which is read-on
On Mon, Aug 20, 2012 at 10:07:54AM +0100, Will Deacon wrote:
> On Fri, Aug 17, 2012 at 08:06:07AM +0100, Arnd Bergmann wrote:
> > Sorry for the dumb question, but why do you even need PTRACE_GET_THREAD_AREA
> > for 64 bit tasks? I thought the thread pointer is a GPR, or is this just
On Mon, Aug 20, 2012 at 09:10:59PM +0100, Arnd Bergmann wrote:
> On Monday 20 August 2012, Will Deacon wrote:
> > On Mon, Aug 20, 2012 at 10:07:54AM +0100, Will Deacon wrote:
> > > On Fri, Aug 17, 2012 at 08:06:07AM +0100, Arnd Bergmann wrote:
> > > > Sorry for the
On Mon, Jul 09, 2012 at 01:25:23PM +0100, Michal Hocko wrote:
> On Wed 04-07-12 15:32:56, Will Deacon wrote:
> > When allocating and returning clear huge pages to userspace as a
> > response to a fault, we may zero and return a mapping to a previously
> > dirtied physical re
Hi Hugh,
Cheers for looking at this.
On Tue, Jul 10, 2012 at 12:57:14AM +0100, Hugh Dickins wrote:
> On Mon, 9 Jul 2012, Will Deacon wrote:
> > On Mon, Jul 09, 2012 at 01:25:23PM +0100, Michal Hocko wrote:
> > > On Wed 04-07-12 15:32:56, Will Deacon wrote:
> > > >
On Tue, Jul 10, 2012 at 10:45:13AM +0100, Will Deacon wrote:
> On Tue, Jul 10, 2012 at 12:57:14AM +0100, Hugh Dickins wrote:
> > If I start to grep the architectures for non-empty flush_dcache_page(),
> > I soon find things in arch/arm such as v4_mc_copy_user_highpage
native SHMLBA is 64k but the compat (AArch32)
definition is 16k) to provide the correct semantics for compat IPC
system calls.
Cc: David S. Miller
Cc: Chris Zankel
Cc: Arnd Bergmann
Acked-by: Catalin Marinas
Signed-off-by: Will Deacon
---
arch/sparc/kernel/sys_sparc_64.c |2 +-
arch
All feedback and comments welcome (but please resist the urge to talk
about the name -- there's another thread for that on LKML :).
Will
Will Deacon (3):
ipc: add COMPAT_SHMLBA support
ipc: allow compat IPC version field parsing if
!ARCH_WANT_OLD_COMPAT_IPC
ipc: compat: use signed si
ize is represented as a compat_ssize_t, which we cast to the
native ssize_t type for the core IPC code.
Cc: Arnd Bergmann
Acked-by: Catalin Marinas
Signed-off-by: Will Deacon
---
include/linux/compat.h |4 ++--
ipc/compat.c |8
2 files changed, 6 insertions(+), 6 deleti
tions.
Cc: Chris Metcalf
Cc: Arnd Bergmann
Acked-by: Catalin Marinas
Signed-off-by: Will Deacon
---
include/linux/compat.h |1 +
ipc/compat.c |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 4e89039..9f68
On Tue, Jul 10, 2012 at 11:42:34AM +0100, Will Deacon wrote:
> On Tue, Jul 10, 2012 at 10:45:13AM +0100, Will Deacon wrote:
> > On Tue, Jul 10, 2012 at 12:57:14AM +0100, Hugh Dickins wrote:
> > > If I start to grep the architectures for non-empty flush_dcache_page(),
> >
Hi Andrew,
Thanks for picking these up.
On Wed, Jul 11, 2012 at 10:40:01PM +0100, Andrew Morton wrote:
> On Wed, 11 Jul 2012 16:32:20 +0100
> Will Deacon wrote:
> > diff --git a/include/linux/compat.h b/include/linux/compat.h
> > index 4e89039..9f68e90 100644
> > ---
On Thu, Jul 12, 2012 at 12:16:59PM +0100, Michal Hocko wrote:
> On Wed 11-07-12 18:48:02, Will Deacon wrote:
> > Just to confirm, the following quick hack at least results in the correct
> > flushing for me (on ARM):
> >
> >
> > diff --git a/mm/hugetlb.c b/mm/hug
On Fri, Jul 13, 2012 at 10:10:52AM +0100, shan kang wrote:
> For example, in the following scenario, Process2 may get the wrong value;
> Process1:
> mutex_lock(&lock);
> write data; (store operation)
> mutex_unlock(&lock);
>
> Process2:
> mutex_lock(&lock);
> read data; (load operation)
> mutex_u
able to test on architectures other than ARM.
Cheers,
Will
---8<---
>From a34cd86747ed2992974984bcfe1fe939ba31e1b2 Mon Sep 17 00:00:00 2001
From: Will Deacon
Date: Thu, 12 Jul 2012 17:56:40 +0100
Subject: [PATCH] ipc: use Kconfig options for
__ARCH_WANT_[COMPAT_]IPC_PARSE_VERSION
Rathe
On Mon, Jan 21, 2013 at 07:13:25PM +, Jiri Olsa wrote:
> On Thu, Jan 17, 2013 at 10:23:26AM +0000, Will Deacon wrote:
> > On Wed, Jan 16, 2013 at 01:30:33PM +, Jiri Olsa wrote:
> > > On Wed, Jan 16, 2013 at 01:13:18PM +, Will Deacon wrote:
> > > > On T
Hi Stephan,
On Tue, Jan 22, 2013 at 06:35:55PM +, Stephen Warren wrote:
> On 01/21/2013 10:52 PM, Hiroshi Doyu wrote:
> > Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.
>
> Will, is your for-next/perf branch stable; can I pull it into a branch
> destined for arm-soc? Background b
On Fri, Jan 18, 2013 at 05:15:46PM +, Mark Rutland wrote:
> Hello,
>
> As has been pointed out elsewhere, in my haste to fix this up I made a
> typo in the first patch, preventing it from building.
>
> Apologies for the confusion. I've created a new branch with a corrected
> and tested versio
On Sun, Oct 07, 2012 at 07:36:20AM +0100, Geert Uytterhoeven wrote:
> On Sun, Oct 7, 2012 at 1:15 AM, David Howells wrote:
> > (3) m68k turned out to have a header installation problem due to it
> > lacking a
> > kvm_para.h file.
>
> Sh also.
and arm64 iirc. It should also affect arm, but
Hi Arnd, Russell,
On Tue, Oct 09, 2012 at 07:40:24PM +0100, Arnd Bergmann wrote:
> On Tuesday 09 October 2012, Russell King - ARM Linux wrote:
> >
> > On Tue, Oct 09, 2012 at 05:22:54PM +0200, Arnd Bergmann wrote:
> > > Here are some patches that belong into your domain, I hope you can
> > > just
current_segment->memsz))
> + return -EINVAL;
>
> err = get_user(header, (__be32*)current_segment->buf);
> if (err)
> --
> 1.7.2.5
Thanks for this Aaro:
Acked-by: Will Deacon
Please stick it in the patch s
On Fri, Jan 11, 2013 at 09:36:02AM +, Catalin Marinas wrote:
> Hi Stephen,
>
> On Fri, Jan 11, 2013 at 04:46:17AM +, Stephen Rothwell wrote:
> > Today's linux-next merge of the signal tree got a conflict in
> > arch/arm64/kernel/signal32.c between commits 068f1bb36cf1 ("arm64:
> > compat:
On Mon, Jan 14, 2013 at 05:38:26PM +, Cong Ding wrote:
> On Mon, Jan 14, 2013 at 05:23:46PM +, Russell King - ARM Linux wrote:
> > On Mon, Jan 14, 2013 at 05:18:53PM +, Cong Ding wrote:
> > > the pointer cpu_pmu is used without null pointer dereference check, and is
> > > checked after
faulting pmd.
Cc: Andrea Arcangeli
Cc: Chris Metcalf
Signed-off-by: Steve Capper
Signed-off-by: Will Deacon
---
Hello again,
This is another fix for an issue that we discovered when porting THP to
ARM but it somehow managed to slip through the cracks.
Will
include/linux/huge_mm.h |3
On Mon, Oct 01, 2012 at 03:59:44PM +0100, Andrea Arcangeli wrote:
> Hi Will,
Hi Andrea, Kirill,
Thanks for the comments.
> On Mon, Oct 01, 2012 at 02:51:45PM +0100, Will Deacon wrote:
> > +void huge_pmd_set_accessed(struct mm_struct *mm, struct vm_area_stru
On Wed, Dec 26, 2012 at 01:53:15AM +, Cho KyongHo wrote:
> notice: v6 patch-set is rebased on next/iommu-exynos branch of
> linux-samsung.git. This patch-set does not include 2 patches (05 and 06
> patches in v5 patch-se) because they alread exist already in the branch.
Given that devicetree-
On Tue, Dec 11, 2012 at 11:09:47AM +, Cho KyongHo wrote:
> This commit adds System MMU nodes to DT of Exynos SoCs.
[Adding devicetree-discuss and some other IOMMU/DT people to CC]
> Signed-off-by: KyongHo Cho
> ---
> .../devicetree/bindings/arm/exynos/system-mmu.txt | 86
> a
On Tue, Jan 15, 2013 at 01:39:50PM +, Jiri Olsa wrote:
> hi,
Hi Jiri,
> adding support to predefine event ratios formulas so they could
> be used easily in perf.
>
> The formulas are handed in the config file with following format:
>
> set {
> events = {cycles,instructions,branch-
On Wed, Jan 16, 2013 at 01:30:33PM +, Jiri Olsa wrote:
> On Wed, Jan 16, 2013 at 01:13:18PM +0000, Will Deacon wrote:
> > On Tue, Jan 15, 2013 at 01:39:50PM +, Jiri Olsa wrote:
> > > The formula can currently contain any event from the set::events
> > > plus an
On Wed, Jan 16, 2013 at 12:14:59AM +, Pratik Patel wrote:
> On Mon, Jan 07, 2013 at 11:58:36AM +0000, Will Deacon wrote:
> > On Thu, Jan 03, 2013 at 06:06:43PM +, Pratik Patel wrote:
> > > Whats the advantage in using debugfs here?
> >
> > The main things I l
Hi Hiroshi,
On Wed, Jan 16, 2013 at 04:43:21PM +, Hiroshi Doyu wrote:
> Will Deacon wrote @ Wed, 16 Jan 2013 12:51:14 +0100:
> > Given that this information is not discoverable, it needs to be encoded
> > in the device tree, but where? I can see two approaches:
> >
&g
On Tue, Jul 03, 2012 at 08:20:30AM +0100, Paul Bolle wrote:
> On Mon, 2012-07-02 at 22:52 +0100, Will Deacon wrote:
> > Not sure I follow, but since this is all dead code I can't see any tests
> > failing without it.
>
> The purpose of that disclaimer is to stress t
On Sun, Jul 08, 2012 at 07:45:06PM +0100, Paul Bolle wrote:
> On Sun, 2012-07-08 at 17:03 +0100, Will Deacon wrote:
> > Please can you put this into the patch system?
>
> I'm not sure what the patch system is, but I am certain that I'm not
> allowed to put this
On Thu, Jan 03, 2013 at 06:06:43PM +, Pratik Patel wrote:
> On Sun, Dec 23, 2012 at 11:32:39AM +0000, Will Deacon wrote:
> > On Fri, Dec 21, 2012 at 10:18:28PM +, Pratik Patel wrote:
> > > What user interface do you plan to provide for the CTI? Maybe
> > > some
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