Hi Alex,
On Mon, 2021-02-15 at 18:32 +0100, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On 10/02/2021 10:19:50+0100, Steen Hegelund wrote:
> > Document the Sparx5 reset device driver bindings
> &
Hi Andrew and Kishon,
On Mon, 2021-02-15 at 15:07 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Mon, Feb 15, 2021 at 05:25:10PM +0530, Kishon Vijay Abraham I
> wrote:
> > Okay. Is it going to be some sort of manual
Hi David,
On Wed, 2021-02-10 at 15:32 -0800, David Miller wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> From: Steen Hegelund
> Date: Wed, 10 Feb 2021 09:52:53 +0100
>
> > Provide new phy configuration inter
Hi Kishon,
On Fri, 2021-02-12 at 17:02 +0530, Kishon Vijay Abraham I wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Hi Steen,
>
> On 10/02/21 2:22 pm, Steen Hegelund wrote:
> > Provide new phy configuration inter
ia_presets_25g
- mode_presets_25g
- media_presets_10g
- mode_presets_10g
- Removed these duplicate initializations:
- sparx5_sd25g28_params.cfg_rx_reserve_15_8
- sparx5_sd25g28_params.cfg_pi_en
- sparx5_sd25g28_params.cfg_cdrck_en
- sparx5_sd10g28_params
Document the Sparx5 ethernet serdes phy driver bindings.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Rob Herring
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 ++
1 file changed, 100
Provide new phy configuration interfaces for media type and speed that
allows allows e.g. PHYs used for ethernet to be configured with this
information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
drivers/phy/phy
Add Sparx5 serdes driver node, and enable it generally for all
reference boards.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 8
1 file changed, 8 insertions(+)
diff
ed the error handling to save the error code before jumping.
Steen Hegelund (3):
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: mchp: sparx5: add switch reset driver
arm64: dts: reset: add microchip sparx5 switch reset driver
.../bindings/reset/microchip,rst.yaml
and ARM A53 CPU and a few other subsystems are not touched by the reset.
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 130 +
3 files changed, 139
This provides reset driver support for the Microchip Sparx5 PCB134 and
PCB135 reference boards.
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b
Document the Sparx5 reset device driver bindings
The driver uses two IO ranges on sparx5 for access to
the reset control and the reset status.
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 55 +++
1 file changed, 55 insertions(+)
create mode
Hi Kishon,
On Tue, 2021-02-16 at 15:54 +0530, Kishon Vijay Abraham I wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Hi,
>
> On 16/02/21 2:07 pm, Steen Hegelund wrote:
> > Hi Andrew and Kishon,
> >
> &g
_presets_10g
- Removed these duplicate initializations:
- sparx5_sd25g28_params.cfg_rx_reserve_15_8
- sparx5_sd25g28_params.cfg_pi_en
- sparx5_sd25g28_params.cfg_cdrck_en
- sparx5_sd10g28_params.cfg_cdrck_en
Steen Hegelund (4):
dt-bindings: phy: Add sparx5-serdes bindi
Provide new phy configuration interfaces for media type and speed that
allows e.g. PHYs used for ethernet to be configured with this
information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
drivers/phy/phy-core.c | 30
Document the Sparx5 ethernet serdes phy driver bindings.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Rob Herring
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 ++
1 file changed, 100
Add Sparx5 serdes driver node, and enable it generally for all
reference boards.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 8
1 file changed, 8 insertions(+)
diff
Hi Philipp,
I just wanted to know if there are any outstanding items that you
would like me to handle, or you think that the driver is acceptable as
it is now?
BR
Steen
On Wed, 2021-01-20 at 09:19 +0100, Steen Hegelund wrote:
> This series provides the Microchip Sparx5 Switch Reset Dri
tents of the mchp_sparx5_reset_config function into
the probe function.
v1 -> v2 Removed debug prints
Changed the error handling to save the error code before jumping.
Steen Hegelund (3):
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: mchp: sparx5: add swit
Document the Sparx5 reset device driver bindings
The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 58 +++
1 file changed, 58 insertions
This provides reset driver support for the Microchip Sparx5 PCB134 and
PCB135 reference boards.
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b
and ARM A53 CPU and a few other subsystems are not touched by the reset.
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 151 +
3 files changed, 160
Hi Alex,
On Thu, 2021-02-25 at 21:40 +0100, Alexandre Belloni wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Hello,
>
> >
...
> > +static int mchp_sparx5_map_io(struct platform_device *pdev, char
> > *name,
> > +
sen (2):
dt-bindings: phy: Add sparx5-serdes bindings
arm64: dts: sparx5: Add Sparx5 serdes driver node
Steen Hegelund (2):
phy: Add ethernet serdes configuration option
phy: Add Sparx5 ethernet serdes PHY driver
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 +
arch/arm64/boo
Document the Sparx5 ethernet serdes phy driver bindings.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
Reviewed-by: Rob Herring
---
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 ++
1 file changed, 100 insertions(+)
create mode 100644
Documentation
Add Sparx5 serdes driver node, and enable it generally for all
reference boards.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b/arch
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media type and clock information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
include/linux/phy/phy-ethernet-serdes.h | 30 +
include
On Sun, 2020-12-20 at 16:55 -0800, Florian Fainelli wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On 12/16/2020 11:51 PM, Steen Hegelund wrote:
> > Document the Sparx5 switch device driver bindings
> >
> >
Hi Florian,
On Sun, 2020-12-20 at 16:58 -0800, Florian Fainelli wrote:
> >
> > The Sparx5 Switch chip register model can be browsed here:
> > Link:
> > https://microchip-ung.github.io/sparx-5_reginfo/reginfo_sparx-5.html
>
> Out of curiosity, what tool was used to generate the register
> infor
Hi Rob,
On Mon, 2020-12-21 at 14:40 -0700, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Thu, Dec 17, 2020 at 08:51:27AM +0100, Steen Hegelund wrote:
> > Document the Sparx5 switch device driver bindin
Hi Andrew,
On Sat, 2020-12-19 at 20:51 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> > + /* Create a phylink for PHY management. Also handles SFPs */
> > + spx5_port->phylink_config.dev = &spx5_port->ndev->dev
Hi Andrew,
On Sat, 2020-12-19 at 20:11 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Thu, Dec 17, 2020 at 08:51:28AM +0100, Steen Hegelund wrote:
>
> > +static struct sparx5_io_
o put this in the reset driver, but it was rejected. If the
reset is done at probe time, the SGPIO driver may already have
initialized state.
The switch core reset will then reset all SGPIO registers.
Ah, O.K. Dumb question. Why is the SGPIO driver a separate driver? It
sounds like it should be embedded inside this driver if it is sharing
hardware.
The same SGPIO block is present (with suitable scaling of the number of
SGPIOS) in all our switches, so this driver will be reused on all the
platforms when we get them upstreamed (or at least that is the plan).
Another option would be to look at the reset subsystem, and have this
driver export a reset controller, which the SGPIO driver can bind to.
Given that the GPIO driver has been merged, if this will work, it is
probably a better solution.
Alex has already commented on this, but this is probably the goal as I
understand.
Andrew
BR
Steen
---
Steen Hegelund
steen.hegel...@microchip.com
Hi Andrew,
On 22.12.2020 15:41, Andrew Lunn wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Tue, Dec 22, 2020 at 10:46:12AM +0100, Steen Hegelund wrote:
Hi Andrew,
On Sat, 2020-12-19 at 20:51 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL:
port));
+ }
Humm, interesting. This seems to control what other ports a port can
send to. That is one of the basic features you need for supporting
multiple bridges. So i assume your problems is you cannot partition
the MAC table?
No, the MAC table is VLAN aware.
Andrew
BR
Steen
---
Steen Hegelund
steen.hegel...@microchip.com
have the current DT.
Andrew
BR
Steen
---
Steen Hegelund
steen.hegel...@microchip.com
Document the Sparx5 ethernet serdes phy driver bindings.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 ++
1 file changed, 100 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/microchip
-serdes bindings
arm64: dts: sparx5: Add Sparx5 serdes driver node
Steen Hegelund (2):
phy: Add ethernet serdes configuration option
phy: Add Sparx5 ethernet serdes PHY driver
.../bindings/phy/microchip,sparx5-serdes.yaml | 100 +
arch/arm64/boot/dts/microchip/sparx5.dtsi |
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media type and clock information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
include/linux/phy/phy-ethernet-serdes.h | 30 +
include
Add Sparx5 serdes driver node, and enable it generally for all
reference boards.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b/arch
has protection so that the system busses, DDR controller, PCI-E
and ARM A53 CPU and a few other subsystems are not touched by the reset.
The Sparx5 Chip Register Model can be browsed at this location:
https://github.com/microchip-ung/sparx-5_reginfo
Steen Hegelund (3):
dt-bindings: reset
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 380281f312d8..6f0a21c362e3 100644
--- a/arch
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 52 +++
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml
b
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 145 +
3 files changed, 154 insertions(+)
create mode 100644 drivers/reset/reset-microchip-sparx5.c
On Thu, 2021-01-14 at 00:23 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> > +static int sparx5_switch_reset(struct reset_controller_dev *rcdev,
> > + unsigned long id)
> > +{
> > +
Changed the error handling to save the error code before jumping.
Steen Hegelund (3):
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: mchp: sparx5: add switch reset driver
arm64: dts: reset: add microchip sparx5 switch reset driver
.../bindings/reset/microchip,rst.yaml
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 380281f312d8..6f0a21c362e3 100644
--- a/arch
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 146 +
3 files changed, 155 insertions(+)
create mode 100644 drivers/reset/reset-microchip-sparx5.c
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 52 +++
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml
b
Hi Philipp,
On Thu, 2021-01-14 at 10:39 +0100, Philipp Zabel wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Hi Steen,
>
> On Wed, 2021-01-13 at 21:19 +0100, Steen Hegelund wrote:
> > Signe
w:
>
> On Wed, 2021-01-13 at 21:19 +0100, Steen Hegelund wrote:
> > Signed-off-by: Steen Hegelund
> > ---
> > drivers/reset/Kconfig | 8 ++
> > drivers/reset/Makefile | 1 +
> > drivers/reset/reset-microchip-sparx5.c | 145
&
.
Moved the contents of the mchp_sparx5_reset_config function into
the probe function.
v1 - v2: Removed debug prints
Changed the error handling to save the error code before jumping.
Steen Hegelund (3):
dt-bindings: reset: microchip sparx5 reset driver bindings
reset: mchp: sparx5
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 120 +
3 files changed, 129 insertions(+)
create mode 100644 drivers/reset/reset-microchip-sparx5.c
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 380281f312d8..4edbb9fcdce0 100644
--- a
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 59 +++
1 file changed, 59 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/microchip,rst.yaml
diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml
b
Hi Kishon,
On Fri, 2021-01-15 at 14:14 +0530, Kishon Vijay Abraham I wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> Hi,
>
> On 07/01/21 2:49 pm, Steen Hegelund wrote:
> > Provide a new ethernet phy confi
Hi Andrew,
On Tue, 2021-03-30 at 15:34 +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> > > > +static int sparx5_sd25g28_apply_params(struct sparx5_serdes_macro
> > > > *macro,
> > > > +
error handling.
Simplified the devm_reset_controller_register error handling.
Moved the contents of the mchp_sparx5_reset_config function into
the probe function.
v1 -> v2 Removed debug prints
Changed the error handling to save the error code before jumping.
Steen
Document the Sparx5 reset device driver bindings
The driver uses a syscon and an IO range on sparx5 for access to
the reset control and the reset status.
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 58 +++
1 file changed, 58 insertions
and ARM A53 CPU and a few other subsystems are not touched by the reset.
Signed-off-by: Steen Hegelund
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 146 +
3 files changed, 155
This provides reset driver support for the Microchip Sparx5 PCB134 and
PCB135 reference boards.
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi
b
Hi Jacub,
On Mon, 2021-03-15 at 10:26 -0700, Jakub Kicinski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Mon, 15 Mar 2021 16:04:24 +0100 Steen Hegelund wrote:
> > Hi Kishon, Vinod, Andrew, Jacub, and David,
>
Hi Vinod,
On Tue, 2021-03-16 at 10:23 +0530, Vinod Koul wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hello Steen,
>
> On 15-03-21, 16:04, Steen Hegelund wrote:
> > Hi Kishon, Vinod, Andrew, Jacub, and David,
&
Hi Rob,
On Mon, 2021-03-08 at 12:59 -0700, Rob Herring wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Wed, Mar 03, 2021 at 09:11:58AM +0100, Steen Hegelund wrote:
> > This provides reset driver support for the Micro
Simplified the devm_reset_controller_register error handling.
Moved the contents of the mchp_sparx5_reset_config function into
the probe function.
v1 -> v2 Removed debug prints
Changed the error handling to save the error code before jumping.
Steen Hegelund (3):
dt-bindi
that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.
Signed-off-by: Steen Hegelund
---
.../bindings/reset/microchip,rst.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset
ce and has the compatiple string
"microchip,sparx5-switch-reset".
Eventually the Sparx5 reset support will be removed from the Ocelot chip
reset driver.
Signed-off-by: Steen Hegelund
Reviewed-by: Alexandre Belloni
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 7 +--
1 file c
and ARM A53 CPU and a few other subsystems are not touched by the reset.
Signed-off-by: Steen Hegelund
Reviewed-by: Alexandre Belloni
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 146
- The SerDes driver changes its table based register operations into direct
register operations to avoid the large stack footprint reported by a
kernel robot.
- The 25g reset operation was changed slightly to make it equivalent to the
20g reset operation.
Steen Hegelund (1):
phy: Sparx5
Use direct register operations instead of a table of register
information to lower the stack usage.
Signed-off-by: Steen Hegelund
Reported-by: kernel test robot
---
drivers/phy/microchip/sparx5_serdes.c | 1869 +
1 file changed, 951 insertions(+), 918 deletions(-)
diff
Hi Philipp,
I just wanted to know if there are any outstanding items, or you think
that the driver is acceptable as it is now?
BR
Steen
On Tue, 2021-03-16 at 10:08 +0100, Steen Hegelund wrote:
> This series provides the Microchip Sparx5 Switch Reset Driver
>
> The Sparx5 Switch
to the
20g reset operation.
Steen Hegelund (1):
phy: Sparx5 Eth SerDes: Use direct register operations
drivers/phy/microchip/sparx5_serdes.c | 1869 +
1 file changed, 951 insertions(+), 918 deletions(-)
--
2.31.1
Use direct register operations instead of a table of register
information to lower the stack usage.
Signed-off-by: Steen Hegelund
Reported-by: kernel test robot
---
drivers/phy/microchip/sparx5_serdes.c | 1869 +
1 file changed, 951 insertions(+), 918 deletions(-)
diff
Hi Andrew,
On Mon, 2021-03-29 at 20:55 +0200, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Mon, Mar 29, 2021 at 10:14:38AM +0200, Steen Hegelund wrote:
> > Use direct register operations instead of a
syscon error handling.
Simplified the devm_reset_controller_register error handling.
Moved the contents of the mchp_sparx5_reset_config function into
the probe function.
v1 -> v2 Removed debug prints
Changed the error handling to save the error code before jumping.
that
allows the first client to perform the reset on behalf of all the Sparx5
component drivers.
Signed-off-by: Steen Hegelund
Reviewed-by: Rob Herring
---
.../bindings/reset/microchip,rst.yaml | 58 +++
1 file changed, 58 insertions(+)
create mode 100644 Documentation
and ARM A53 CPU and a few other subsystems are not touched by the reset.
Signed-off-by: Steen Hegelund
Reviewed-by: Alexandre Belloni
---
drivers/reset/Kconfig | 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-microchip-sparx5.c | 146
ce and has the compatiple string
"microchip,sparx5-switch-reset".
Eventually the Sparx5 reset support will be removed from the Ocelot chip
reset driver.
Signed-off-by: Steen Hegelund
Reviewed-by: Alexandre Belloni
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 7 +--
1 file c
/20210218161451.3489955-1-steen.hegel...@microchip.com/
- Sparx5 Reset Driver
Link:
https://lore.kernel.org/r/20210416084054.2922327-1-steen.hegel...@microchip.com/
Steen Hegelund (10):
dt-bindings: net: sparx5: Add sparx5-switch bindings
net: sparx5: add the basic sparx5 driver
net: sparx5
Document the Sparx5 switch device driver bindings
Signed-off-by: Steen Hegelund
Signed-off-by: Lars Povlsen
Signed-off-by: Bjarni Jonasson
---
.../bindings/net/microchip,sparx5-switch.yaml | 227 ++
1 file changed, 227 insertions(+)
create mode 100644
Documentation
This patch adds netdevs and phylink support for the ports in the switch.
It also adds register based injection and extraction for these ports.
Frame DMA support for injection and extraction will be added in a later
series.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off
DEV2G5 port module to support the lower speeds
(10/100/1000/2500Mbps). When a port needs to operate at lower speed and the
shadow DEV2G5 needs to be connected to its corresponding SerDes
Not all interface modes are supported in this series, but will be added at
a later stage.
Signed-off-by: Steen
This adds Sparx5 VLAN support.
Sparx5 has more VLAN features than provided here, but these will be added
in later series. For now we only add the basic L2 features.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off-by: Lars Povlsen
---
.../net/ethernet/microchip/sparx5
This adds the Sparx5 MAC tables: listening for MAC table updates and
updating on request.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off-by: Lars Povlsen
---
.../net/ethernet/microchip/sparx5/Makefile| 2 +-
.../microchip/sparx5/sparx5_mactable.c| 497
This adds SwitchDev support by hardware offloading the
software bridge.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off-by: Lars Povlsen
---
.../net/ethernet/microchip/sparx5/Makefile| 3 +-
.../microchip/sparx5/sparx5_mactable.c| 3 +
.../ethernet
This configures the Sparx5 calendars according to the bandwidth
requested in the Device Tree nodes.
It also checks if the total requested bandwidth is within the
specs of the detected Sparx5 models limits.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off-by: Lars Povlsen
This adds statistic counters for the network interfaces provided
by the driver. It also adds CPU port counters (which are not
exposed by ethtool).
This also adds support for configuring the network interface
parameters via ethtool: speed, duplex, aneg etc.
Signed-off-by: Steen Hegelund
Signed
/
- Sparx5 Reset Driver
Link:
https://lore.kernel.org/r/20210416084054.2922327-1-steen.hegel...@microchip.com/
- Serial GPIO Controller
Link:
https://lore.kernel.org/r/20201113145151.68900-1-lars.povl...@microchip.com/
Signed-off-by: Steen Hegelund
Signed-off-by: Lars Povlsen
Signed-off-by
Hi Leon,
On Sun, 2021-02-21 at 07:59 +0200, Leon Romanovsky wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> On Thu, Feb 18, 2021 at 05:14:49PM +0100, Steen Hegelund wrote:
> > Provide new phy configuration interfaces
wise
*/
So why are returning link up information?
Yes that was a bit of a hijacking of the function. I will remove that.
I also removed the dependency on this behaviour in the client driver in the
meantime.
I think a status function on the generic phy would be useful, but I will
take that as separate issue.
Andrew
Thanks for the comments.
BR
Steen
---
Steen Hegelund
steen.hegel...@microchip.com
ave some protocol level above
similar to Ethernet PCS which is the real determiner of link?
Yes - I think this is really only a debug feature. No need to force
this on the other PHY categories.
Andrew
Thanks for your comments, Andrew.
BR
Steen
---
Steen
On 19.11.2020 11:44, Vinod Koul wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 10-11-20, 15:49, Steen Hegelund wrote:
Add the Microchip Sparx5 ethernet serdes PHY driver for the 6G, 10G and 25G
interfaces available in the Sparx5 SoC
arm64: dts: sparx5: Add Sparx5 serdes driver node
Steen Hegelund (2):
phy: Add ethernet serdes configuration option
phy: Add Sparx5 ethernet serdes PHY driver
.../bindings/phy/microchip,sparx5-serdes.yaml | 283 ++
arch/arm64/boot/dts/microchip/sparx5.dtsi | 195 ++
drivers/phy/K
Document the Sparx5 ethernet serdes phy driver bindings.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
.../bindings/phy/microchip,sparx5-serdes.yaml | 283 ++
1 file changed, 283 insertions(+)
create mode 100644
Documentation/devicetree/bindings/phy/microchip
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media type and clock information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
include/linux/phy/phy-ethernet-serdes.h | 33 +
include
From: Lars Povlsen
Add Sparx5 serdes driver node, and enable it generally for all
reference boards.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 195 ++
1 file changed, 195 insertions(+)
diff --git a/arch/arm64
On 19.11.2020 11:37, Vinod Koul wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 10-11-20, 15:49, Steen Hegelund wrote:
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media
On 19.11.2020 15:43, Steen Hegelund wrote:
On 19.11.2020 11:37, Vinod Koul wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 10-11-20, 15:49, Steen Hegelund wrote:
Provide a new ethernet phy configuration structure, that
allow PHYs used for
On 19.11.2020 11:28, Vinod Koul wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On 10-11-20, 15:49, Steen Hegelund wrote:
Document the Sparx5 ethernet serdes phy driver bindings.
Rob ..?
Also pls cc devicet...@vger.kernel.org
Signed-off
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media type and clock information.
Signed-off-by: Lars Povlsen
Signed-off-by: Steen Hegelund
---
include/linux/phy/phy-ethernet-serdes.h | 30 +
include
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