On 19.11.2020 15:43, Steen Hegelund wrote:
On 19.11.2020 11:37, Vinod Koul wrote:
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On 10-11-20, 15:49, Steen Hegelund wrote:
Provide a new ethernet phy configuration structure, that
allow PHYs used for ethernet to be configured with
speed, media type and clock information.

Signed-off-by: Lars Povlsen <lars.povl...@microchip.com>
Signed-off-by: Steen Hegelund <steen.hegel...@microchip.com>
---
include/linux/phy/phy-ethernet-serdes.h | 49 +++++++++++++++++++++++++
include/linux/phy/phy.h                 |  4 ++
2 files changed, 53 insertions(+)
create mode 100644 include/linux/phy/phy-ethernet-serdes.h

diff --git a/include/linux/phy/phy-ethernet-serdes.h 
b/include/linux/phy/phy-ethernet-serdes.h
new file mode 100644
index 000000000000..04f496855b00
--- /dev/null
+++ b/include/linux/phy/phy-ethernet-serdes.h
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Microchip Sparx5 Ethernet SerDes driver
+ *
+ * Copyright (c) 2020 Microschip Inc
+ */
+#ifndef __PHY_ETHERNET_SERDES_H_
+#define __PHY_ETHERNET_SERDES_H_
+
+#include <linux/phy.h>
+
+enum ethernet_media_type {
+     ETH_MEDIA_DEFAULT,
+     ETH_MEDIA_SR,
+     ETH_MEDIA_DAC,
+};
+
+/**
+ * struct phy_configure_opts_eth_serdes - Ethernet SerDes
+ *
+ * This structure is used to represent the configuration state of a
+ * Ethernet Serdes PHY.
+ */
+struct phy_configure_opts_eth_serdes {
+     /**
+      * @speed
+      *
+      * Speed of the serdes interface in Mbps
+      */

Can we have this in kernel-doc style pls

I will update the documentation.
+     u32                        speed;
+
+     /**
+      * @media_type
+      *
+      * Specifies which media the serdes will be using
+      */
+     enum ethernet_media_type   media_type;
+
+     /**
+      * @clk
+      *
+      * Specifies the serdes clock in MHz
+      * Default: 0 will provide the highest supported clock.
+      */
+     u32                        clk;

Why not use std clk interface for this..?

I am not familiar with that.  Is that the max_link_rate in struct phy_attrs?

Now I get it: A DT clock node referred by the SerDes: Yes that should be
possible.  I will try that out...



+};
+
+#endif
+
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index e435bdb0bab3..78ecb375cede 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -18,6 +18,7 @@

#include <linux/phy/phy-dp.h>
#include <linux/phy/phy-mipi-dphy.h>
+#include <linux/phy/phy-ethernet-serdes.h>

struct phy;

@@ -49,11 +50,14 @@ enum phy_mode {
 *
 * @mipi_dphy:       Configuration set applicable for phys supporting
 *           the MIPI_DPHY phy mode.
+ * @eth_serdes: Configuration set applicable for phys supporting
+ *           the ethernet serdes.
 * @dp:              Configuration set applicable for phys supporting
 *           the DisplayPort protocol.
 */
union phy_configure_opts {
     struct phy_configure_opts_mipi_dphy     mipi_dphy;
+     struct phy_configure_opts_eth_serdes    eth_serdes;

Kishon, does this look okay for you..?

     struct phy_configure_opts_dp            dp;
};

--
2.29.2

--
~Vinod

BR
Steen

---------------------------------------
Steen Hegelund
steen.hegel...@microchip.com

BR
Steen

---------------------------------------
Steen Hegelund
steen.hegel...@microchip.com

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