On 7/18/2013 6:57 PM, Cristian Stoica wrote:
This patch removes redundant execution of the same test suite in cases
where alg and driver variables are the same (e.g. when alg_test is
called from tcrypt_test)
Signed-off-by: Cristian Stoica
Reviewed-by: Horia Geanta
---
crypto/testmgr.c |
On 4/15/2013 7:25 AM, Vakul Garg wrote:
The job ring init function creates a platform device for each job ring.
While the job ring is shutdown, e.g. while caam module removal, its
platform device was not being removed. This leads to failure while
reinsertion and then removal of caam module second
On 10/31/2017 10:00 AM, Herbert Xu wrote:
> On Tue, Oct 31, 2017 at 07:56:26AM +, Gilad Ben-Yossef wrote:
>> The IV was allocated on the stack in testmgr skcipher tests.
>> Since HW based tfm providers need to DMA the IV to the HW,
>> this leads to problems and is detected by the DMA-API debug
On 8/28/2015 11:04 AM, Wang Huan-B18965 wrote:
> Hi, Horia,
>
>> On 8/17/2015 6:42 AM, Wang Huan-B18965 wrote:
>>> Hi, Fabio,
>>
>> Please don't top post.
>>
>>>
>>> Based on the analysis and discussion, we prefer to use
>> ls1021a_defconfig and remove LS1021A from imx_v6_v7_defconfig.
>>
>> A
essors for arm64.
2nd patch updates the I/O accessors in the caam driver.
Horia Geantă (2):
arm64: add ioread64be and iowrite64be macros
crypto: caam - handle core endianness != caam endianness
arch/arm64/include/asm/io.h | 4 ++-
drivers/crypto/caam/caamhash.c| 5 +--
drivers/c
This will allow device drivers to consistently use io{read,write}XXbe
macros also for 64-bit accesses.
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/io.h b
,out}_{le,be}XX - are replaced with
generic io{read,write}[be]XX where possible (no 64-bit generic I/O).
Signed-off-by: Horia Geantă
Signed-off-by: Alex Porosanu
---
While patch takes into consideration the S/G format (struct sec4_sg_entry)
for i.MX7, I don't have a board so I haven't t
[bod: changed name prefix to "crypto: caam: Fix .."]
> [bod: added Fixes tag]
>
> Fixes: 67c2315def06 ("crypto: caam - add Queue Interface (QI) backend
> support")
Cc: # 4.12+
>
> Tested-by: Ryan Harkin
> Signed-off-by: Rui Miguel Silva
> Cc: "
On 1/24/2018 4:50 PM, Bryan O'Donoghue wrote:
> This patch-set enables CAAM on the i.MX7s and fixes a number of issues
> identified with the CAAM driver and hardware when TrustZone mode is
> enabled.
>
> The first block of patches are simple bug-fixes, followed by a second block
> of patches which
On 1/31/2018 4:00 AM, Bryan O'Donoghue wrote:
> From: Rui Miguel Silva
>
> Add CAAM device node to the i.MX7s device tree.
>
> Signed-off-by: Rui Miguel Silva
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: "Horia Gean
cd7a4a ("crypto: caam - enable instantiation of all RNG4 state
> handles")
>
> Reported-by: Ryan Harkin
> Cc: "Horia Geantă"
> Cc: Aymen Sghaier
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: "David S. Miller"
> Cc: Lukas Auer
> Cc: # 4.12+
Logan Gunthorpe
> Cc: Andy Shevchenko
> Cc: Horia Geantă
> Cc: Dan Douglass
> Cc: Herbert Xu
> Cc: "David S. Miller"
Reviewed-by: Horia Geantă
Thanks,
Horia
Logan Gunthorpe
> Cc: Andy Shevchenko
> Cc: Horia Geantă
> Cc: Dan Douglass
> Cc: Herbert Xu
> Cc: "David S. Miller"
Reviewed-by: Horia Geantă
Please get used to carrying Reviewed-bys from previous iterations when patches
stay the same:
https://lkml.kernel.org/r/vi
Add a note that it is perfectly legal to "abandon" a request object:
- call .init() and then (as many times) .update()
- _not_ call any of .final(), .finup() or .export() at any point in
future
Link: https://lkml.kernel.org/r/20180222114741.ga27...@gondor.apana.org.au
Signed-off
On 3/20/2018 10:50 AM, Kamil Konieczny wrote:
> On 20.03.2018 08:56, Horia Geantă wrote:
>> Add a note that it is perfectly legal to "abandon" a request object:
>> - call .init() and then (as many times) .update()
>> - _not_ call any of .final(), .finup() or .expor
or pointer.
>
> Cc: # 4.8+
> Fixes: 549bd8bc5987 ("crypto: talitos - Implement AEAD for SEC1 using
> HMAC_SNOOP_NO_AFEU")
> Reported-by: Horia Geantă
> Signed-off-by: Christophe Leroy
Tested-by: Horia Geantă
Thanks,
Horia
epmod: ERROR: Cycle detected: caamalg_desc -> dpaa2_caam -> caamhash_desc ->
error
depmod: ERROR: Cycle detected: caamalg_desc -> dpaa2_caam -> caamhash_desc ->
caamalg_desc
Reported-by: Stefan Wahren
Signed-off-by: Horia Geantă
---
arch/arm64/configs/defconfig | 3 ---
1 f
Fix a typo where size of RSA prime factor q is using the size of
prime factor p.
Cc: # 4.13+
Fixes: 52e26d77b8b3 ("crypto: caam - add support for RSA key form 2")
Fixes: 4a651b122adb ("crypto: caam - add support for RSA key form 3")
Reported-by: David Binderman
Signed-
add ablkcipher and authenc algorithms")
Reviewed-by: Horia Geantă
Signed-off-by: Wen Yang
---
Looks like previous versions, for some unknown reason, did not reach
the mailing lists.
Resending v3 with the addition of a 2nd Fixes and Reviewed-by tags,
cf. https://lkml.org/lkml/2019/2/11/383
gt; should be defined with DEFINE_DEBUGFS_ATTRIBUTE.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
Reviewed-by: Horia Geantă
Patch title nitpick:
s/crypto: caam -Replace/crypto: caam - Replace
Thanks,
Horia
gt; should be defined with DEFINE_DEBUGFS_ATTRIBUTE.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
Reviewed-by: Horia Geantă
Thanks,
Horia
On 2/4/2021 1:10 PM, Lee Jones wrote:
> Fixes the following W=1 kernel build warning(s):
>
> drivers/crypto/caam/caampkc.c:199: warning: expecting prototype for from a
> given scatterlist(). Prototype was for caam_rsa_count_leading_zeros() instead
>
> Cc: "Horia Geant
:87: warning: Function parameter or member
> 'fallback' not described in 'caam_ctx'
>
> Cc: "Horia Geantă"
> Cc: Aymen Sghaier
> Cc: Herbert Xu
> Cc: "David S. Miller"
> Cc: linux-cry...@vger.kernel.org
> Signed-off-by: Lee Jones
>
dingly,
and so will CAAM driver and DT node.
I don't have a board at hand, so patch below is not tested.
Horia
-- >8 --
Subject: [PATCH] clk: imx: vf610: add CAAM clock
According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to
gate CAAM ipg clock.
Signed-off-by: Hori
ore, these errors might be fatal error, so we shouldn’t
> requeue the request. This will just be pass back and forth between
> crypto-engine and hardware.
>
> Fixes: 6a89f492f8e5 ("crypto: engine - support for parallel requests based on
> retry mechanism")
> Signed-of
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote:
> @@ -3344,12 +3382,30 @@ static int caam_cra_init(struct crypto_skcipher *tfm)
> struct caam_skcipher_alg *caam_alg =
> container_of(alg, typeof(*caam_alg), skcipher);
> struct caam_ctx *ctx = crypto_skcipher_ctx(tfm);
> +
On 8/6/2020 7:36 PM, Andrei Botila (OSS) wrote:
> @@ -1790,7 +1792,9 @@ static inline int skcipher_crypt(struct
> skcipher_request *req, bool encrypt)
> if (!req->cryptlen)
> return 0;
>
> - if (ctx->fallback && xts_skcipher_ivsize(req)) {
> + if (ctx->fallback && (xt
On 8/10/2020 8:03 PM, Eric Biggers wrote:
> On Mon, Aug 10, 2020 at 05:33:39PM +0300, Horia Geantă wrote:
>> On 8/10/2020 4:45 PM, Herbert Xu wrote:
>>> On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote:
>>>>
>>>> With all due respect
On 8/10/2020 4:45 PM, Herbert Xu wrote:
> On Mon, Aug 10, 2020 at 10:20:20AM +, Van Leeuwen, Pascal wrote:
>>
>> With all due respect, but this makes no sense.
>
> I agree. This is a lot of churn for no gain.
>
I would say the gain is that all skcipher algorithms would behave the same
when i
On 11/26/2020 9:09 AM, Ard Biesheuvel wrote:
> On Wed, 25 Nov 2020 at 22:39, Iuliana Prodan wrote:
>>
>> On 11/25/2020 11:16 PM, Ard Biesheuvel wrote:
>>> On Wed, 25 Nov 2020 at 22:14, Iuliana Prodan (OSS)
>>> wrote:
From: Iuliana Prodan
Add the option to allocate the crypto
aamalg_qi2.c:87: warning: Function parameter or member
> 'xts_key_fallback' not described in 'caam_ctx'
> drivers/crypto/caam/caamalg_qi2.c:87: warning: Function parameter or member
> 'fallback' not described in 'caam_ctx'
>
> Cc: "Horia Ge
aamalg_qi2.c:87: warning: Function parameter or member
> 'xts_key_fallback' not described in 'caam_ctx'
> drivers/crypto/caam/caamalg_qi2.c:87: warning: Function parameter or member
> 'fallback' not described in 'caam_ctx'
>
> Cc: "Horia Ge
On 3/16/2021 7:02 PM, Ahmad Fatoum wrote:
> The Cryptographic Acceleration and Assurance Module (CAAM) is an IP core
> built into many newer i.MX and QorIQ SoCs by NXP.
>
> Its blob mechanism can AES encrypt/decrypt user data using a unique
> never-disclosed device-specific key. There has been mul
On 3/16/2021 7:01 PM, Ahmad Fatoum wrote:
> +int caam_encap_blob(struct caam_blob_priv *priv, const char *keymod,
> + void *input, void *output, size_t length)
> +{
> + u32 *desc;
> + struct device *jrdev = &priv->jrdev;
> + dma_addr_t dma_in, dma_out;
> + struct caa
On 3/16/2021 7:02 PM, Ahmad Fatoum wrote:
[...]
> +struct trusted_key_ops caam_trusted_key_ops = {
> + .migratable = 0, /* non-migratable */
> + .init = trusted_caam_init,
> + .seal = trusted_caam_seal,
> + .unseal = trusted_caam_unseal,
> + .exit = trusted_caam_exit,
> +};
caam
On 12/3/2020 3:35 AM, Iuliana Prodan (OSS) wrote:
> From: Iuliana Prodan
>
> This series removes CRYPTO_ALG_ALLOCATES_MEMORY flag and
> allocates the memory needed by the driver, to fulfil a
> request, within the crypto request object.
> The extra size needed for base extended descriptor, hw
> de
On 11/17/2019 2:57 AM, Herbert Xu wrote:
> On Sun, Nov 17, 2019 at 12:01:20AM +0100, Maciej S. Szmigiero wrote:
>>
>> If a reader (user space) task is frozen then it is no longer waiting
>> on this waitqueue - at least if I understand correctly how the freezer
>> works for user space tasks, that is
This patch set adds "dma-coherent" property to the crypto node
for NXP Layerscape platforms where the IP (CAAM) is configured
HW-coherent.
Horia Geantă (3):
arm64: dts: ls1046a: mark crypto engine dma coherent
arm64: dts: ls1043a: mark crypto engine dma coherent
arm64: dts: ls1
4: dts: ls1043a: add crypto node")
Link:
https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1...@arm.com
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043
4: dts: ls1012a: add crypto node")
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 7de6b376d792..9058cfa498
62a5 ("arm64: dts: add QorIQ LS1046A SoC support")
Link:
https://lore.kernel.org/linux-crypto/fe6faa24-d8f7-d18f-adfa-44fa0caa1...@arm.com
Reported-by: Greg Ungerer
Reported-by: Sascha Hauer
Tested-by: Sascha Hauer
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent,
mark accordingly the DT node.
Signed-off-by: Horia Geantă
---
arch/arm/boot/dts/ls1021a.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 007dd2bd0595
On 6/29/2014 5:52 AM, Randy Dunlap wrote:
On 06/23/14 05:15, Horia Geanta wrote:
Object-like macros are different than function-like macros:
https://gcc.gnu.org/onlinedocs/cpp/Object-like-Macros.html
https://gcc.gnu.org/onlinedocs/cpp/Function-like-Macros.html
They are not parsed correctly, gen
On 5/22/2014 7:03 PM, Nicolas Dichtel wrote:
Le 22/05/2014 17:10, Horia Geanta a écrit :
From: Lei Xu
Currently the sha256 icv truncation length is set to 96bit
while the length is defined as 128bit in RFC4868.
This may result in somer errors when working with other IPsec devices
with the stan
On 7/28/2014 1:11 PM, Cristian Stoica wrote:
> This patch inverts two if conditions and allows removal of one
> tab-stop in their code-blocks. Only white-space clean-up follows.
>
> Signed-off-by: Cristian Stoica
> ---
> crypto/testmgr.c | 498
> +++--
On 8/8/2014 2:27 PM, Cristian Stoica wrote:
> This patch inverts two if conditions to remove code blocks
> indentation. Several white space clean-ups follow.
>
> Signed-off-by: Cristian Stoica
> ---
> crypto/testmgr.c | 283
> ++-
> 1 file cha
On 6/15/2015 8:18 PM, Russell King - ARM Linux wrote:
> On Mon, Jun 15, 2015 at 06:33:17PM +0200, Jon Nettleton wrote:
>> Funny enough I tackled this problem over the weekend as well. My
>> approach was to switch the driver over to use the *_relaxed() io
>> functions and then special case the bits
On 8/12/2015 4:20 PM, Horia Geantă wrote:
> On 8/7/2015 1:03 PM, Alison Wang wrote:
>> Add Freescale LS1021A initial defconfig file.
>> The LS1021A SoC is a dual-core Cortex-A7 based processor.
>>
>> LS1021A has some special configure options against common V7 SOCs,
>
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h| 63 +
include/asm-generic/iomap.h | 8 ++
2 files changed, 71 insertions(+)
diff --git a
This will allow device drivers to consistently use io{read,write}XXbe
also for 64-bit accesses.
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/io.h b/arch
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Signed-off-by: Horia Geantă
---
arch/powerpc/kernel/iomap.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c
index
From: Cristian Stoica
The offset field is 13 bits wide; make sure we don't overwrite more than
that in the caam hardware scatter gather structure.
Signed-off-by: Cristian Stoica
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc.h | 2 +-
drivers/crypto/caam/sg_sw_sec4.
This basically adds support for ls1043a platform.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index d2c2909a4020..ff54c42e6e51 100644
--- a/drivers
possible
to deduce device endianness.
The performance drop due to the runtime detection is < 1.0%.
(An alternative implementation using function pointers has been tried,
but lead to a bigger performance drop.)
Thanks,
Horia
Cristian Stoica (1):
crypto: caam - fix offset field in hw sg entr
LS1043A has a SEC v5.4 security engine.
For now don't add rtic or sec_mon subnodes, since these features
haven't been tested yet.
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dt
n architectures that
don't override the io{read,write}{16,32}be accessors, but it will
work correctly on all architectures without them having to override
these accessors."
Suggested-by: Arnd Bergmann
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h | 8
1 file changed
take into consideration the
endianness of the core when displaying data. Add the necessary
glue code so the entries remain the same, but they are properly
read, regardless of the core and/or SEC endianness.
Note: pdb.h fixes only what is currently being used (IPsec).
Signed-off-by: Horia Geantă
From: Cristian Stoica
The offset field is 13 bits wide; make sure we don't overwrite more than
that in the caam hardware scatter gather structure.
Signed-off-by: Cristian Stoica
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc.h | 2 +-
drivers/crypto/caam/sg_sw_sec4.
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Signed-off-by: Horia Geantă
---
arch/powerpc/kernel/iomap.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c
index
- fix offset field in hw sg entries
Horia Geantă (6):
asm-generic/io.h: add io{read,write}64 accessors
arm64: add io{read,write}64be accessors
powerpc: add io{read,write}64 accessors
crypto: caam - handle core endianness != caam endianness
crypto: caam - add ARCH_LAYERSCAPE to supported archite
This will allow device drivers to consistently use io{read,write}XXbe
also for 64-bit accesses.
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/io.h b/arch
LS1043A has a SEC v5.4 security engine.
For now don't add rtic or sec_mon subnodes, since these features
haven't been tested yet.
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++
arch/arm64/boot/dts/freescale/fsl-ls1043a.dt
take into consideration the
endianness of the core when displaying data. Add the necessary
glue code so the entries remain the same, but they are properly
read, regardless of the core and/or SEC endianness.
Note: pdb.h fixes only what is currently being used (IPsec).
Signed-off-by: Horia Geantă
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h| 63 +
include/asm-generic/iomap.h | 8 ++
2 files changed, 71 insertions(+)
diff --git a
This basically adds support for ls1043a platform.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index d2c2909a4020..ff54c42e6e51 100644
--- a/drivers
Signed-off-by: Horia Geantă
Signed-off-by: Alex Porosanu
---
drivers/crypto/caam/Kconfig | 4 -
drivers/crypto/caam/caamhash.c| 5 +-
drivers/crypto/caam/ctrl.c| 125 +++
drivers/crypto/caam/desc.h| 7 +-
drivers/crypto/caam/desc_constr.h
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Michael Ellerman
Signed-off-by: Horia Geantă
---
arch/powerpc/kernel/iomap.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/powerpc/kernel/iomap.c b/arch
LS1043A has a SEC v5.4 security engine.
For now don't add rtic or sec_mon subnodes, since these features
haven't been tested yet.
Signed-off-by: Horia Geantă
---
To go into kernel 4.8 via crypto tree.
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++
arch/arm64/boot/dts
From: Cristian Stoica
The offset field is 13 bits wide; make sure we don't overwrite more than
that in the caam hardware scatter gather structure.
Signed-off-by: Cristian Stoica
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/desc.h | 2 +-
drivers/crypto/caam/sg_sw_sec4.
This will allow device drivers to consistently use io{read,write}XXbe
also for 64-bit accesses.
Acked-by: Catalin Marinas
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64
n architectures that
don't override the io{read,write}{16,32}be accessors, but it will
work correctly on all architectures without them having to override
these accessors."
Suggested-by: Arnd Bergmann
Acked-by: Arnd Bergmann
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h |
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Arnd Bergmann
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h| 63 +
include/asm-generic/iomap.h | 8 ++
2 files changed, 71
s has been tried,
but lead to a bigger performance drop.)
Thanks,
Horia
Cristian Stoica (1):
crypto: caam - fix offset field in hw sg entries
Horia Geantă (7):
asm-generic/io.h: allow barriers in io{read,write}{16,32}be
asm-generic/io.h: add io{read,write}64 accessors
arm64: add io{read,write
This basically adds support for ls1043a platform.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index d2c2909a4020..ff54c42e6e51 100644
--- a/drivers
On 5/4/2015 11:42 PM, Tadeusz Struk wrote:
> Hi Horia,
> On 05/04/2015 06:16 AM, Horia Geantă wrote:
>>> int (*sign)(struct pke_request *pkereq);
>>>>int (*verify)(struct pke_request *pkereq);
>>>>int (*encrypt)(struct pke_request *pkereq);
&g
On 5/1/2015 1:36 AM, Tadeusz Struk wrote:
> This patch set introduces a Public Key Encryption API.
> What is proposed is a new crypto type called crypto_pke_type
> plus new struct pke_alg and struct pke_tfm together with number
> of helper functions to register pke type algorithms and allocate
> tf
On 3/3/2015 8:50 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Hi,
>
> This patch series fix some CAAM compile and runtime warnings.
> The patches 0001 and 0002 are same as V1.
>
> I have tested this on fsl-p5020ds board using upstream 4.0.0-rc1+ with the
> below configs:
>
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> This commit is to avoid the below warnings:
>
> drivers/crypto/caam/sg_sw_sec4.h:88:12: warning:
> 'dma_map_sg_chained' defined but not used [-Wunused-function]
> static int dma_map_sg_chained(struct device *dev, s
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Fix rng_unmap_ctx's DMA_UNMAP size problem for caam_rng, else system would
> report the below calltrace during kexec boot:
>
> caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with different
> size [de
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> This can make sure we get a clean memory, else system would report
> the below warning:
I'd avoid using kzalloc, it's an overhead on the hot path. kmalloc can
be used with a bit of attention to detail, i.e. what par
On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote:
> From: Yanjiang Jin
>
> Add two missed dma_mapping_error() after dma_map_single().
>
> Signed-off-by: Yanjiang Jin
> ---
> drivers/crypto/caam/caamhash.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/crypto/ca
The export of fsl_guts_get_svr() is a left-over, it's currently used
only internally and users needing SoC information should use the generic
soc_device infrastructure.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/guts.c | 3 +--
include/linux/fsl/guts.h | 2 --
2 files chang
LS1028A has a SEC v5.0 compatible security engine.
Signed-off-by: Horia Geantă
---
Tested with "arm-smmu.disable_bypass=0" kernel boot parameter,
since ICID (Isolation Context ID, out of which ARM SMMU stream ID
is derived) programming and DT fix-up support hasn't been adde
d by these drivers in a common
location. The only existing possibility is error.c file (note that naming
doesn't help and should probably change).
Fixes: 52813ab24959 ("crypto: caam/qi2 - avoid double export")
Reported-by: Arnd Bergmann
Signed-off-by: Horia Geantă
---
Resending to fi
h the iommu map binding for fsl_mc
https://patchwork.kernel.org/patch/10594171
(for LS1088A a similar DT update is needed)
Thanks,
Horia
Horia Geantă (11):
bus: fsl-mc: add support for dpseci device type
Revert "staging: fsl-mc/dpio: remove couple of unused functions"
soc: fsl:
This reverts commit a211c8170b3c348353decb6e175c58a7814f218c.
(+ updated to account for driver being moved out of staging)
dpseci object will make use of these functions, thus it's time to add
them back.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/dpio/dpio-service.c
Add support for unkeyed and keyed (hmac) md5, sha algorithms.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig |4 +-
drivers/crypto/caam/caamalg_qi2.c | 1712 +
drivers/crypto/caam/caamalg_qi2.h | 16 +
3 files changed, 1731 insertions
(hmac({md5,sha*}),cbc({aes,des,des3_ede}))
echainiv(authenc(hmac({md5,sha*}),cbc({aes,des,des3_ede})))
authenc(hmac({md5,sha*}),rfc3686(ctr(aes))
seqiv(authenc(hmac({md5,sha*}),rfc3686(ctr(aes)))
Signed-off-by: Horia Geantă
---
drivers/crypto/Makefile |2 +-
drivers/crypto/caam/Kconfi
caam/qi2 driver will support ahash algorithms,
thus move ahash descriptors generation in a shared location.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 3 ++
drivers/crypto/caam/Makefile| 1 +
drivers/crypto/caam/caamhash.c | 79
Signed-off-by: Horia Geantă
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 5 +
include/linux/fsl/mc.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index 5d8266c6571f..4552b06fe601 100644
--- a/drivers/bus/fsl
On 10/6/2017 4:05 PM, Christophe Leroy wrote:
[...]
> @@ -1778,6 +1814,36 @@ static int common_nonsnoop_hash(struct talitos_edesc
> *edesc,
> if (is_sec1 && from_talitos_ptr_len(&desc->ptr[3], true) == 0)
> talitos_handle_buggy_hash(ctx, edesc, &desc->ptr[3]);
>
> + if (i
ctx.
>
> This patch removes this persistent mapping.
>
> Reported-by: Horia Geanta
> Fixes: 49f9783b0cea ("crypto: talitos - do hw_context DMA mapping outside the
> requests")
> Fixes: 37b5e8897eb5 ("crypto: talitos - chain in buffered data for ahash on
> SEC1"
Link: https://lkml.kernel.org/r/20180222114741.ga27...@gondor.apana.org.au
Signed-off-by: Horia Geantă
---
Documentation/crypto/devel-algos.rst | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/crypto/devel-algos.rst
b/Documentation/crypto/devel-algos.rst
index 66f50d3
On 3/16/2018 5:16 PM, Herbert Xu wrote:
> On Mon, Mar 05, 2018 at 12:39:45PM +0200, Horia Geantă wrote:
>> Even though it doesn't make too much sense, it is perfectly legal to:
>> - call .init() and then (as many times) .update()
>> - subseqently _not_ call any of .fi
On 3/19/2018 11:25 AM, Herbert Xu wrote:
> On Mon, Mar 19, 2018 at 06:39:50AM +0000, Horia Geantă wrote:
>>
>> The fact that there can be multiple requests in parallel (for a given tfm)
>> is a
>> different topic.
>> Each request object has its state in its ow
On 11/29/2016 10:09 AM, Herbert Xu wrote:
> On Tue, Nov 29, 2016 at 11:55:29AM +1100, Stephen Rothwell wrote:
>> Hi Herbert,
>>
>> After merging the crypto tree, today's linux-next build (arm
>> multi_v7_defconfig) failed like this:
>>
>> ERROR: "simd_skcipher_free" [arch/arm/crypto/aes-arm-ce.ko]
MA_ADDR_T_64BIT=y as suggested), could you also send a
patch removing CONFIG_SOC_LS1021A from imx_v6_v7_config?
>
> Thanks.
>
> Best Regards,
> Alison Wang
>
>> On Fri, Aug 14, 2015 at 2:06 PM, Horia Geantă
>> wrote:
>>
>>> Another thing:
>
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 44be1e03ed65..9b6e408cfa51 100644
--- a/arch/arm64/include/asm/io.h
On 8/7/2015 1:03 PM, Alison Wang wrote:
> Add Freescale LS1021A initial defconfig file.
> The LS1021A SoC is a dual-core Cortex-A7 based processor.
>
> LS1021A has some special configure options against common V7 SOCs,
> such as CONFIG_THUMB2_KERNEL, CONFIG_VMSPLIT_2G, CONFIG_VFP...
>
> Enable I2
This will allow device drivers to consistently use io{read,write}XXbe
macros in all cases.
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
I am planning to use the macros in a subsequent patch that revamps
the I/O accessors in drivers/crypto/caam/regs.h
Let me know if you prefer
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