On Wed, May 22, 2013 at 03:37:17AM +0100, Damian Hobson-Garcia wrote:
> Hello,
> On 2013/04/30 12:01, Damian Hobson-Garcia wrote:
> > Most architectures that define CONFIG_HAVE_DMA=y, have implementations for
> > both dma_alloc_attrs() and dma_free_attrs(). All achitectures that do
> > not define
On Thu, May 23, 2013 at 03:47:13AM +0100, Damian Hobson-Garcia wrote:
> Hi Catalin,
> On 2013/05/22 18:47, Catalin Marinas wrote:
> > On Wed, May 22, 2013 at 03:37:17AM +0100, Damian Hobson-Garcia wrote:
> >> Hello,
> >> On 2013/04/30 12:01, Damian Hobson-Garcia w
On Tue, May 14, 2013 at 12:49:51PM +0100, majianpeng wrote:
> If the scan-areas are adjacent,it can merge in order to reduce memomy.
Have you found any significant reduction in the memory size?
What we miss though is removing an area (and I found a use-case for it).
> +hlist_for_each_entry(a
On Sun, May 26, 2013 at 02:38:31PM +0100, Jiang Liu wrote:
> Use free_reserved_area() to poison initmem memory pages and kill
> poison_init_mem() on ARM64.
>
> Signed-off-by: Jiang Liu
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: linux-arm-ker...@lists.infradead.o
On Tue, May 28, 2013 at 02:05:02PM +0100, Will Deacon wrote:
> On Tue, May 28, 2013 at 11:48:20AM +0100, Po-Yu Chuang wrote:
> > This bug was introduced in commit e651eab0.
> > Some v4/v5 platforms failed to boot due to this.
> >
> > Signed-off-by: Po-Yu Chuang
> > ---
> > arch/arm/mm/mmu.c |
On Wed, May 22, 2013 at 08:32:20AM +0100, Chen Gang wrote:
> On 05/22/2013 08:45 AM, Chen Gang wrote:
> > On 05/21/2013 09:17 PM, Catalin Marinas wrote:
> >> On Mon, May 20, 2013 at 05:19:31AM +0100, Chen Gang wrote:
> >>>
> >>> Need add the default f
On Wed, Mar 27, 2013 at 11:44:03AM +, Chen Gang wrote:
> the error message:
> arch/arm64/kernel/early_printk.c: At top level:
> arch/arm64/kernel/early_printk.c:98:23: error: conflicting types for
> ‘early_console’
> In file included from arch/arm64/kernel/early_printk.c:20:0:
>
On Wed, Mar 27, 2013 at 05:18:53PM +, Nicolas Pitre wrote:
> On Wed, 27 Mar 2013, Catalin Marinas wrote:
>
> > So if the above works, the scheduler guys can mandate that little CPUs
> > are always first and for ARM it would be a matter of getting the right
> >
Hi Linus,
Please pull the arm64 fix below. Thanks.
The following changes since commit a937536b868b8369b98967929045f1df54234323:
Linux 3.9-rc3 (2013-03-17 15:59:32 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64.git
tags/a
On Tue, Aug 21, 2012 at 09:14:01PM +0100, Arnd Bergmann wrote:
> On Tuesday 21 August 2012, Catalin Marinas wrote:
> > > > +asmlinkage long sys_mmap(unsigned long addr, unsigned long len,
> > > > +unsigned long prot, unsigned long flags,
> >
On Wed, Aug 22, 2012 at 08:56:30AM +0100, Arnd Bergmann wrote:
> On Tuesday 21 August 2012, Catalin Marinas wrote:
> > As I understand, sys_mmap_pgoff can be used instead of sys_mmap2 on new
> > 32-bit architectures. But on 64-bit architectures we don't have
> > sys_mma
On Wed, Aug 22, 2012 at 01:27:14PM +0100, Arnd Bergmann wrote:
> On Wednesday 22 August 2012, Catalin Marinas wrote:
> > But what's more important - moving this wrapper to glibc causes issues
> > with the page size. We support both 4KB and 64KB pages on 64-bit systems
>
On Thu, Aug 23, 2012 at 07:46:30AM +0100, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Will Deacon wrote:
> > On Wed, Aug 15, 2012 at 03:34:04PM +0100, Arnd Bergmann wrote:
> > > On Tuesday 14 August 2012, Catalin Marinas wrote:
> > > > +asmlinkage int compat_
On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
> * Shilimkar, Santosh [120817 03:11]:
> > On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
> > wrote:
> > >
> > > On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > >
; > of code and allow removing list_for_each_continue_rcu().
>
> Could I get some comments on this patch?
Sorry, busy with other things and forgot about this.
Acked-by: Catalin Marinas
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On Mon, Aug 20, 2012 at 05:55:22PM +0100, Jim Meyering wrote:
> From: Jim Meyering
>
> strncpy NUL-terminates only when the length of the source string
> is smaller than the size of the destination buffer.
> The two other strncpy uses (just preceding) happen to be ok
> with the current TASK_COMM_
On Wed, Aug 15, 2012 at 03:34:04PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +#ifdef CONFIG_AARCH32_EMULATION
> > +#include
> > +
> > +#define AARCH32_KERN_SIGRET_CODE_OFFSET0x500
> > +
> > +extern
Hi Stephen,
On Mon, Sep 17, 2012 at 02:24:05AM +0100, Stephen Rothwell wrote:
> After merging the arm64 tree, today's linux-next build ()
> failed like this:
>
> arch/powerpc/kernel/sys_ppc32.c:146:17: error: conflicting types for
> 'compat_sys_sendfile'
> include/linux/compat.h:593:16: note: pr
patch covering both powerpc and sparc is to keep
it bisectable (and simple), otherwise kernel building may fail with
mismatched function declarations.
Signed-off-by: Catalin Marinas
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: David S. Miller
Cc: Alexander Viro
Cc:
may fail with mismatched
function declarations.
Signed-off-by: Catalin Marinas
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: David S. Miller
Cc: Alexander Viro
Cc: Chris Metcalf
Cc: Andrew Morton
---
Please note that the patch has only been compile-tested on sparc, t
but the huge_memory.c passes a pmd_t value. The patch changes
>> > the argument to the pmd_t * pointer.
>> >
>> > Signed-off-by: Catalin Marinas
>> > Signed-off-by: Steve Capper
>> > Signed-off-by: Will Deacon
>> > ---
>> > mm/huge
On 18 September 2012 19:13, Arnd Bergmann wrote:
> On Tuesday 18 September 2012, Catalin Marinas wrote:
>> @@ -229,7 +229,7 @@ COMPAT_SYS_SPU(sched_setaffinity)
>> COMPAT_SYS_SPU(sched_getaffinity)
>> SYSCALL(ni_syscall)
>> SYSCALL(ni_syscall)
>> -SY
off-by: Catalin Marinas
Acked-by: David S. Miller
Cc: Arnd Bergmann
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Alexander Viro
Cc: Andrew Morton
---
Changes from the first version:
- PowerPC fixed for 32-bit mode.
- PowerPC 64-bit __NR_sendfile routed to sys_sendfile() rather t
On Sun, Aug 05, 2012 at 04:10:34PM +0100, Cyril Chemparathy wrote:
> On 8/4/2012 4:39 AM, Russell King - ARM Linux wrote:
> > On Tue, Jul 31, 2012 at 07:04:36PM -0400, Cyril Chemparathy wrote:
> >> This series is a follow on to the RFC series posted earlier (archived at
> >> [1]).
> >> The major c
On Wed, Aug 08, 2012 at 06:07:39PM +0100, Michel Lespinasse wrote:
> kmemleak uses a tree where each node represents an allocated memory object
> in order to quickly find out what object a given address is part of.
> However, the objects don't overlap, so rbtrees are a better choice than
> prio tre
Hi Christopher,
On Thu, Aug 09, 2012 at 06:05:36PM +0100, Christopher Covington wrote:
> On 01/-10/-28163 02:59 PM, Catalin Marinas wrote:
> > +/*
> > + * Exception vectors.
> > + */
> > + .macro ventry label
> > + .align 7
> > + b \label
This patch introduces several assembly macros and definitions used in
the .S files across arch/arm64/ like IRQ disabling/enabling, together
with asm-offsets.c.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/asm-offsets.h |1 +
arch/arm64/include/asm
user space.
The sys_call_table is just an array defined in a C file and it contains
pointers to the syscall functions. The array is 4KB aligned to allow the
use of the ADRP instruction (longer range ADR) in entry.S.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include
state saving/restoring.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/fpsimd.h | 64 +++
arch/arm64/kernel/entry-fpsimd.S | 80
arch/arm64/kernel/fpsimd.c | 106
From: Will Deacon
This patch adds support for the AArch64 performance counters.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/perf_event.h | 22 +
arch/arm64/include/asm/pmu.h| 82 +++
arch/arm64/kernel/perf_event.c | 1368
From: Marc Zyngier
This patch adds udelay, memory and bit operations together with the
ksyms exports.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/bitops.h | 74
arch/arm64/include/asm
overlapping between user and kernel page tables.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/page.h| 67 +
arch/arm64/include/asm/pgalloc.h | 113
arch/arm64/mm/copypage.c | 34 +++
arch/arm64/mm/extable.c | 17
supported via the memory attributes register
(MAIR_EL1) and only affect the Normal Cacheable mappings.
This patch also adds the SPARSEMEM_VMEMMAP initialisation.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/memblock.h | 21 ++
arch/arm64/mm/init.c
register. The physical counter is also accessible from user space
allowing fast gettimeofday() implementation.
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/timex.h| 32
arch/arm64/kernel/time.c | 65
This patch introduces a few AArch64-specific header files together with
Kbuild entries for generic headers.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/Kbuild| 51 ++
arch/arm64/include/asm/barrier.h | 52 ++
arch/arm64
This patch updates the MAINTAINERS file for the AArch64 Linux kernel
port.
Signed-off-by: Catalin Marinas
---
MAINTAINERS |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 94b823f..6d7c5f4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
This patch adds Makefile and Kconfig files required for building an
AArch64 kernel.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/Kconfig | 261 ++
arch/arm64/Kconfig.debug | 27
arch/arm64
The patch adds the kernel booting and the initial setup code.
Documentation/arm64/booting.txt describes the booting protocol on the
AArch64 Linux kernel. This is subject to change following the work on
boot standardisation, ACPI.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
nt
(2^11) requirements.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/ptrace.h | 206 +++
arch/arm64/include/asm/stacktrace.h | 29 ++
arch/arm64/include/asm/traps.h | 30 ++
arch/arm64/kernel/entry.S |
Deacon
Signed-off-by: Catalin Marinas
---
Documentation/arm64/memory.txt| 69 +
arch/arm64/include/asm/memory.h | 144 +++
arch/arm64/include/asm/mmu.h | 27 ++
arch/arm64/include/asm/pgtable-2level-hwdef.h | 43
arch/arm64
From: Will Deacon
This patch adds support for loadable modules. Loadable modules are
loaded 64MB below the kernel image due to branch relocation restrictions
(see Documentation/arm64/memory.txt).
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/module.h
dropped once Peter Z's generic
mmu_gather patches are merged.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/tlb.h | 190 +
arch/arm64/include/asm/tlbflush.h | 123
arch/arm64/mm/
-by: Will Deacon
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/hardirq.h|5 +
arch/arm64/include/asm/smp.h| 69 +
arch/arm64/include/asm/spinlock.h | 199 +
arch/arm64/include/asm/spinlock_types.h | 38
From: Will Deacon
This patch adds VDSO support for 64-bit applications. The VDSO code is
currently used for sys_rt_sigreturn() and optimised gettimeofday()
(using the user-accessible generic counter).
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/vdso.h
This patch adds definitions for the ELF format, including personality
personality setting and EXEC_PAGESIZE. The are only two hwcap
definitions for 64-bit applications - HWCAP_FP and HWCAP_ASIMD.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/auxvec.h
From: Marc Zyngier
This patch adds the support for IRQ handling. The actual interrupt
controller will be part of a separate patch (going into
drivers/irqchip/).
Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/hardirq.h | 47
This patch adds support for signal handling. The sigreturn is done via
VDSO, introduced by a previous patch. The SA_RESTORER is still defined
as it is required for 32-bit (compat) support but it is not to be used
for 64-bit applications.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
This patch introduces the atomic, mutex and futex operations. Many
atomic operations use the load-acquire and store-release operations
which imply barriers, avoiding the need for explicit DMB.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/atomic.h | 306
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/device.h | 26
arch/arm64/include/asm/fb.h | 34 +
arch/arm64/include/asm/io.h | 263 +++
arch/arm64/kernel/io.c | 64 ++
arch/arm64/mm/ioremap.c | 84
deal with cache maintenance.
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/dma-mapping.h | 124
arch/arm64/mm/dma-mapping.c | 208 ++
2 files changed, 332 insertions(+), 0 deletions(-)
create mode 100644 arch/arm64/include
This patch add support for various user access functions. These
functions use the standard LDR/STR instructions and not the LDRT/STRT
variants in order to allow kernel addresses (after set_fs(KERNEL_DS)).
Signed-off-by: Will Deacon
Signed-off-by: Marc Zyngier
Signed-off-by: Catalin Marinas
This patch allows setting of the show_unhandled_signals variable via
/proc/sys/debug/exception-trace. The default value is currently 1
showing unhandled user faults (undefined instructions, data aborts) and
invalid signal stack frames.
Signed-off-by: Catalin Marinas
---
kernel/sysctl.c |2
ID_AA64AFR0_EL1 register).
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/mmu_context.h | 152 +
arch/arm64/include/asm/thread_info.h | 124 ++
arch/arm64/kernel/process.c | 416 ++
arch/arm64/mm/context.c
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/cache.h | 32
arch/arm64/include/asm/cacheflush.h | 209 ++
arch/arm64/include/asm/cachetype.h | 48 ++
arch/arm64/mm/cache.S | 279 +++
arch/arm64
elp/topic/com.arm.doc.genc010197a/index.html
- ABI (PCS, ELF, DWARF, C++):
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0059a/index.html
Regards,
Catalin
Catalin Marinas (23):
arm64: Assembly macros and definitions
arm64: Kernel booting and initialisation
arm64: Exception handling
ideally be pushed to firmware.
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
---
arch/arm64/include/asm/cputype.h | 49 +
arch/arm64/include/asm/proc-fns.h | 51 ++
arch/arm64/include/asm/processor.h | 174
arch/arm64/include
Hi Arnd,
On Wed, Aug 15, 2012 at 02:30:01PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +/*
> > + * TCR flags.
> > + */
> > +#define TCR_TxSZ(x)(((64 - (x)) << 16) | ((64 - (x)) << 0))
> > +#def
On Wed, Aug 15, 2012 at 04:23:21PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +
> > +void *module_alloc(unsigned long size)
> > +{
> > + return __vmalloc_node_range(size, 1,
On 9 August 2012 09:31, Catalin Marinas wrote:
> On Wed, Aug 08, 2012 at 06:07:39PM +0100, Michel Lespinasse wrote:
>> kmemleak uses a tree where each node represents an allocated memory object
>> in order to quickly find out what object a given address is part of.
>> Howev
On Wed, Aug 15, 2012 at 05:34:46PM +0100, Geert Uytterhoeven wrote:
> On Wed, Aug 15, 2012 at 3:30 PM, Arnd Bergmann wrote:
> >> +#define TCR_IPS_40BIT(2 << 32)
>
> By default, constants are int, i.e. 32-bit. So you must write
>
> 2ULL << 32
>
> >> +#define TCR_ASID16
Hi Olof,
On Wed, Aug 15, 2012 at 12:06:45AM +0100, Olof Johansson wrote:
> On Tue, Aug 14, 2012 at 06:52:03PM +0100, Catalin Marinas wrote:
> > +Before jumping into the kernel, the following conditions must be met:
> > +
> > +- Quiesce all DMA capable devices so tha
On 15 August 2012 20:03, Olof Johansson wrote:
> On Wed, Aug 15, 2012 at 06:37:11PM +0100, Catalin Marinas wrote:
>> If we add machine_desc structure back, we could print which machine was
>> matched. But so far I try to keep the SoC code to a minimum and just do
>> the pro
On Wed, Aug 15, 2012 at 02:20:02PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +The AArch64 exception model is made up of a number of exception levels
> > +(EL0 - EL3), with EL0 and EL1 having a secure and a non-secure
> > +
On Thu, Aug 16, 2012 at 02:00:32PM +0100, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Will Deacon wrote:
> > > > +
> > > > +#include
> > > > +#include
> > > > +#include
> > > > +
> > > > +#ifdef CONFIG_SMP
> > > > +arch_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned = {
> > > >
On Wed, Aug 15, 2012 at 09:53:07PM +0100, Michel Lespinasse wrote:
> On Wed, Aug 15, 2012 at 9:36 AM, Catalin Marinas
> wrote:
> > Couldn't test it because the patch got messed up somewhere on the
> > email path (tabs replaced with spaces). Is there a Git tree I can grab
&g
On Mon, Jul 23, 2012 at 06:48:12PM +0100, Stephen Warren wrote:
> On 07/08/2012 03:18 AM, Catalin Marinas wrote:
> > On Fri, Jul 06, 2012 at 10:32:54PM +0100, Stephen Warren wrote:
> >> On 07/06/2012 03:05 PM, Catalin Marinas wrote:
> >>> The patch adds the kernel
On Tue, Jul 24, 2012 at 02:09:03AM +0100, Cyril Chemparathy wrote:
> From: Vitaly Andrianov
>
> The current phys-to-virt patching mechanism is broken on PAE machines with
> 64-bit physical addressing. This patch disables the patching mechanism in
> such configurations.
It may be broken, I don't
On Tue, Jul 24, 2012 at 02:09:25AM +0100, Cyril Chemparathy wrote:
> Keystone platforms have their physical memory mapped at an address outside the
> 32-bit physical range. A Keystone machine with 16G of RAM would find its
> memory at 0x08 - 0x0b.
Ah, so the patches start to make
On Tue, Jul 24, 2012 at 02:09:04AM +0100, Cyril Chemparathy wrote:
> This patch applies to PAGE_MASK, PMD_MASK, and PGDIR_MASK, where forcing
> unsigned long math truncates the mask at the 32-bits. This clearly does bad
> things on PAE systems.
>
> This patch fixes this problem by defining these
On Tue, Jul 24, 2012 at 02:09:05AM +0100, Cyril Chemparathy wrote:
> This patch fixes up the types used when converting back and forth between
> physical and virtual addresses.
>
> Signed-off-by: Vitaly Andrianov
> Signed-off-by: Cyril Chemparathy
> ---
> arch/arm/include/asm/memory.h | 17 ++
On Tue, Jul 24, 2012 at 11:55:30AM +0100, Cyril Chemparathy wrote:
> On 7/24/2012 6:37 AM, Catalin Marinas wrote:
> > On Tue, Jul 24, 2012 at 02:09:05AM +0100, Cyril Chemparathy wrote:
> >> This patch fixes up the types used when converting back and forth between
> &g
On Mon, Jul 23, 2012 at 09:52:22PM +0100, Christopher Covington wrote:
> Hi Catalin and Stephen,
>
> Catalin Marinas - July 8, 2012, 9:18 a.m.
> > On Fri, Jul 06, 2012 at 10:32:54PM +0100, Stephen Warren wrote:
> >
> >> Also, on Tegra at least and perhaps OMAP too,
On Fri, Jul 20, 2012 at 03:22:04PM +0100, Christopher Covington wrote:
> On 01/-10/-28163 02:59 PM, Catalin Marinas wrote:
> > This patch introduces several assembly macros and definitions used in
> > the .S files across arch/aarch64/ like IRQ disabling/enabling, together
> &g
On Tue, Jul 24, 2012 at 07:53:16PM +0100, Arnd Bergmann wrote:
> On Tuesday 24 July 2012, Catalin Marinas wrote:
> > On Mon, Jul 23, 2012 at 09:52:22PM +0100, Christopher Covington wrote:
> > > Catalin Marinas - July 8, 2012, 9:18 a.m.
> > > > On Fri, Jul 06, 201
On Tue, Jul 24, 2012 at 08:42:28PM +0100, Christopher Covington wrote:
> On 01/-10/-28163 02:59 PM, Catalin Marinas wrote:
> > +- Architected timers
> > + CNTFRQ must be programmed with the timer frequency.
> > + If entering the kernel at EL1, CNTHCTL_EL2 must have EL1PCT
On Fri, Aug 17, 2012 at 10:04:52AM +0100, Tony Lindgren wrote:
> * Catalin Marinas [120814 10:57]:
> > The virtual memory layout is described in
> > Documentation/arm64/memory.txt. This patch adds the MMU definitions for
> > the 4KB and 64KB translation table configurations
On Fri, Aug 17, 2012 at 10:21:33AM +0100, Tony Lindgren wrote:
> * Catalin Marinas [120814 11:05]:
> > This patch adds SMP initialisation and spinlocks implementation for
> > AArch64. The spinlock support uses the new load-acquire/store-release
> > instructions to avoid e
On Fri, Aug 17, 2012 at 10:32:13AM +0100, Tony Lindgren wrote:
> * Catalin Marinas [120814 11:00]:
> > --- /dev/null
> > +++ b/arch/arm64/Kconfig
> > @@ -0,0 +1,261 @@
> > +config ARM64
> > + def_bool y
> > + select OF
> > + select OF_EARLY_FLAT
On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
> > +The boot loader is expected to enter the kernel on each CPU in the
> > +following manner:
> > +
> > +- The primary CPU must jump directly
On Fri, Aug 17, 2012 at 10:57:20AM +0100, Santosh Shilimkar wrote:
> On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
> > +ENTRY(__cpuc_flush_dcache_all)
>
> We have discussed the need of cache maintenance by
> level kind of API for ARMv7 (A15).
>
> Shouldn
On Fri, Aug 17, 2012 at 11:06:11AM +0100, Santosh Shilimkar wrote:
> On Tuesday 14 August 2012 11:22 PM, Catalin Marinas wrote:
> > This patch contains the initialisation of the memory blocks, MMU
> > attributes and the memory map. Only five memory types are defined:
> > Devi
On Fri, Aug 17, 2012 at 12:20:40PM +0100, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Nicolas Pitre wrote:
> > > +3. Decompress the kernel image
> > > +--
> > > +
> > > +Requirement: OPTIONAL
> > > +
> > > +The AArch64 kernel does not provide a decompressor and th
On Fri, Aug 17, 2012 at 02:13:59PM +0100, Tony Lindgren wrote:
> * Shilimkar, Santosh [120817 03:11]:
> > On Fri, Aug 17, 2012 at 3:35 PM, Catalin Marinas
> > wrote:
> > >
> > > On Fri, Aug 17, 2012 at 10:41:10AM +0100, Santosh Shilimkar wrote:
> > >
On Wed, Aug 15, 2012 at 02:47:00PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +pgd_t *pgd_alloc(struct mm_struct *mm)
> > +{
> > + pgd_t *new_pgd;
> > +
> > + new_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL,
On Wed, Aug 15, 2012 at 02:53:01PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +#define THREAD_SIZE_ORDER 1
> > +#define THREAD_SIZE8192
> > +#define THREAD_START_SP(THREAD_SIZE - 16)
>
> THR
On Wed, Aug 15, 2012 at 01:10:43AM +0100, Olof Johansson wrote:
> On Tue, Aug 14, 2012 at 06:52:09PM +0100, Catalin Marinas wrote:
>
> > diff --git a/arch/arm64/include/asm/cputype.h
> > b/arch/arm64/include/asm/cputype.h
> > new file mode 100644
> > index
On Wed, Aug 15, 2012 at 02:56:05PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > --- /dev/null
> > +++ b/arch/arm64/include/asm/procinfo.h
...
> > +struct proc_info_list {
> > + unsigned intcpu_val;
> > +
On Mon, Aug 20, 2012 at 09:47:07PM +0100, Arnd Bergmann wrote:
> On Monday 20 August 2012, Catalin Marinas wrote:
> > > > --- /dev/null
> > > > +++ b/arch/arm64/mm/proc-syms.c
> > ...
> > > > +EXPORT_SYMBOL(__cpuc_flush_kern_all);
On Wed, Aug 15, 2012 at 05:16:00PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
> > +static struct dma_map_ops arm64_swiotlb_dma_ops = {
> > + .alloc = arm64_swiotlb_alloc_coherent,
> > + .free = arm64_swiotlb_free_coherent,
On Wed, Aug 15, 2012 at 01:40:06AM +0100, Olof Johansson wrote:
> On Tue, Aug 14, 2012 at 06:52:15PM +0100, Catalin Marinas wrote:
> > +static inline struct dma_map_ops *get_dma_ops(struct device *dev)
> > +{
> > + if (unlikely(!dev) || !dev->archdata.dma_ops)
> &
On Thu, Aug 16, 2012 at 01:37:53PM +0100, Arnd Bergmann wrote:
> On Thursday 16 August 2012, Will Deacon wrote:
> > > This looks wrong: PER_LINUX/PER_LINUX32 decides over the output of the
> > > uname system call, while TIF_32BIT decides over the instruction set
> > > when returning to user space.
On Wed, Aug 15, 2012 at 03:22:16PM +0100, Arnd Bergmann wrote:
> On Tuesday 14 August 2012, Catalin Marinas wrote:
>
> > +
> > +/* This matches struct stat64 in glibc2.1, hence the absolutely
> > + * insane amounts of padding around dev_t's.
> > + * Note:
On Tue, Aug 21, 2012 at 07:17:19PM +0100, Geert Uytterhoeven wrote:
> On Tue, Aug 21, 2012 at 6:06 PM, Catalin Marinas
> wrote:
> > But I can see on x86 that it always reports x86_64 even if the task is
> > x86_32.
>
> Really?
>
> $ uname -m
> x86_64
> $ li
Arnd,
On Mon, Jul 09, 2012 at 04:32:11PM +0100, Arnd Bergmann wrote:
> We have a lot of reviewers that are familiar with the 32 bit code, so
> I think the main strategy should be to spot duplicate code early
> and make sure we deal with it individually. Examples for this are
> probably the impleme
On Sat, Jul 07, 2012 at 10:30:58AM +0100, Mikael Pettersson wrote:
> Catalin Marinas writes:
> > Compilation requires a new aarch64-none-linux-gnu-
> > toolchain (http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01694.html).
>
> Where are the corresponding binutils patches
On Tue, Jul 10, 2012 at 08:10:23AM +0100, Ingo Molnar wrote:
> * Arnd Bergmann wrote:
> > On Saturday 07 July 2012, Olof Johansson wrote:
> > > > ARM introduced AArch64 as part of the ARMv8 architecture
> > >
> > > With the risk of bikeshedding here, but I find the name awkward. How
> > > about j
On Tue, Jul 10, 2012 at 04:33:58PM +0100, Alan Cox wrote:
> > In the AArch32 kernel port many implementation decisions newer
> > architectures were made in a way that preserves backwards compatibility
> > to over 15 years ago (and for *good* reasons, ARMv4 hardware is still in
> > use). But keeping
(just replying to a couple of points now, I'll follow up tomorrow)
On Tue, Jul 10, 2012 at 09:35:27PM +0100, Ingo Molnar wrote:
> Do you *really* think that all of the 32-bit ARM code should
> essentially be thrown away when going to 64-bit ARM, that
> patches can only touch arch/arm64/ + driver
On Tue, Jul 10, 2012 at 10:19:38PM +0100, Arnd Bergmann wrote:
> On Tuesday 10 July 2012, Ingo Molnar wrote:
> > Do you really think that all of the 32-bit ARM code should
> > essentially be thrown away when going to 64-bit ARM, that
> > patches can only touch arch/arm64/ + drivers/ or the highwa
On Tue, Jul 10, 2012 at 10:44:29PM +0100, Catalin Marinas wrote:
> On Tue, Jul 10, 2012 at 09:35:27PM +0100, Ingo Molnar wrote:
> > Do you *really* think that all of the 32-bit ARM code should
> > essentially be thrown away when going to 64-bit ARM, that
> > patches can
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