.
efcac658: powerpc: Per process DSCR + some fixes (try#4)
Signed-off-by: Anshuman Khandual
---
arch/powerpc/kernel/process.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b4cc7be..fe3f682 100644
--- a/arch/powerpc/kernel
. In case of mfspr instruction,
just emulate the instruction. In case of mtspr instruction, set the
thread based dscr_inherit bit and also enable the facility through FSCR.
All user SPR based mfspr instruction will be emulated till one user SPR
based mtspr has been executed.
Signed-off-by: Anshuman
PACA_DSCR offset macro tracks dscr_default element in the paca
structure. Better change the name of this macro to match that
of the data element it tracks. Makes the code more readable.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/kernel/asm-offsets.c | 2 +-
arch/powerpc/kernel
On 03/19/2015 04:20 AM, Michael Neuling wrote:
> On Thu, 2015-03-19 at 09:45 +1100, Michael Neuling wrote:
>> On Wed, 2015-03-18 at 13:53 +0100, Ulrich Weigand wrote:
>>> Michael Neuling wrote on 23.02.2015 05:51:50:
>>>
Sorry for the slow response.
>>>
>>> Same here :-(
>>
>> I'm going to br
On 04/21/2015 08:11 PM, Ulrich Weigand wrote:
> Anshuman Khandual wrote on 21.04.2015
> 06:55:24:
>
>> Changed ELF core note sections
>> --
>> These core note sections need to be changed to accommodate the in
>> transaction ptrace
On 03/30/2015 07:45 AM, Joel Stanley wrote:
> The kernel has orderly_poweroff which allows the kernel to initiate a
> graceful shutdown of userspace, by running /sbin/poweroff. This adds
> orderly_reboot that will cause userspace to shut itself down by calling
> /sbin/reboot.
>
> This will be used
On 04/01/2015 08:47 AM, Joel Stanley wrote:
> Hi Andrew,
>
> On Wed, Apr 1, 2015 at 9:09 AM, Andrew Morton
> wrote:
>> > On Mon, 30 Mar 2015 12:45:32 +1030 Joel Stanley wrote:
>> >
>>> >> The kernel has orderly_poweroff which allows the kernel to initiate a
>>> >> graceful shutdown of userspace
Hello,
perf report is not showing up the branch stack sample results in the
from_symbol ---> to_symbol format even if the perf.data file has got
the samples (through 'perf record -b ' session). Perf report
still displays the generic event based relative symbol classification
as usual. This problem
On 04/09/2015 04:41 AM, Michael Neuling wrote:
> On Wed, 2015-04-08 at 19:50 +0200, Ulrich Weigand wrote:
>> Anshuman Khandual wrote on 23.03.2015
>> 11:34:30:
>>
>>>> With that in mind, do we have a way to set the top 32bits of the MSR
>>>> (wh
On 04/09/2015 04:01 PM, Anshuman Khandual wrote:
> On 03/27/2015 05:31 PM, Michael Ellerman wrote:
>> On Tue, 2015-13-01 at 10:22:34 UTC, Anshuman Khandual wrote:
>>> This patch adds a test case for the system wide DSCR default
>>> value, which when changed through it&#x
On 04/13/2015 02:18 PM, Anshuman Khandual wrote:
> On 04/10/2015 04:03 PM, Ulrich Weigand wrote:
>> Anshuman Khandual wrote on 10.04.2015
>> 11:10:35:
>
> I believed it stores the check pointed MSR value which was in the register
> before the transaction started. But
On 04/20/2015 05:57 PM, Ulrich Weigand wrote:
> Anshuman Khandual wrote on 13.04.2015
> 10:48:57:
>> On 04/10/2015 04:03 PM, Ulrich Weigand wrote:
>>> - You provide checkpointed FPR and VMX registers, but there doesn't
> seem
>>> to be any way to get at
On 03/27/2015 05:31 PM, Michael Ellerman wrote:
> On Tue, 2015-13-01 at 10:22:34 UTC, Anshuman Khandual wrote:
>> This patch adds a test case for the system wide DSCR default
>> value, which when changed through it's sysfs interface must
>> be visible to all threads readi
On 04/10/2015 04:03 PM, Ulrich Weigand wrote:
> Anshuman Khandual wrote on 10.04.2015
> 11:10:35:
>
>> I had posted a newer version [V7] of this patch series couple of months
> back
>> which got ignored while the discussion continued in this version.
>>
>> V7
On 05/21/2015 12:13 PM, Anshuman Khandual wrote:
> This patch adds a test to update the system wide DSCR value repeatedly
> and then verifies that any thread on any given CPU on the system must
> be able to see the same DSCR value whether its is being read through
> the problem state
On 05/19/2018 04:22 AM, Mike Kravetz wrote:
> The current hugetlbfs maintainer has not been active for more than
> a few years. I have been been active in this area for more than
> two years and plan to remain active in the foreseeable future.
>
> Also, update the hugetlbfs entry to include linux
On 05/23/2018 06:25 PM, Michal Hocko wrote:
> when adding memory to a node that is currently offline.
>
> The VM_WARN_ON is just too loud without a good reason. In this
> particular case we are doing
> alloc_pages_node(node, GFP_KERNEL|__GFP_RETRY_MAYFAIL|__GFP_NOWARN,
> order)
>
> so we d
On 05/23/2018 07:36 PM, Michal Hocko wrote:
> On Wed 23-05-18 19:15:51, Anshuman Khandual wrote:
>> On 05/23/2018 06:25 PM, Michal Hocko wrote:
>>> when adding memory to a node that is currently offline.
>>>
>>> The VM_WARN_ON is just too loud without a good re
On 03/01/2018 05:56 AM, Stephen Rothwell wrote:
> Hi Jens,
>
> After merging the block tree, today's linux-next build (x86_64
> allmodconfig) produced these warning:
>
> In file included from drivers/misc/cardreader/rts5209.c:24:0:
> include/linux/rtsx_pci.h:40:0: warning: "SG_END" redefined
> #
structure.
Signed-off-by: Anshuman Khandual
---
This RFC is just to get some feedback. Please ignore the function call
back into the architecture. It can be worked out properly later on. But
the question is can we have virtio devices in the guest which would like
to use SWIOTLB based (or any custom DMA
On 04/05/2018 04:44 PM, Balbir Singh wrote:
> On Thu, Apr 5, 2018 at 8:56 PM, Anshuman Khandual
> wrote:
>> There are certian platforms which would like to use SWIOTLB based DMA API
>> for bouncing purpose without actually requiring an IOMMU back end. But the
>> virtio
On 04/05/2018 04:26 PM, Anshuman Khandual wrote:
> There are certian platforms which would like to use SWIOTLB based DMA API
> for bouncing purpose without actually requiring an IOMMU back end. But the
> virtio core does not allow such mechanism. Right now DMA MAP API is only
>
On 05/03/2018 03:58 AM, Dave Hansen wrote:
> On 05/02/2018 02:33 PM, Andrew Morton wrote:
>> On Tue, 1 May 2018 22:58:06 -0700 Prakash Sangappa
>> wrote:
>>> For analysis purpose it is useful to have numa node information
>>> corresponding mapped address ranges of the process. Currently
>>> /pro
On 04/15/2019 07:25 PM, David Hildenbrand wrote:
>> +
>> +#ifdef CONFIG_MEMORY_HOTREMOVE
>> +int arch_remove_memory(int nid, u64 start, u64 size, struct vmem_altmap
>> *altmap)
>> +{
>> +unsigned long start_pfn = start >> PAGE_SHIFT;
>> +unsigned long nr_pages = size >> PAGE_SHIFT;
>> +
On 04/15/2019 07:28 PM, David Hildenbrand wrote:
> On 14.04.19 07:59, Anshuman Khandual wrote:
>> Memory hot remove uses get_nid_for_pfn() while tearing down linked sysfs
>> entries between memory block and node. It first checks pfn validity with
>> pfn_valid_within() befo
On 04/15/2019 07:18 PM, Mark Rutland wrote:
> Hi Anshuman,
>
> On Sun, Apr 14, 2019 at 11:29:13AM +0530, Anshuman Khandual wrote:
>> Memory removal from an arch perspective involves tearing down two different
>> kernel based mappings i.e vmemmap and linear while releasing
On 04/17/2019 07:51 PM, Mark Rutland wrote:
> On Wed, Apr 17, 2019 at 03:28:18PM +0530, Anshuman Khandual wrote:
>> On 04/15/2019 07:18 PM, Mark Rutland wrote:
>>> On Sun, Apr 14, 2019 at 11:29:13AM +0530, Anshuman Khandual wrote:
>>>> Memory removal from an arc
On 04/17/2019 11:09 PM, Mark Rutland wrote:
> On Wed, Apr 17, 2019 at 10:15:35PM +0530, Anshuman Khandual wrote:
>> On 04/17/2019 07:51 PM, Mark Rutland wrote:
>>> On Wed, Apr 17, 2019 at 03:28:18PM +0530, Anshuman Khandual wrote:
>>>> On 04/15/2019 07:18 PM, Mark Ru
On 04/23/2019 09:35 PM, Mark Rutland wrote:
> On Tue, Apr 23, 2019 at 01:01:58PM +0530, Anshuman Khandual wrote:
>> Generic usage for init_mm.pagetable_lock
>>
>> Unless I have missed something else these are the generic init_mm kernel
>> page table
>> modifier
On 04/24/2019 02:08 AM, Pavel Tatashin wrote:
> sparsemem section size determines the maximum size and alignment that
> is allowed to offline/online memory block. The bigger the size the less
> the clutter in /sys/devices/system/memory/*. On the other hand, however,
> there is less flexability i
On 03/22/2019 05:32 PM, Michal Hocko wrote:
> On Fri 22-03-19 11:49:30, Anshuman Khandual wrote:
>>
>> On 03/21/2019 02:06 PM, Michal Hocko wrote:
>>> On Thu 21-03-19 13:38:20, Anshuman Khandual wrote:
>>>> Memory hot remove uses get_nid_for_pfn() while te
On 03/27/2019 02:24 PM, Mel Gorman wrote:
> Mikhail Gavrilo reported the following bug being triggered in a Fedora
> kernel based on 5.1-rc1 but it is relevant to a vanilla kernel.
>
> kernel: page dumped because: VM_BUG_ON_PAGE(PagePoisoned(p))
> kernel: [ cut here ]
Just check for enforce parameter in PF_ONLY_HEAD() wrapper before calling
VM_BUG_ON_PGFLAGS() for tail pages.
Fixes: 62906027091f ("mm: add PageWaiters indicating tasks are waiting for a
page bit")
Signed-off-by: Anshuman Khandual
---
include/linux/page-flags.h | 2 +-
1 file
On 03/27/2019 06:45 PM, Michal Hocko wrote:
> [Cc Nick]
>
> On Wed 27-03-19 17:57:52, Anshuman Khandual wrote:
>> Just check for enforce parameter in PF_ONLY_HEAD() wrapper before calling
>> VM_BUG_ON_PGFLAGS() for tail pages.
> Why is this an actual fix? Only TESTPAGE
series in the thread (https://lkml.org/lkml/2019/2/14/1096) will make
kernel linear mapping loose pgtable_page_ctor() init. When this happens
the proposed functions free_pte|pmd|pud_table() in [PATCH 2/6] will have
to stop calling pgtable_page_dtor().
Anshuman Khandual (5):
arm64/mm: Enable sysfs
ned-off-by: Anshuman Khandual
---
arch/arm64/Kconfig | 3 +
arch/arm64/include/asm/pgtable.h | 14 +++
arch/arm64/mm/mmu.c | 227 ++-
3 files changed, 241 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kco
-off-by: Anshuman Khandual
---
arch/arm64/Kconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 7e34b9e..a2418fb 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -266,6 +266,15 @@ config HAVE_GENERIC_GUP
config
istent.
Signed-off-by: Anshuman Khandual
---
mm/memory_hotplug.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
index 0082d69..71d0d79 100644
--- a/mm/memory_hotplug.c
+++ b/mm/memory_hotplug.c
@@ -1872,11 +1872,10 @@ void __ref __remove_
struct vmem_altmap which reserves range of device memory to be used
for it's own struct pages.
On arm64 platforms this enables vmemmap_populate() & vmemmap_free() which
creates & destroys struct page mapping to accommodate a given instance of
struct vmem_altmap.
Signed-off-by: Ansh
enable ZONE_DEVICE by subscribing to ARCH_HAS_ZONE_DEVICE. But this is only
applicable for ARM64_4K_PAGES (ARM64_SWAPPER_USES_SECTION_MAPS) only which
creates vmemmap section mappings and utilize vmem_altmap structure.
Signed-off-by: Anshuman Khandual
---
arch/arm64/Kconfig | 1 +
1 file changed, 1
nce of PA_SECTION_SIZE from mm/hmm.c as well.
[anshuman: Consolidated mm/hmm.c instance and updated the commit message]
Signed-off-by: Robin Murphy
Signed-off-by: Anshuman Khandual
---
include/linux/mmzone.h | 1 +
kernel/memremap.c | 10 --
mm/hmm.c | 2 --
3 fil
On 02/19/2019 06:02 PM, Lars Persson wrote:
> Our MIPS 1004Kc SoCs were seeing random userspace crashes with SIGILL
> and SIGSEGV that could not be traced back to a userspace code
> bug. They had all the magic signs of an I/D cache coherency issue.
>
> Now recently we noticed that the /proc/sys
On 2/12/21 12:30 AM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:35PM +0530, Anshuman Khandual wrote:
>> Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is
>> accessible via the system registers. The TRBE supports different addressing
>>
On 2/11/21 12:30 AM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:35PM +0530, Anshuman Khandual wrote:
>> Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is
>> accessible via the system registers. The TRBE supports different addressing
>>
On 2/11/21 2:07 PM, David Hildenbrand wrote:
> On 11.02.21 07:22, Anshuman Khandual wrote:
>> The following warning gets triggered while trying to boot a 64K page size
>> without THP config kernel on arm64 platform.
>>
>> WARNING: CPU: 5 PID: 124 at mm/vmstat.c:1080
On 2/11/21 1:30 PM, Christoph Hellwig wrote:
>> -if (HPAGE_SHIFT > PAGE_SHIFT)
>> +if ((HPAGE_SHIFT > PAGE_SHIFT) && (HUGETLB_PAGE_ORDER < MAX_ORDER))
>
> No need for the braces.
Will drop them.
On 2/11/21 1:31 PM, Christoph Hellwig wrote:
> On Thu, Feb 11, 2021 at 11:52:10AM +0530, Anshuman Khandual wrote:
>> MAX_ORDER which invariably depends on FORCE_MAX_ZONEORDER can be a variable
>> for a given page size, depending on whether TRANSPARENT_HUGEPAGE is enabled
>&g
On 2/11/21 1:34 PM, Christoph Hellwig wrote:
> On Thu, Feb 11, 2021 at 11:52:11AM +0530, Anshuman Khandual wrote:
>> Type cast MAX_ORDER as unsigned int to fix the following build warning.
>>
>> In file included from ./include/linux/kernel.h:14,
>>
On 2/23/21 6:02 AM, Barry Song wrote:
> BATCHED_UNMAP_TLB_FLUSH is used on x86 to do batched tlb shootdown by
> sending one IPI to TLB flush all entries after unmapping pages rather
> than sending an IPI to flush each individual entry.
> On arm64, tlb shootdown is done by hardware. Flush instruc
54,8 +1470,9 @@ struct range arch_get_mappable_range(void)
>* range which can be mapped inside this linear mapping range, must
>* also be derived from its end points.
>*/
> - mhp_range.start = __pa(_PAGE_OFFSET(vabits_actual));
> - mhp_range.end = __pa(PAGE_END - 1);
> + mhp_range.start = start_linear_pa;
> + mhp_range.end = end_linear_pa;
> +
> return mhp_range;
> }
LGTM.
Reviewed-by: Anshuman Khandual
On 2/9/21 11:09 PM, Mathieu Poirier wrote:
> On Fri, Feb 05, 2021 at 10:53:30AM -0700, Mathieu Poirier wrote:
>> On Wed, Jan 27, 2021 at 02:25:35PM +0530, Anshuman Khandual wrote:
>>> Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is
>>>
d.org
Cc: io...@lists.linux-foundation.org
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Changes in V1:
- Rebased on 5.11-rc7
- Dropped the RFC
Changes in RFC:
https://lore.kernel.org/linux-mm/1612422084-30429-1-git-send-email-anshuman.khand...@arm.com/
Anshuman Khandual (3):
mm/pag
Signed-off-by: Anshuman Khandual
---
arch/arm64/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index f39568b28ec1..8e3a5578f663 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1909,6 +1909,10 @@ config ARCH_ENABLE_THP_MIGRATION
guous.c:402:35: note: in expansion of macro ‘max’
phys_addr_t align = PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order);
Cc: Christoph Hellwig
Cc: Marek Szyprowski
Cc: Robin Murphy
Cc: io...@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
certain platforms like arm64. Lets prevent
the scenario by first checking HUGETLB_PAGE_ORDER against MAX_ORDER, before
its assignment as pageblock_order.
Cc: Andrew Morton
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
mm/page_alloc.c | 2 +-
1 file
On 2/11/21 5:23 PM, Will Deacon wrote:
> On Fri, Feb 05, 2021 at 06:55:53PM +, Will Deacon wrote:
>> On Wed, Feb 03, 2021 at 09:20:39AM +0530, Anshuman Khandual wrote:
>>> On 2/2/21 6:26 PM, David Hildenbrand wrote:
>>>> On 02.02.21 13:51, Will Deacon wrote:
&g
On 1/27/21 6:30 PM, Al Grant wrote:
>>> +/* CoreSight PMU AUX buffer formats */
>>> +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_CORESIGHT0x /*
>> Default for backward compatibility */
>>> +#define PERF_AUX_FLAG_CORESIGHT_FORMAT_RAW0x0100 /*
>> Raw format of the source */
>>
>> Would CORESIGHT_FO
On 2/2/21 12:14 AM, Mathieu Poirier wrote:
> On Wed, Jan 27, 2021 at 02:25:24PM +0530, Anshuman Khandual wrote:
>> This series enables future IP trace features Embedded Trace Extension (ETE)
>> and Trace Buffer Extension (TRBE). This series depends on the ETM system
>>
t;>>>> On Tue, Feb 02, 2021 at 09:41:53AM +0530, Anshuman Khandual wrote:
>>>>>> pfn_valid() validates a pfn but basically it checks for a valid struct
>>>>>> page
>>>>>> backing for that pfn. It should always return positiv
@vger.kernel.org
Changes in V1:
- Test pfn_section_valid() for non boot memory
Changes in RFC:
https://lore.kernel.org/linux-arm-kernel/1608621144-4001-1-git-send-email-anshuman.khand...@arm.com/
Anshuman Khandual (2):
arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory
arm64/mm: Reorganize pfn_valid
normal hotplug memory as well.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: Robin Murphy
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Fixes: 73b20c84d42d ("arm64: mm: implement pte_devmap support")
Signed-off-by: Anshuman Khandual
---
arc
replace
the open coded pfn <--> addr conversion with __[pfn|phys]_to_[phys|pfn]().
This does not cause any functional change.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
arstens
Cc: Vasily Gorbik
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: Mark Rutland
Cc: David Hildenbrand
Cc: Andrew Morton
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-s...@vger.kernel.org
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Anshuman Khandual (3):
()
has already been called.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: Mark Rutland
Cc: David Hildenbrand
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: David Hildenbrand
Signed-off-by: Anshuman Khandual
---
arch/arm64/mm/mmu.c | 15
corner cases only some memory at the end of the device-managed memory
region to not be pluggable.
Cc: "Michael S. Tsirkin"
Cc: Jason Wang
Cc: Pankaj Gupta
Cc: Oscar Salvador
Cc: Wei Yang
Cc: Andrew Morton
Cc: catalin.mari...@arm.com
Cc: teawater
Cc: Anshuman Khandual
Cc: Pankaj
been called on the hotplug path.
Cc: Heiko Carstens
Cc: Vasily Gorbik
Cc: David Hildenbrand
Cc: linux-s...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Heiko Carstens
Signed-off-by: Anshuman Khandual
---
arch/s390/mm/init.c | 1 +
arch/s390/mm/vmem.c | 14 +-
2 files
Signed-off-by: Anshuman Khandual
---
include/linux/memory_hotplug.h | 10 +
mm/memory_hotplug.c| 78 +-
mm/memremap.c | 6 ++-
3 files changed, 74 insertions(+), 20 deletions(-)
diff --git a/include/linux/memory_hotplug.h b/include
On 1/29/21 3:37 PM, David Hildenbrand wrote:
> On 29.01.21 08:39, Anshuman Khandual wrote:
>> There are multiple instances of pfn_to_section_nr() and __pfn_to_section()
>> when CONFIG_SPARSEMEM is enabled. This can be just optimized if the memory
>> section is fetched ear
-20155-1-git-send-email-anshuman.khand...@arm.com/
- Test pfn_section_valid() for non boot memory
Changes in RFC:
https://lore.kernel.org/linux-arm-kernel/1608621144-4001-1-git-send-email-anshuman.khand...@arm.com/
Anshuman Khandual (2):
arm64/mm: Fix pfn_valid() for ZONE_DEVICE based memory
normal hotplug memory as well.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: Robin Murphy
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: David Hildenbrand
Fixes: 73b20c84d42d ("arm64: mm: implement pte_devmap support")
Signed-off-by
.
This does not cause any functional change.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Ard Biesheuvel
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
arch/arm64/mm/init.c | 20 +++-
1 file changed, 15 insertions(+), 5
On 1/29/21 3:53 PM, Suzuki K Poulose wrote:
> Hi Anshuman
>
> On 1/27/21 8:55 AM, Anshuman Khandual wrote:
>> Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is
>> accessible via the system registers. The TRBE supports different addressing
>>
rg
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Anshuman Khandual (3):
mm/page_alloc: Fix pageblock_order when HUGETLB_PAGE_ORDER >= MAX_ORDER
arm64/hugetlb: Enable HUGETLB_PAGE_SIZE_VARIABLE
dma-contiguous: Type cast MAX_ORDER as unsigned int
arch/arm64/Kconfig | 4 +
Signed-off-by: Anshuman Khandual
---
arch/arm64/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 175914f2f340..c4acf8230f20 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1918,6 +1918,10 @@ config ARCH_ENABLE_THP_MIGRATION
certain platforms like arm64. Lets prevent
the scenario by first checking HUGETLB_PAGE_ORDER against MAX_ORDER, before
its assignment as pageblock_order.
Cc: Andrew Morton
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
mm/page_alloc.c | 2 +-
1 file
guous.c:402:35: note: in expansion of macro ‘max’
phys_addr_t align = PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order);
Cc: Christoph Hellwig
Cc: Marek Szyprowski
Cc: Robin Murphy
Cc: io...@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
-...@lists.ozlabs.org
Cc: linux-xte...@linux-xtensa.org
Cc: linux...@kvack.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
This patch applies on v5.11-rc6 and has been tested on arm64 platform. But
it has been just build tested on all other platforms.
arch/arm/Kconfig
On 2/5/21 1:50 PM, David Hildenbrand wrote:
> On 04.02.21 08:01, Anshuman Khandual wrote:
>> MAX_ORDER which invariably depends on FORCE_MAX_ZONEORDER can be a variable
>> for a given page size, depending on whether TRANSPARENT_HUGEPAGE is enabled
>> or not. In cert
@vger.kernel.org
Suggested-by: Mark Rutland
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 3 +++
arch/arm64/kernel/cpufeature.c | 2 ++
2 files changed, 5 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
Rutland
Cc: James Morse
Cc: Suzuki K Poulose
Cc: kvm...@lists.cs.columbia.edu
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/cpu.h| 1 +
arch/arm64/include/asm/sysreg.h | 3
Zyngier
Cc: Mark Rutland
Cc: James Morse
Cc: Suzuki K Poulose
Cc: kvm...@lists.cs.columbia.edu
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/cpu.h
erroneous bit width value from 28 to 4.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Rutland
Cc: Suzuki K Poulose
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/kernel/cpufeature.c | 2
Rutland
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 8
arch/arm64/kernel/cpufeature.c | 13 +
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index
Poulose
Cc: kvm...@lists.cs.columbia.edu
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/cpu.h| 1 +
arch/arm64/include/asm/sysreg.h | 3 +++
arch/arm64/kernel/cpufeature.c
Rutland
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/kernel/cpufeature.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 3b451a4a5056..425d8ab1eda1 100644
--- a/arch/arm64/kernel
kernel/list/?series=234093)
Anshuman Khandual (17):
arm64/cpufeature: Add explicit ftr_id_isar0[] for ID_ISAR0 register
arm64/cpufeature: Drop TraceFilt feature exposure from ID_DFR0 register
arm64/cpufeature: Make doublelock a signed feature in ID_AA64DFR0
arm64/cpufeature: Introduce ID_PF
Rutland
Cc: Suzuki K Poulose
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Mark Rutland
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 8
arch/arm64/kernel/cpufeature.c | 14
-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 4
arch/arm64/kernel/cpufeature.c | 4
2 files changed, 8 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 95fdfc5e9bd0..f9dd2c5ab074 100644
--- a/arch/arm64/include/asm
-by: Will Deacon
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 13 +
arch/arm64/kernel/cpufeature.c | 7 +++
2 files changed, 20 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index fa9d02ca4b25..95fdfc5e9bd0
: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 4
arch/arm64/kernel/cpufeature.c | 2 ++
2 files changed, 6 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 638f6108860f..fa9d02ca4b25 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b
Deacon
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 7 +++
arch/arm64/kernel/cpufeature.c | 7 +++
2 files changed, 14 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index f9dd2c5ab074..a572069ccf6e 100644
--- a/arch
: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 2 ++
arch/arm64/kernel/cpufeature.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index ea075cc08c8f..638f6108860f 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch
: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 2 ++
arch/arm64/kernel/cpufeature.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index a572069ccf6e..4bcd21cc2d68 100644
--- a/arch/arm64/include/asm/sysreg.h
Cc: James Morse
Cc: Suzuki K Poulose
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Suzuki K Poulose
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/sysreg.h | 28 +
arch/arm64/kernel/cpufeature.c | 53
-by: Will Deacon
Signed-off-by: Anshuman Khandual
---
arch/arm64/include/asm/cpu.h | 1 +
arch/arm64/kernel/cpufeature.c | 4
arch/arm64/kernel/cpuinfo.c| 1 +
3 files changed, 6 insertions(+)
diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
index e1f5ef437671
Enable TLB features bit in ID_AA64ISAR0 register as per ARM DDI 0487F.a
specification.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Rutland
Cc: Suzuki K Poulose
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Suggested-by: Will Deacon
Signed-off-by: Anshuman
On 05/19/2020 04:05 AM, Will Deacon wrote:
> On Fri, May 15, 2020 at 08:58:05AM +0530, Anshuman Khandual wrote:
>> On 05/14/2020 01:06 PM, Will Deacon wrote:
>>> Why is it a change? We've never reported e.g. "java" on an arm64 kernel, so
>>
>&g
ux-arm-ker...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual
---
Applies on next-20200518 that has recent cpufeature changes from Will.
arch/arm64/kernel/cpufeature.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --
On 05/19/2020 01:40 AM, John Hubbard wrote:
> On 2020-05-17 23:42, Anshuman Khandual wrote:
> ...
>> diff --git a/include/linux/vm_event_item.h b/include/linux/vm_event_item.h
>> index ffef0f279747..23d8f9884c2b 100644
>> --- a/include/linux/vm_event_item.
On 05/20/2020 11:24 PM, Will Deacon wrote:
> On Tue, 12 May 2020 07:27:27 +0530, Anshuman Khandual wrote:
>> This validates hypervisor capabilities like VMID width, IPA range for any
>> hot plug CPU against system finalized values. KVM's view of the IPA space
>> is u
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