Hi Konrad,
On Wed, Nov 28, 2012 at 04:22:05PM -0500, Konrad Rzeszutek Wilk wrote:
> I looked at the patches and you can also add
> Reviewed-by: Konrad Rzeszutek Wilk
Thanks for your review, I added the line to the patches.
> If you have a git tree I would like to test them as well. Thx.
I reb
On Thu, Jan 31, 2013 at 09:32:26AM +, Sethi Varun-B16395 wrote:
> We need a mechanism to determine the maximum number of subwindows supported
> by PAMU. How about representing it in the iommu_domain structure:
> struct iommu_domain {
> struct iommu_ops *ops;
> void *priv;
>
This attribute of a domain can be queried to find out if the
domain supports setting up page-tables using the iommu_map()
and iommu_unmap() functions.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c |5 +
include/linux/iommu.h |1 +
2 files changed, 6 insertions(+)
diff --git
Hi Varuns, Stuart,
here is the reworked patch-set with the IOMMU-API changes to support the
PAMU IOMMU. It should include the results from our discussion last week.
Please have a look at it and tell me if this interface works for you. I
will merge it then into the IOMMU tree so that you have a bra
Move it to the end of the list.
Signed-off-by: Joerg Roedel
---
include/linux/iommu.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index f3b99e1..7e6ce72 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
In case the page-size bitmap is zero the code path in
iommu_map and iommu_unmap is undefined. Make it defined and
return -ENODEV in this case.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/iommu.c
Add the iommu_domain_window_enable() and iommu_domain_window_disable()
functions to the IOMMU-API. These functions will be used to setup
domains that are based on subwindows and not on paging.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c | 20
include/linux
This attribute can be used to set and get the number of
subwindows on IOMMUs that are window-based.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c | 33 ++---
include/linux/iommu.h |5 +
2 files changed, 35 insertions(+), 3 deletions(-)
diff --git a
On Mon, Feb 04, 2013 at 02:31:48PM +0200, Sami Liedes wrote:
> Fix tegra_smmu_probe() to initialize client_lock spinlocks in
> per-address-space structures.
>
> Signed-off-by: Sami Liedes
Applied to arm/tegra, thanks.
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On Mon, Feb 04, 2013 at 12:10:51PM -0600, Stuart Yoder wrote:
> On Mon, Feb 4, 2013 at 7:18 AM, Joerg Roedel wrote:
> > +static inline int iommu_domain_window_enable(struct iommu_domain *domain,
> > +u32 wnd_nr, ph
Hi,
On Tue, Feb 05, 2013 at 09:14:40AM +, Sethi Varun-B16395 wrote:
> In case of PAMU, geometry would be meaningless without specifying the
> number of subwindows. If the API user specifies a geometry but fails
> to specify the number of required subwindows, we would assume a
> default (max su
On Tue, Feb 05, 2013 at 10:52:03AM +, Sethi Varun-B16395 wrote:
> DOMAIN_ATTR_PAMU_ENABLE is required to enable a particular DMA window.
> My point is about the domain geometry, which is incomplete in case of
> PAMU without the number of subwindows. Geometry parameters are used
> for initializi
On Mon, Feb 04, 2013 at 05:31:51PM -0600, Stuart Yoder wrote:
> On Mon, Feb 4, 2013 at 12:56 PM, Joerg Roedel wrote:
> > On Mon, Feb 04, 2013 at 12:10:51PM -0600, Stuart Yoder wrote:
> >> On Mon, Feb 4, 2013 at 7:18 AM, Joerg Roedel wrote:
> >> > +static inline
Hi Shuah,
On Fri, Feb 01, 2013 at 11:31:59AM -0700, Shuah Khan wrote:
> Yes, 3.7 has the same window of opportunity for this race condition,
> however I couldn't figure out why it doesn't happen on 3.7. On 3.7 the
> window between amd_iommu_init_hardware() and amd_iommu_init_dma_ops()
> might actu
On Tue, Feb 05, 2013 at 07:42:09PM +0900, Hideki EIRAKU wrote:
> From: Joerg Roedel
> > Why is it necessary to call dma_map_single() for IOMMU page-tables?
> > usually the dma_* functions call into IOMMU drivers, so why are they
> > used inside an IOMMU driver?
>
>
On Mon, Feb 04, 2013 at 05:31:51PM -0600, Stuart Yoder wrote:
> On Mon, Feb 4, 2013 at 12:56 PM, Joerg Roedel wrote:
> > Okay. So if your architecture supports sizes over 2^32 then size_t
> > probably is already 64bits, right?
>
> No, on a 32-bit platform size_t would gener
t;From 2ecf57c85e67e0243b36b787d0490c0b47202ba8 Mon Sep 17 00:00:00 2001
From: Joerg Roedel
Date: Wed, 6 Feb 2013 12:55:23 +0100
Subject: [PATCH] iommu/amd: Initialize device table after dma_ops
When dma_ops are initialized the unity mappings are
created. The init_device_table_dma() function makes sure DMA
from all devices is bloc
On Wed, Feb 06, 2013 at 07:08:24PM -0800, Andy Lutomirski wrote:
> - if (x2apic_present)
> - WARN(1, KERN_WARNING
> - "Failed to enable irq remapping. You are vulnerable to
> irq-injection attacks.\n");
> -
> + irq_remapping_is_secure = 0;
> return -1
On Thu, Feb 07, 2013 at 08:29:42AM -0800, Andy Lutomirski wrote:
> On Thu, Feb 7, 2013 at 3:33 AM, Joerg Roedel wrote:
> > On Wed, Feb 06, 2013 at 07:08:24PM -0800, Andy Lutomirski wrote:
> >> - if (x2apic_present)
> >> - WARN(1, KERN_WARNING
> >&
On Thu, Feb 07, 2013 at 09:53:45AM -0800, Andy Lutomirski wrote:
> On Thu, Feb 7, 2013 at 9:27 AM, Joerg Roedel wrote:
> > Hmm, looking into the intel_irq_remapping.c version in the tip tree
> > makes me wonder even more.
>
> Is this the version I'm based on (intel_irq_
On Wed, Feb 06, 2013 at 09:50:10AM +0100, Hannes Reinecke wrote:
> kmemcheck complained about the use of uninitialized memory.
> So there.
>
> Cc: David Woodhouse
> Signed-off-by: Hannes Reinecke
Applied to x86/vt-d, thanks Hannes.
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On Thu, Feb 07, 2013 at 09:02:38PM +, David Woodhouse wrote:
> Backtraces add visibility and have proven to be extremely useful in the
> past for getting people to actually *fix* broken BIOSes.
>
> When kerneloops.org was running, it also gave very good statistics which
> helped to apply press
On Mon, Feb 11, 2013 at 01:57:03PM -0700, Shuah Khan wrote:
> I was hoping Joerg's patch would make it into Linus's tree by now. I
> tested the original patch and did the back-port to 3.4 and 3.0 at the
> same time, before I loose the test system.
I will send the patch with the next merge window.
On Mon, Apr 01, 2013 at 02:45:18PM +0900, Takao Indoh wrote:
>
> enable_IR
> intel_enable_irq_remapping
> iommu_disable_irq_remapping <== IRES/QIES/TES disabled here
> dmar_disable_qi <== do nothing
> dmar_enable_qi <== QIES enabled
> intel_setup_irq_r
Hi Suravee,
On Wed, Mar 27, 2013 at 06:51:23PM -0500, suravee.suthikulpa...@amd.com wrote:
> From: Suravee Suthikulpanit
>
> Add logic to decode AMD IOMMU event flag based on information from AMD IOMMU
> specification.
> This should simplify debugging IOMMU errors. Also, dump DTE information i
On Wed, Mar 27, 2013 at 06:51:34PM -0500, suravee.suthikulpa...@amd.com wrote:
> From: Suravee Suthikulpanit
>
> Add IOMMU event log injection interface for testing event flag decoding logic.
> This interface allows users to specify device id, event flag, and event types
> via debugfs.
>
> echo
On Wed, Mar 27, 2013 at 06:51:52PM -0500, suravee.suthikulpa...@amd.com wrote:
> From: Suravee Suthikulpanit
>
> Current driver does not clear the IOMMU event log interrupt bit
> in the IOMMU status register after processing an interrupt.
> This causes the IOMMU hardware to generate event log int
On Tue, Apr 02, 2013 at 04:40:37PM +0200, Borislav Petkov wrote:
> While you guys are at it, can someone fix this too pls (ASUS board with
> a PD on it).
>
> [0.220342] [Firmware Bug]: AMD-Vi: IOAPIC[9] not in IVRS table
> [0.220398] [Firmware Bug]: AMD-Vi: IOAPIC[10] not in IVRS table
> [
On Fri, Mar 29, 2013 at 01:23:59AM +0530, Varun Sethi wrote:
> Add an iommu domain pointer to device (powerpc) archdata. Devices
> are attached to iommu domains and this pointer provides a mechanism
> to correlate between a device and the associated iommu domain. This
> field is set when a device
On Fri, Mar 29, 2013 at 01:24:01AM +0530, Varun Sethi wrote:
> +/* cache stash targets */
> +enum stash_target {
> + IOMMU_ATTR_CACHE_L1 = 1,
> + IOMMU_ATTR_CACHE_L2,
> + IOMMU_ATTR_CACHE_L3,
> +};
> +
> +/* This attribute corresponds to IOMMUs capable of generating
> + * a stash transa
On Tue, Apr 02, 2013 at 05:29:56PM +0200, Borislav Petkov wrote:
> On Tue, Apr 02, 2013 at 05:03:04PM +0200, Joerg Roedel wrote:
> Good luck trying to get ASUS to fix anything in their BIOS :(.
Hmm...
> Can't we detect the SB IOAPIC some other way in this case?
I can certainly
On Tue, Apr 02, 2013 at 10:41:25AM -0500, Suthikulpanit, Suravee wrote:
> Turning this into WARN_ON() at this point might break a lot of
> systems currently out in the field. However, users can always
> switching to use "intremap=off" but this might not be obvious.
A WARN_ON doesn't break systems
Cc'ing Alex Williamson
Alex, can you please review the iommu-group part of this patch?
My comments so far are below:
On Fri, Mar 29, 2013 at 01:24:02AM +0530, Varun Sethi wrote:
> +config FSL_PAMU
> + bool "Freescale IOMMU support"
> + depends on PPC_E500MC
> + select IOMMU_API
> +
On Fri, Mar 29, 2013 at 01:23:57AM +0530, Varun Sethi wrote:
> This patchset provides the Freescale PAMU (Peripheral Access Management Unit)
> driver
> and the corresponding IOMMU API implementation. PAMU is the IOMMU present on
> Freescale
> QorIQ platforms. PAMU can authorize memory access, rem
On Tue, Apr 02, 2013 at 06:17:57PM +0200, Borislav Petkov wrote:
> On Tue, Apr 02, 2013 at 06:04:00PM +0200, Joerg Roedel wrote:
> > I can certainly write a patch that works around your particular BIOS
> > bug. The problem is that such a fix will most certainly break ot
On Tue, Apr 02, 2013 at 09:32:40PM +0200, Borislav Petkov wrote:
> On Tue, Apr 02, 2013 at 06:33:18PM +0200, Joerg Roedel wrote:
> > Okay, in theory I could implement a feedback loop between timer-setup
> > and intremap code and try fixups until it works. But that seems not to
>
On Tue, Apr 02, 2013 at 02:05:14PM -0500, Suthikulpanit, Suravee wrote:
> From: Suravee Suthikulpanit
> +static const char * const _type_field_encodings[] = {
> + /* 00 */"Reserved",
> + /* 01 */"Master Abort",
> + /* 10 */"Target Abort",
> + /* 11 */"Data Error",
In these arrays,
On Wed, Apr 03, 2013 at 05:21:16AM +, Sethi Varun-B16395 wrote:
> > I would prefer these PAMU specific enum and struct to be in a pamu-
> > specific iommu-header.
> >
>
> [Sethi Varun-B16395] But, these would be used by the IOMMU API users
> (e.g. VFIO), they shouldn't depend on PAMU specific
On Wed, Apr 03, 2013 at 09:24:39AM +0100, David Woodhouse wrote:
> On Wed, 2013-04-03 at 16:11 +0900, Takao Indoh wrote:
> > Yeah, you are right. I forgot such a case.
>
> If you disable translation and there's some device still doing DMA, it's
> going to scribble over random areas of memory. You
Hi Varun,
here is a patch-set that implements (what I think are) the necessary
IOMMU-API extensions to support the PAMU. Please have a look at it and
tell me if it fits your needs.
Regards,
Joerg
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Move it to the end of the list.
Signed-off-by: Joerg Roedel
---
include/linux/iommu.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index f3b99e1..7e6ce72 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
Add the iommu_domain_wnd_enable() and iommu_domain_wnd_disable()
functions to the IOMMU-API. These functions will be used to
setup domains that are based on subwindows and not on
paging.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c | 20
include/linux/iommu.h
This attribute of a domain can be queried to find out if the
domain supports setting up page-tables using the iommu_map()
and iommu_unmap() functions.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c |5 +
include/linux/iommu.h |1 +
2 files changed, 6 insertions(+)
diff --git
In case the page-size bitmap is zero the code path in
iommu_map and iommu_unmap is undefined. Make it defined and
return -ENODEV in this case.
Signed-off-by: Joerg Roedel
---
drivers/iommu/iommu.c |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/iommu.c
Hi Shuah,
On Thu, Jan 31, 2013 at 11:33:30AM -0700, Shuah Khan wrote:
> Access to these ranges continues to work with no errors until AMD IOMMU
> driver disables and re-enables IOMMU in enable_iommus(). These faults
> don't persist and appear between the enable_iommus() call and before
> amd_iommu
Cho,
On Wed, Jan 02, 2013 at 02:53:49PM +0900, KyongHo Cho wrote:
> On Tuesday, January 1, 2013, Sylwester Nawrocki
> > Cc: devicetree-disc...@lists.ozlabs.org
Since patch 7 of this set is already merged, do you mind to re-post the
rest of this patch-set with the latest comments addressed? I ca
On Mon, Jan 21, 2013 at 07:54:26PM +0900, Hideki EIRAKU wrote:
> This is the Renesas IPMMU driver and IOMMU API implementation.
>
> The IPMMU module supports the MMU function and the PMB function. The
> MMU function provides address translation by pagetable compatible with
> ARMv6. The PMB funct
On Mon, Jan 21, 2013 at 07:54:25PM +0900, Hideki EIRAKU wrote:
> Hideki EIRAKU (4):
> iommu/shmobile: Add iommu driver for Renesas IPMMU modules
> ARM: mach-shmobile: sh7372: Add IPMMU device
> ARM: mach-shmobile: sh73a0: Add IPMMU device
> ARM: mach-shmobile: r8a7740: Add IPMMU device
Pau
interrupt remapping). The systems were
tested with IOMMU enabled and with IOMMU disabled. No issues were found.
Joerg Roedel (19):
x86, apic: Move irq_remapping_enabled checks into IRQ-remapping code
x86, apic: Mask IO-APIC and
On Fri, Jan 25, 2013 at 11:49:15AM +0100, Ingo Molnar wrote:
> Hm, there are some not so trivial looking conflicts in
> io_apic.c, due to the MSI patches I applied yesterday:
>
> 5ca72c4f7c41 AHCI: Support multiple MSIs
> 08261d87f7d1 PCI/MSI: Enable multiple MSIs with pci_enable_msi_block_auto
On Fri, Jan 18, 2013 at 09:42:18PM +0100, Cong Ding wrote:
> Signed-off-by: Cong Ding
> ---
> drivers/iommu/omap-iommu.c |4 ++--
Applied to arm/omap, thanks.
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Mor
On Thu, Jan 24, 2013 at 01:17:53PM -0600, Suthikulpanit, Suravee wrote:
> From: Suravee Suthikulpanit
> Signed-off-by: Suravee Suthikulpanit
> ---
> Changelog:
> v4:
> * Fix style and spacing
>
> v3:
> * Add proper commit message
> * Change logic to avoid unnecessary indentaio
On Mon, Jan 21, 2013 at 02:20:56PM -0600, Steven L. Kinney wrote:
> From: "Steven L. Kinney"
>
> Original code base by Andreas Herrmann at AMD with minor changes.
Why is it safe to enable this feature when it was disabled by BIOS? Was
it disabled for no reason?
Joerg
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On Mon, Jan 28, 2013 at 02:59:25PM +, Kinney, Steven wrote:
> Testing with perf shows expected results.
Can you give me an impression on how the results look like when perf is
used? Since the hardware is widely available yet I can't try this
myself.
Joerg
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with IOMMU disabled. No issues were found.
--------
Joerg Roedel (19):
x86, apic: Move irq_remapping_enabled checks into IRQ-remapping code
x86, apic: Mask IO-APIC and PIC unconditionally on LAPIC resume
Hi Linus,
The following changes since commit 949db153b6466c6f7cad5a427ecea94985927311:
Linux 3.8-rc5 (2013-01-25 11:57:28 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
tags/iommu-fixes-v3.8-rc5
for you to fetch changes up to 31
: mach-shmobile: sh73a0: Add IPMMU device
ARM: mach-shmobile: r8a7740: Add IPMMU device
Hiroshi Doyu (3):
iommu/tegra: smmu: Support variable MMIO ranges/blocks
iommu/tegra: smmu: Change SMMU's dependency on ARCH_TEGRA
iommu/tegra: smmu: Fix incorrect mask for regba
On Tue, Feb 26, 2013 at 06:16:10AM +, Sethi Varun-B16395 wrote:
> This patch is not present in Joerg's tree and the add_device API in
> the PAMU driver requires this patch.
Will this patch be part of v3.9-rc1?
Joerg
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On Mon, Feb 18, 2013 at 06:22:14PM +0530, Varun Sethi wrote:
> Add a new field in the device (powerpc) archdata structure for storing iommu
> domain
> information pointer. This pointer is stored when the device is attached to a
> particular
> domain.
>
>
> Signed-off-by: Varun Sethi
> ---
> -
On Mon, Feb 18, 2013 at 06:22:16PM +0530, Varun Sethi wrote:
> Macros for checking FSL PCI controller version.
>
> Signed-off-by: Varun Sethi
> ---
> arch/powerpc/include/asm/pci-bridge.h |4
> 1 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/p
On Mon, Feb 18, 2013 at 06:22:18PM +0530, Varun Sethi wrote:
> Added the following domain attributes for the FSL PAMU driver:
> 1. Added new iommu stash attribute, which allows setting of the
>LIODN specific stash id parameter through IOMMU API.
> 2. Added an attribute for enabling/disabling DM
On Wed, Feb 20, 2013 at 10:02:38AM +0100, Ingo Molnar wrote:
> Timers and APIC would be my leading suspect - but scheduler and
> hotplug changes might be the culprits as well.
>
> Yesterday, while preparing the trees I wanted to mention this
> x86/apic commit:
>
> 336224ba5e4f x86, apic: Mask
On Mon, Oct 01, 2012 at 12:48:31PM -0600, Shuah Khan wrote:
> Remove local BUS_NOTIFY_UNBOUND_DRIVER define. This is not used since
> BUS_NOTIFY_UNBOUND_DRIVER is defined in include/linux/device.h
>
> Signed-off-by: Shuah Khan
> ---
> lib/dma-debug.c |5 -
> 1 file changed, 5 deletions(-
u/amd: Fix features reporting
Dan Carpenter (1):
iommu/amd: Fix possible use after free in get_irq_table()
Frank Arnold (1):
iommu/amd: Fix some typos
Hiroshi Doyu (2):
iommu/tegra: smmu: debugfs for TLB/PTC statistics
iommu/tegra: smmu: Use debugfs_create_dir for direct
On Mon, Oct 08, 2012 at 11:08:06AM -0600, Shuah Khan wrote:
> Add dma-debug interface debug_dma_mapping_error() to debug drivers that fail
> to check dma mapping errors on addresses returned by dma_map_single() and
> dma_map_page() interfaces. This interface clears a flag set by
> debug_dma_map_pag
On Thu, Oct 18, 2012 at 02:00:58PM -0600, Shuah Khan wrote:
> Enhance the document to discuss the importance of dma mapping error checks
> after dma_map_single() and dma_map_page() calls. Also added usage examples
> that include unmap examples in error paths when dma mapping error is returned.
> In
On Thu, Oct 18, 2012 at 03:29:10PM -0600, Alex Williamson wrote:
> I think this series is good-to-go, modulo any testing you may be able to
> do on it. I'm going to be offline for a couple weeks so feel free to
> incorporate this RFC directly or I can re-spin something when I'm back.
Okay, I appl
interrupt remapping can not work reliably
2. Typo fix for NVidia IOMMU driver
Hiro Sugawara (1):
iommu/tegra: smmu: Fix deadly typo
Joerg Roedel (1):
iommu/amd: Work around wrong IOAPIC device-id in IVRS table
On Sun, Aug 26, 2012 at 08:21:26PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:55:58PM +0200, Joerg Roedel wrote:
> > --- a/arch/x86/include/asm/hw_irq.h
> > +++ b/arch/x86/include/asm/hw_irq.h
> > @@ -101,6 +101,7 @@ static inline void set_io
On Sun, Aug 26, 2012 at 08:16:03PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:55:56PM +0200, Joerg Roedel wrote:
> > diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
> > index 827f8a1..71824fc 100644
> > --- a/drivers/
On Sun, Aug 26, 2012 at 08:27:55PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:56:01PM +0200, Joerg Roedel wrote:
> > --- a/arch/x86/kernel/apic/io_apic.c
> > +++ b/arch/x86/kernel/apic/io_apic.c
> > @@ -2981,8 +2981,8 @@ void destroy
On Sun, Aug 26, 2012 at 08:30:30PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:56:02PM +0200, Joerg Roedel wrote:
> > --- a/arch/x86/include/asm/irq_remapping.h
> > +++ b/arch/x86/include/asm/irq_remapping.h
> > @@ -44,6 +44,9 @@ extern void compose_re
On Sun, Aug 26, 2012 at 08:41:40PM +0200, Sebastian Andrzej Siewior wrote:
> On Mon, Aug 20, 2012 at 03:56:03PM +0200, Joerg Roedel wrote:
> > This call-back points to the right function for initializing
> > the msi_msg structure.
>
> So you pull out the compose_rema
On Sun, Aug 26, 2012 at 08:52:33PM +0200, Sebastian Andrzej Siewior wrote:
> Basically you shuffle the code from up there, down there and call from behind
> a function pointer. There are two things different this time:
> - no version check >= 0x20
> I belive this is obsolete since this runs only
Move these checks to IRQ remapping code by introducing the
panic_on_irq_remap() function.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/irq_remapping.h |5 +
arch/x86/kernel/apic/io_apic.c |6 ++
drivers/iommu/irq_remapping.c|6 ++
3 files changed
This function does irq-remapping specific interrupt setup
like modifying the chip defaults.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/irq_remapping.h |9 +
arch/x86/kernel/apic/io_apic.c | 13 +++--
drivers/iommu/irq_remapping.c|9 +
3
Move the three easy to move checks in the x86' apic.c file
into the IRQ-remapping code.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/apic/apic.c |9 +++--
drivers/iommu/irq_remapping.c | 11 +--
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arc
Hi,
here is the third version of the patch-set to improve the abstraction
of interrupt remapping in the x86 core code. A more detailed description
can be found in the original post at:
https://lkml.org/lkml/2012/8/7/317
Changes from v2->v3:
* Rebased to v3.6-rc7
* Worked
The function is called unconditionally now in IO-APIC code
removing another irq_remapped() check from x86 core code.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/apic/io_apic.c |4 ++--
drivers/iommu/irq_remapping.c |5 -
2 files changed, 6 insertions(+), 3 deletions(-)
diff
This function pointer can be overwritten by the IRQ
remapping code. The irq_remapping_enabled check can be
removed from default_setup_hpet_msi.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/hpet.h |5 +++--
arch/x86/include/asm/x86_init.h |1 +
arch/x86/kernel/apic/io_apic.c
The irq_remapped function is only used in IOMMU code after
the last patch. So move its definition there too.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/irq_remapping.h | 10 --
drivers/iommu/irq_remapping.c|5 +
2 files changed, 5 insertions(+), 10 deletions
Use seperate routines to setup MSI IRQs for both
irq_remapping_enabled cases.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/irq_remapping.h | 12 ---
arch/x86/include/asm/pci.h |2 ++
arch/x86/kernel/apic/io_apic.c | 26 ++--
drivers/iommu
This call-back is used to dump IO-APIC entries for debugging
purposes into the kernel log. VT-d needs a special routine
for this and will overwrite the default.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |3 +
arch/x86/include/asm/x86_init.h |1 +
arch/x86
IO-APIC and PIC use the same resume routines when IRQ
remapping is enabled or disabled. So it should be safe to
mask the other APICs for the IRQ-remapping-disabled case
too.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/apic/apic.c | 19 +--
1 file changed, 9 insertions
This callback replaces the old __eoi_ioapic_pin function
which needs a special path for interrupt remapping.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |5 +
arch/x86/include/asm/x86_init.h |1 +
arch/x86/kernel/apic/io_apic.c | 20 ++--
arch
Move all the code to either to the header file
asm/irq_remapping.h or to drivers/iommu/.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/hw_irq.h|1 +
arch/x86/include/asm/io_apic.h |5
arch/x86/include/asm/irq_remapping.h | 17 +
arch/x86/kernel
This function is only called when irq-remapping is disabled.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/apic/io_apic.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 360f62b..d5cd6e1 100644
--- a/arch/x86
Remove the last left-over from this flag from x86 code.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/irq_remapping.h |4
drivers/iommu/dmar.c |2 ++
drivers/iommu/intel-iommu.c |2 ++
drivers/iommu/irq_remapping.h|3 +++
4 files
This function is only called from default_ioapic_set_affinity()
which is only used when interrupt remapping is disabled
since the introduction of the set_affinity function pointer.
So the check will always evaluate as true and can be
removed.
Signed-off-by: Joerg Roedel
---
arch/x86/kernel/apic
With interrupt remapping a special function is used to
change the affinity of an IO-APIC interrupt. Abstract this
with a function pointer.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |4
arch/x86/include/asm/irq_remapping.h |9 -
arch/x86/include
necessary by interrupt remapping.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |2 ++
arch/x86/include/asm/x86_init.h |9 +
arch/x86/kernel/apic/io_apic.c | 41 ++-
arch/x86/kernel/x86_init.c |9 +
drivers
This pointer is changed to a different function when IRQ
remapping is enabled.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |5 +
arch/x86/include/asm/x86_init.h |5 +
arch/x86/kernel/apic/io_apic.c | 14 +-
arch/x86/kernel/x86_init.c
Add a data structure to store information the IOMMU driver
can use to get from a 'struct irq_cfg' to the remapping
entry.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/hw_irq.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/i
.
Otherwise the default function is called.
Signed-off-by: Joerg Roedel
---
arch/x86/include/asm/io_apic.h |4 +++
arch/x86/include/asm/x86_init.h |4 +++
arch/x86/kernel/apic/io_apic.c | 59 ---
arch/x86/kernel/x86_init.c |1 +
drivers/iommu
I have no access to my AMD email address anymore. Update
entry in MAINTAINERS to the new address.
Signed-off-by: Joerg Roedel
---
MAINTAINERS |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 027ec2b..0267ba2 100644
--- a/MAINTAINERS
I have no access to my AMD email address anymore. Update
entry in MAINTAINERS to the new address.
Cc: Avi Kivity
Cc: Marcelo Tosatti
Signed-off-by: Joerg Roedel
---
MAINTAINERS |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0267ba2
On Wed, Aug 28, 2013 at 09:26:57AM +0200, Linus Walleij wrote:
> On Wed, Aug 14, 2013 at 10:04 PM, Joerg Roedel wrote:
>
> > So when integrator does not depend on PCI this diff is more appropriate?
> >
> > diff --git a/arch/arm/mach-integrator/pci_v3.h
> > b/arc
> > automatically disable irq remapping, theres no need to contiue making Abrt
> > jump
> > at this problem
> >
> > Signed-off-by: Neil Horman
> > CC: Joerg Roedel
> > CC: Bjorn Helgaas
> > CC: Andy Lutomirski
> > CC: Konrad Rzeszutek Wil
On Fri, Sep 27, 2013 at 12:53:35PM -0400, Neil Horman wrote:
> The warning for the irq remapping broken check in intel_irq_remapping.c is
> pretty pointless. We need the warning, but we know where its comming from,
> the
> stack trace will always be the same, and it needlessly triggers things lik
-smmu: fix iommu_present() test in init
Joerg Roedel (1):
Merge branch 'for-joerg/arm-smmu/fixes' of
git://git.kernel.org/.../will/linux into iommu/fixes
Li, Zhen-Hua (1):
x86/iommu: correct ICS register offset
Stephen Warren (1):
MAINTAINERS: add overall IOMMU section
W
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