[PATCH v11 06/13] KVM: SVM: Add KVM_SEV_RECEIVE_FINISH command

From: Brijesh Singh The command finalize the guest receiving process and make the SEV guest ready for the execution. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: Paolo Bonzini Cc: Joerg Roedel Cc: Borislav Petkov Cc: Tom Lendacky Cc: x...@kernel.org Cc: k...@vger.kernel.or

[PATCH v11 07/13] KVM: x86: Add AMD SEV specific Hypercall3

From: Brijesh Singh KVM hypercall framework relies on alternative framework to patch the VMCALL -> VMMCALL on AMD platform. If a hypercall is made before apply_alternative() is called then it defaults to VMCALL. The approach works fine on non SEV guest. A VMCALL would causes #UD, and hypervisor w

[PATCH v11 08/13] KVM: X86: Introduce KVM_HC_PAGE_ENC_STATUS hypercall

From: Ashish Kalra This hypercall is used by the SEV guest to notify a change in the page encryption status to the hypervisor. The hypercall should be invoked only when the encryption attribute is changed from encrypted -> decrypted and vice versa. By default all guest pages are considered encryp

[PATCH v11 09/13] mm: x86: Invoke hypercall when page encryption status is changed

From: Brijesh Singh Invoke a hypercall when a memory region is changed from encrypted -> decrypted and vice versa. Hypervisor needs to know the page encryption status during the guest migration. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Cc: Paolo Bonzini Cc: Joerg Roedel Cc:

[PATCH v11 10/13] KVM: x86: Introduce new KVM_FEATURE_SEV_LIVE_MIGRATION feature & Custom MSR.

From: Ashish Kalra Add new KVM_FEATURE_SEV_LIVE_MIGRATION feature for guest to check for host-side support for SEV live migration. Also add a new custom MSR_KVM_SEV_LIVE_MIGRATION for guest to enable the SEV live migration feature. MSR is handled by userspace using MSR filters. Signed-off-by: A

[PATCH v11 12/13] x86/kvm: Add guest support for detecting and enabling SEV Live Migration feature.

From: Ashish Kalra The guest support for detecting and enabling SEV Live migration feature uses the following logic : - kvm_init_plaform() invokes check_kvm_sev_migration() which checks if its booted under the EFI - If not EFI, i) check for the KVM_FEATURE_CPUID ii) if CPUID

[PATCH v11 11/13] EFI: Introduce the new AMD Memory Encryption GUID.

From: Ashish Kalra Introduce a new AMD Memory Encryption GUID which is currently used for defining a new UEFI environment variable which indicates UEFI/OVMF support for the SEV live migration feature. This variable is setup when UEFI/OVMF detects host/hypervisor support for SEV live migration and

Re: [PATCH] torture: Correctly fetch CPUs for kvm-build.sh with all native language

On Thu, 1 Apr 2021, Paul E. McKenney wrote: > +# This script knows only English. > +LANG=en_US.UTF-8; export LANG This, too, will only work if en_US.UTF-8 is installed . Check with "locale -a" if it is. Also, Perl will complain loudly if the language is not installed (try: "LANG=en_US.UTF-9 perl

Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

> > You have a MAC and an PCS in the stmmac IP block. That then has > > some > > sort of SERDES interface, running 1000BaseX, SGMII, SGMII > > overclocked > > at 2.5G or 25000BaseX. Connected to the SERDES you have a PHY > > which > > converts to copper, giving you 2500BaseT. > > > > You said earl

[PATCH v11 13/13] x86/kvm: Add kexec support for SEV Live Migration.

From: Ashish Kalra Reset the host's shared pages list related to kernel specific page encryption status settings before we load a new kernel by kexec. We cannot reset the complete shared pages list here as we need to retain the UEFI/OVMF firmware specific settings. The host's shared pages list i

[PATCH] ASoC: max98390: Add support for tx slot configuration.

Update voltage/current tx slot configuration support. Signed-off-by: Steve Lee --- sound/soc/codecs/max98390.c | 62 + sound/soc/codecs/max98390.h | 2 ++ 2 files changed, 64 insertions(+) diff --git a/sound/soc/codecs/max98390.c b/sound/soc/codecs/max98390

Re: [PATCH 1/1] watchdog: Fix a typo in Kconfig

On 3/31/21 8:32 PM, Wong Vee Khee wrote: > s/thershold/threshold > > Cc: Vijayakannan Ayyathurai > Signed-off-by: Wong Vee Khee Reviewed-by: Guenter Roeck > --- > drivers/watchdog/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/watchdog/Kconfig b/dri

Re: [PATCH 11/13] kconfig: do not use allnoconfig_y option

On 3/31/21 11:25 AM, Nick Desaulniers wrote: > On Wed, Mar 31, 2021 at 10:12 AM Guenter Roeck wrote: >> >> On Sun, Mar 14, 2021 at 04:48:34AM +0900, Masahiro Yamada wrote: >>> allnoconfig_y is a bad hack that sets a symbol to 'y' by allnoconfig. >>> >>> allnoconfig does not mean a minimum set of C

Re: [RFC PATCH v1 0/4] arm64: Implement stack trace reliability checks

On 4/5/21 8:24 AM, Masami Hiramatsu wrote: > Hi Madhaven, > > On Sat, 3 Apr 2021 22:29:12 -0500 > "Madhavan T. Venkataraman" wrote: > > Check for kretprobe === For functions with a kretprobe set up, probe code executes on entry to the function and rep

Re: [PATCH] net: phy: fix PHY possibly unwork after MDIO bus resume back

On 05.04.2021 15:53, Christian Melki wrote: > On 4/5/21 2:09 PM, Heiner Kallweit wrote: >> On 05.04.2021 10:43, Christian Melki wrote: >>> On 4/5/21 12:48 AM, Heiner Kallweit wrote: On 04.04.2021 16:09, Heiner Kallweit wrote: > On 04.04.2021 12:07, Joakim Zhang wrote: >> commit 4c0d2e9

[PATCH] crypto: fix CRYPTO_LIB_* dependencies on CRYPTO

Currently, when a config option selects a CRYPTO_LIB_* option while CRYPTO is disabled, Kbuild gives an unmet dependency. However, these config options do not actually need to depend on CRYPTO. Signed-off-by: Julian Braha --- crypto/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [PATCH 3/5] crypto: ccp: Play nice with vmalloc'd memory for SEV command structs

On Sun, Apr 04, 2021, Christophe Leroy wrote: > > Le 03/04/2021 à 01:37, Sean Christopherson a écrit : > > @@ -152,11 +153,21 @@ static int __sev_do_cmd_locked(int cmd, void *data, > > int *psp_ret) > > sev = psp->sev_data; > > buf_len = sev_cmd_buffer_len(cmd); > > - if (WARN_ON_ONCE(!

Re: [PATCH 1/2] mtd: spi-nor: sfdp: save a copy of the SFDP data

Hi, Am 2021-04-05 15:11, schrieb tudor.amba...@microchip.com: On 3/18/21 11:24 AM, Michael Walle wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Due to possible mode switching to 8D-8D-8D, it might not be possible to read the SFDP after the

Re: [Outreachy kernel] [PATCH] staging: emxx_udc: Ending line with argument

On Mon, 5 Apr 2021, Beatriz Martins de Carvalho wrote: > > Em 01/04/21 22:16, Julia Lawall escreveu: > > > > On Thu, 1 Apr 2021, Beatriz Martins de Carvalho wrote: > > > > > Cleans up check of "Lines should not end with a '('" > > > with argument present in next line in file emxx_udc.c > > The

[PATCH 0/2] minor cleanups of include/linux/mm.h

From: Mike Rapoport Hi, While looking at recent page_mapping_file() changes I've noticed that page_rmapping() and page_anon_vma() could be moved from include/linux/mm.h and we don't need two forward declarations of page_mapping(). I've also noticed that except page_mapping_file() we have somewh

[PATCH 1/2] mm: move page_rmapping() and page_anon_vma() to mm/internal.h

From: Mike Rapoport The functions page_rmapping() and page_anon_vma() are not used outside core mm. Move their declaration from include/linux/mm.h to mm/internal.h Signed-off-by: Mike Rapoport --- include/linux/mm.h | 2 -- mm/internal.h | 3 +++ 2 files changed, 3 insertions(+), 2 deleti

[PATCH 2/2] include/linux/mm.h: remove duplicated declaration of page_mapping()

From: Mike Rapoport There are two declarations of page_mapping() in include/linux/mm.h a dozen lines apart. Remove the older one with unnecessary "extern". Signed-off-by: Mike Rapoport --- include/linux/mm.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/linux/mm.h b/include/lin

Re: [PATCH v11 00/13] Add AMD SEV guest live migration support

Could this patch set include support for the SEND_CANCEL command? On Mon, Apr 5, 2021 at 8:20 AM Ashish Kalra wrote: > > From: Ashish Kalra > > The series add support for AMD SEV guest live migration commands. To protect > the > confidentiality of an SEV protected guest memory while in transit

[PATCH V5 00/25] Add Alder Lake support for perf (kernel)

From: Kan Liang Changes since V4: - Put the X86_HYBRID_CPU_TYPE_ID_SHIFT over the function where it is used (Boris) (Patch 2) - Add Acked-by from Boris for Patch 1 & 2 - Fix a smatch warning, "allocate_fake_cpuc() warn: possible memory leak of 'cpuc'" (0-DAY test) (Patch 16) Changes since V3

[PATCH V5 01/25] x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit

From: Ricardo Neri Add feature enumeration to identify a processor with Intel Hybrid Technology: one in which CPUs of more than one type are the same package. On a hybrid processor, all CPUs support the same homogeneous (i.e., symmetric) instruction set. All CPUs enumerate the same features in CP

[PATCH V5 03/25] perf/x86: Track pmu in per-CPU cpu_hw_events

From: Kan Liang Some platforms, e.g. Alder Lake, have hybrid architecture. In the same package, there may be more than one type of CPU. The PMU capabilities are different among different types of CPU. Perf will register a dedicated PMU for each type of CPU. Add a 'pmu' variable in the struct cpu

[PATCH V5 04/25] perf/x86/intel: Hybrid PMU support for perf capabilities

From: Kan Liang Some platforms, e.g. Alder Lake, have hybrid architecture. Although most PMU capabilities are the same, there are still some unique PMU capabilities for different hybrid PMUs. Perf should register a dedicated pmu for each hybrid PMU. Add a new struct x86_hybrid_pmu, which saves t

[PATCH V5 02/25] x86/cpu: Add helper function to get the type of the current hybrid CPU

From: Ricardo Neri On processors with Intel Hybrid Technology (i.e., one having more than one type of CPU in the same package), all CPUs support the same instruction set and enumerate the same features on CPUID. Thus, all software can run on any CPU without restrictions. However, there may be mod

RE: [PATCH v6 1/2] platform/x86: dell-privacy: Add support for Dell hardware privacy

> > I think this could be `dev_info()`, but definitely not `dev_err()`. Although > I'd > personally move the logging from here to the probe function if you want to log > which features are available. `ret` is necessarily 1 here, so I don't think > printing it > provides additional information. To

[PATCH V5 10/25] perf/x86: Hybrid PMU support for extra_regs

From: Kan Liang Different hybrid PMU may have different extra registers, e.g. Core PMU may have offcore registers, frontend register and ldlat register. Atom core may only have offcore registers and ldlat register. Each hybrid PMU should use its own extra_regs. An Intel Hybrid system should alwa

[PATCH V5 11/25] perf/x86/intel: Factor out intel_pmu_check_num_counters

From: Kan Liang Each Hybrid PMU has to check its own number of counters and mask fixed counters before registration. The intel_pmu_check_num_counters will be reused later to check the number of the counters for each hybrid PMU. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/ev

[PATCH V5 07/25] perf/x86: Hybrid PMU support for unconstrained

From: Kan Liang The unconstrained value depends on the number of GP and fixed counters. Each hybrid PMU should use its own unconstrained. Suggested-by: Peter Zijlstra (Intel) Signed-off-by: Kan Liang --- arch/x86/events/intel/core.c | 5 - arch/x86/events/perf_event.h | 1 + 2 files chang

[PATCH V5 14/25] perf/x86: Remove temporary pmu assignment in event_init

From: Kan Liang The temporary pmu assignment in event_init is unnecessary. The assignment was introduced by commit 8113070d6639 ("perf_events: Add fast-path to the rescheduling code"). At that time, event->pmu is not assigned yet when initializing an event. The assignment is required. However, f

[PATCH V5 09/25] perf/x86: Hybrid PMU support for event constraints

From: Kan Liang The events are different among hybrid PMUs. Each hybrid PMU should use its own event constraints. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/events/core.c | 3 ++- arch/x86/events/intel/core.c | 5 +++-- arch/x86/events/intel/ds.c | 5 +++-- arch/x86

[PATCH V5 08/25] perf/x86: Hybrid PMU support for hardware cache event

From: Kan Liang The hardware cache events are different among hybrid PMUs. Each hybrid PMU should have its own hw cache event table. The hw_cache_extra_regs is not part of the struct x86_pmu, the hybrid() cannot be applied here. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/e

[PATCH V5 13/25] perf/x86/intel: Factor out intel_pmu_check_extra_regs

From: Kan Liang Each Hybrid PMU has to check and update its own extra registers before registration. The intel_pmu_check_extra_regs will be reused later to check the extra registers of each hybrid PMU. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/events/intel/core.c | 35 +++

[PATCH V5 06/25] perf/x86: Hybrid PMU support for counters

From: Kan Liang The number of GP and fixed counters are different among hybrid PMUs. Each hybrid PMU should use its own counter related information. When handling a certain hybrid PMU, apply the number of counters from the corresponding hybrid PMU. When reserving the counters in the initializat

[PATCH V5 05/25] perf/x86: Hybrid PMU support for intel_ctrl

From: Kan Liang The intel_ctrl is the counter mask of a PMU. The PMU counter information may be different among hybrid PMUs, each hybrid PMU should use its own intel_ctrl to check and access the counters. When handling a certain hybrid PMU, apply the intel_ctrl from the corresponding hybrid PMU.

[PATCH V5 12/25] perf/x86/intel: Factor out intel_pmu_check_event_constraints

From: Kan Liang Each Hybrid PMU has to check and update its own event constraints before registration. The intel_pmu_check_event_constraints will be reused later to check the event constraints of each hybrid PMU. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/events/intel/core

[PATCH V5 15/25] perf/x86: Factor out x86_pmu_show_pmu_cap

From: Kan Liang The PMU capabilities are different among hybrid PMUs. Perf should dump the PMU capabilities information for each hybrid PMU. Factor out x86_pmu_show_pmu_cap() which shows the PMU capabilities information. The function will be reused later when registering a dedicated hybrid PMU.

[PATCH V5 17/25] perf/x86: Add structures for the attributes of Hybrid PMUs

From: Kan Liang Hybrid PMUs have different events and formats. In theory, Hybrid PMU specific attributes should be maintained in the dedicated struct x86_hybrid_pmu, but it wastes space because the events and formats are similar among Hybrid PMUs. To reduce duplication, all hybrid PMUs will shar

[PATCH V5 18/25] perf/x86/intel: Add attr_update for Hybrid PMUs

From: Kan Liang The attribute_group for Hybrid PMUs should be different from the previous cpu PMU. For example, cpumask is required for a Hybrid PMU. The PMU type should be included in the event and format attribute. Add hybrid_attr_update for the Hybrid PMU. Check the PMU type in is_visible() f

[PATCH V5 16/25] perf/x86: Register hybrid PMUs

From: Kan Liang Different hybrid PMUs have different PMU capabilities and events. Perf should registers a dedicated PMU for each of them. To check the X86 event, perf has to go through all possible hybrid pmus. All the hybrid PMUs are registered at boot time. Before the registration, add intel_

[PATCH V5 19/25] perf/x86: Support filter_match callback

From: Kan Liang Implement filter_match callback for X86, which check whether an event is schedulable on the current CPU. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/events/core.c | 10 ++ arch/x86/events/perf_event.h | 1 + 2 files changed, 11 insertions(+) d

[PATCH V5 20/25] perf/x86/intel: Add Alder Lake Hybrid support

From: Kan Liang Alder Lake Hybrid system has two different types of core, Golden Cove core and Gracemont core. The Golden Cove core is registered to "cpu_core" PMU. The Gracemont core is registered to "cpu_atom" PMU. The difference between the two PMUs include: - Number of GP and fixed counters

[PATCH V5 21/25] perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU

From: Kan Liang Current Hardware events and Hardware cache events have special perf types, PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE. The two types don't pass the PMU type in the user interface. For a hybrid system, the perf subsystem doesn't know which PMU the events belong to. The first capable

[PATCH V5 23/25] perf/x86/msr: Add Alder Lake CPU support

From: Kan Liang PPERF and SMI_COUNT MSRs are also supported on Alder Lake. The External Design Specification (EDS) is not published yet. It comes from an authoritative internal source. The patch has been tested on real hardware. Reviewed-by: Andi Kleen Signed-off-by: Kan Liang --- arch/x86/

[PATCH V5 22/25] perf/x86/intel/uncore: Add Alder Lake support

From: Kan Liang The uncore subsystem for Alder Lake is similar to the previous Tiger Lake. The difference includes: - New MSR addresses for global control, fixed counters, CBOX and ARB. Add a new adl_uncore_msr_ops for uncore operations. - Add a new threshold field for CBOX. - New PCIIDs for I

[PATCH V5 25/25] perf/x86/rapl: Add support for Intel Alder Lake

From: Zhang Rui Alder Lake RAPL support is the same as previous Sky Lake. Add Alder Lake model for RAPL. Reviewed-by: Andi Kleen Signed-off-by: Zhang Rui --- arch/x86/events/rapl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index f42a

[PATCH V5 24/25] perf/x86/cstate: Add Alder Lake CPU support

From: Kan Liang Compared with the Rocket Lake, the CORE C1 Residency Counter is added for Alder Lake, but the CORE C3 Residency Counter is removed. Other counters are the same. Create a new adl_cstates for Alder Lake. Update the comments accordingly. The External Design Specification (EDS) is n

Re: [PATCH] torture: Correctly fetch CPUs for kvm-build.sh with all native language

On Mon, Apr 05, 2021 at 04:23:09PM +0200, Christian Kujau wrote: > On Thu, 1 Apr 2021, Paul E. McKenney wrote: > > +# This script knows only English. > > +LANG=en_US.UTF-8; export LANG > > This, too, will only work if en_US.UTF-8 is installed . Check with "locale > -a" if it is. Also, Perl will c

Re: [PATCH rdma-next 01/10] RDMA: Add access flags to ib_alloc_mr() and ib_mr_pool_init()

On 4/4/21 10:23 PM, Leon Romanovsky wrote: > diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h > index bed4cfe50554..59138174affa 100644 > --- a/include/rdma/ib_verbs.h > +++ b/include/rdma/ib_verbs.h > @@ -2444,10 +2444,10 @@ struct ib_device_ops { >

Re: [PATCH 5.10 004/126] ext4: shrink race window in ext4_should_retry_alloc()

Hi! > From: Eric Whitney > A per filesystem percpu counter exported via sysfs is added to allow > users or developers to track the number of times the retry limit is > exceeded without resorting to debugging methods. This should provide > some insight into worst case retry behavior. This adds

Re: [PATCH v3 3/4] kernel/smp: add more data to CSD lock debugging

On Mon, Apr 05, 2021 at 09:37:40AM +0200, Juergen Gross wrote: > On 02.04.21 18:11, Paul E. McKenney wrote: > > On Fri, Apr 02, 2021 at 05:46:52PM +0200, Juergen Gross wrote: > > > On 30.03.21 19:33, Paul E. McKenney wrote: > > > > On Wed, Mar 24, 2021 at 11:18:03AM +0100, Jürgen Groß wrote: > > >

[PATCH] ubifs: default to zstd compression

Compared to lzo and zlib, zstd is the best all-around performer, both in terms of speed and compression ratio. Set it as the default, if available. Signed-off-by: Rui Salvaterra --- fs/ubifs/sb.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/fs/ubifs/sb.c b/fs/ubifs/sb.c index c160f718c

Re: [PATCH 5.10 039/126] can: dev: move driver related infrastructure into separate subdir

Hi! > From: Marc Kleine-Budde > > [ Upstream commit 3e77f70e734584e0ad1038e459ed3fd2400f873a ] > > This patch moves the CAN driver related infrastructure into a separate subdir. > It will be split into more files in the coming patches. I don't think this is suitable for stable. I don't think a

Re: [PATCH 0/4] occ: fsi and hwmon: Fixes for polling un-initialized OCC

On Tue, 2021-02-09 at 11:12 -0600, Eddie James wrote: > In the event that the OCC is not initialized when the driver sends a > poll > command, the driver may receive an invalid response. This isn't an > error > condition unless there is no valid response before the timeout > expires. So > change th

Re: [PATCH 5.10 047/126] ath10k: hold RCU lock when calling ieee80211_find_sta_by_ifaddr()

Hi! > Fix ath10k_wmi_tlv_op_pull_peer_stats_info() to hold RCU lock before it > calls ieee80211_find_sta_by_ifaddr() and release it when the resulting > pointer is no longer needed. It does that. But is also does the unlock even if it did not take the lock: > +++ b/drivers/net/wireless/ath/ath10

Re: [PATCH 5.10 048/126] net: ethernet: aquantia: Handle error cleanup of start on open

Hi! > From: Nathan Rossi > > [ Upstream commit 8a28af7a3e85ddf358f8c41e401a33002f7a9587 ] > > The aq_nic_start function can fail in a variety of cases which leaves > the device in broken state. > > An example case where the start function fails is the > request_threaded_irq which can be interr

Re: [PATCH 1/2] power: supply: Add battery driver for Surface Aggregator Module

Hi, On Tue, Mar 09, 2021 at 01:05:29AM +0100, Maximilian Luz wrote: > On newer Microsoft Surface models (specifically 7th-generation, i.e. > Surface Pro 7, Surface Book 3, Surface Laptop 3, and Surface Laptop Go), > battery and AC status/information is no longer handled via standard ACPI > devices

Re: [PATCH 5.10 079/126] drm/tegra: sor: Grab runtime PM reference across reset

Hi! > However, these functions alone don't provide any guarantees at the > system level. Drivers need to ensure that the only a single consumer has > access to the reset at the same time. In order for the SOR to be able to > exclusively access its reset, it must therefore ensure that the SOR > pow

Re: [PATCH 1/2] mtd: spi-nor: sfdp: save a copy of the SFDP data

On 4/5/21 6:07 PM, Michael Walle wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi, > > Am 2021-04-05 15:11, schrieb tudor.amba...@microchip.com: >> On 3/18/21 11:24 AM, Michael Walle wrote: >>> EXTERNAL EMAIL: Do not click links or open

[syzbot] WARNING: suspicious RCU usage in lock_sock_nested

Hello, syzbot found the following issue on: HEAD commit:d19cc4bf Merge tag 'trace-v5.12-rc5' of git://git.kernel.o.. git tree: upstream console output: https://syzkaller.appspot.com/x/log.txt?x=14898326d0 kernel config: https://syzkaller.appspot.com/x/.config?x=d1a3d65a48dbd1bc das

Re: [PATCH 2/2] power: supply: Add AC driver for Surface Aggregator Module

Hi, On Tue, Mar 09, 2021 at 01:05:30AM +0100, Maximilian Luz wrote: > On newer Microsoft Surface models (specifically 7th-generation, i.e. > Surface Pro 7, Surface Book 3, Surface Laptop 3, and Surface Laptop Go), > battery and AC status/information is no longer handled via standard ACPI > devices

[PATCH v2 00/30] media: atmel: atmel-isc: add support for xisc

Hello, This series adds support for a variant of the ISC named XISC. This block is present in the product named sama7g5. I started by moving code around, the code which was specialized for sama5d2 type of ISC, to have it inside the dedicated sama5d2 file. I added several new pipeline elements to

[PATCH v2 01/30] media: atmel: atmel-isc: specialize gamma table into product specific

Separate the gamma table from the isc base file into the specific sama5d2 product file. Add a pointer to the gamma table and entries count inside the platform driver specific struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 47 ++- drivers/

[PATCH v2 02/30] media: atmel: atmel-isc: specialize driver name constant

The driver name constant must defined based on product driver, thus moving the constant directly where it's required. This will allow each ISC based product to define it's own name. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 4 ++-- drivers/media/platform

[PATCH v2 03/30] media: atmel: atmel-isc: add checks for limiting frame sizes

When calling the subdev, certain subdev drivers will overwrite the frame size and adding sizes which are beyond the ISC's capabilities. Thus we need to ensure the frame size is cropped to the maximum caps. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 12 ++

[PATCH v2 04/30] media: atmel: atmel-isc: specialize max width and max height

Move the max width and max height constants to the product specific driver and have them in the device struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 28 +-- drivers/media/platform/atmel/atmel-isc.h | 9 -- .../media/platform/at

[PATCH v2 05/30] media: atmel: atmel-isc: specialize dma cfg

The dma configuration (DCFG) is specific to the product. Move this configuration in the product specific driver, and add the field inside the driver struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 3 +-- drivers/media/platform/atmel/atmel-isc.h

[PATCH v2 06/30] media: atmel: atmel-isc: extract CSC submodule config into separate function

The CSC submodule should be initialized in the product specific driver as it's product specific. Other products can implement it differently. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c |

[PATCH v2 07/30] media: atmel: atmel-isc-base: add id to clock debug message

Add the clock id to the debug message regarding clock setup Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-isc-base.c b/drivers/media/platform/atmel/atmel-i

[PATCH v2 09/30] media: atmel: atmel-isc: extract CBC submodule config into separate function

The CBC submodule should be initialized in the product specific driver as it's product specific. Other products can implement it differently Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c|

[PATCH v2 08/30] media: atmel: atmel-isc: create register offsets struct

Create a struct that holds register offsets that are product specific. Add initially the CSC register. This allows each product that contains a variant of the ISC to add their own register offset. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 2 +- drivers/med

[PATCH v2 10/30] media: atmel: atmel-isc: add CBC to the reg offsets struct

Add cbc to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 2 +- drivers/media/platform/atmel/atmel-isc-regs.h| 3 +++ drivers/media/platf

[PATCH v2 11/30] media: atmel: atmel-isc: add SUB422 and SUB420 to register offsets

Add sub420 and sub422 to the reg offsets struct. This will allow different products to have a different reg offset for these particular modules. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 4 ++-- drivers/media/platform/atmel/atmel-isc-regs.h| 4

[PATCH v2 12/30] media: atmel: atmel-isc: add RLP to register offsets

Add rlp to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 4 ++-- drivers/media/platform/atmel/atmel-isc-regs.h| 2 ++ drivers/media/plat

[PATCH] powerpc/kconfig: Restore alphabetic order of the selects under CONFIG_PPC

Commit a7d2475af7ae ("powerpc: Sort the selects under CONFIG_PPC") sorted all selects under CONFIG_PPC. 4 years later, several items have been introduced at wrong place, a few other have been renamed without moving them to their correct place. Reorder them now. While we are at it, simplify the t

[GIT PULL] arm64: dts: TI K3 updates for v5.13

Hi, Please pull the following device tree changes for v5.13 cycle. The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: Linux 5.12-rc2 (2021-03-05 17:33:41 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git

[PATCH v2 13/30] media: atmel: atmel-isc: add HIS to register offsets

Add his to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 11 +++ drivers/media/platform/atmel/atmel-isc-regs.h| 2 ++ drivers/m

[PATCH v2 14/30] media: atmel: atmel-isc: add DMA to register offsets

Add dma to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 19 --- drivers/media/platform/atmel/atmel-isc-regs.h | 3 +++ driver

[PATCH v2 15/30] media: atmel: atmel-isc: add support for version register

Add support for version register and print it at probe time. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-regs.h| 5 + drivers/media/platform/atmel/atmel-isc.h | 2 ++ drivers/media/platform/atmel/atmel-sama5d2-isc.c | 5 + 3 files changed, 12 inser

[PATCH v2 16/30] media: atmel: atmel-isc: add his_entry to register offsets

Add his_entry to the reg offsets struct. This will allow different products to have a different reg offset for this particular module. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c| 3 ++- drivers/media/platform/atmel/atmel-isc-regs.h| 2 ++ drivers/media

[PATCH v2 17/30] media: atmel: atmel-isc: add register description for additional modules

Add register description for additional pipeline modules: the Defective Pixel Correction (DPC) and the Vertical and Horizontal Scaler(VHXS) Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-regs.h | 67 +++ 1 file changed, 67 insertions(+) diff --git a/driv

[PATCH v2 18/30] media: atmel: atmel-isc: extend pipeline with extra modules

Newer ISC pipelines have the additional modules of Defective Pixel Correction -> DPC itself, Defective Pixel Correction -> Green Disparity Correction (DPC_GDC) Defective Pixel Correction -> Black Level Correction (DPC_BLC) Vertical and Horizontal Scaler -> VHXS Some products have this full pipelin

[PATCH v2 19/30] media: atmel: atmel-isc: add CC initialization function

Implement the color correction (CC) submodule initialization, as a product specific function, which currently configures the neutral point in color correction. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atme

[PATCH v2 20/30] media: atmel: atmel-isc: create product specific v4l2 controls config

Create product specific callback for initializing v4l2 controls. Call this from v4l2 controls init function. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c| 5 +++-- drivers/media/platform/

[PATCH v2 21/30] media: atmel: atmel-isc: create callback for DPC submodule product specific

Create a product specific callback for initializing the DPC submodule of the pipeline. For sama5d2 product, this module does not exist, thus this function is a noop. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atme

[PATCH v2 22/30] media: atmel: atmel-isc: create callback for GAM submodule product specific

Create a product specific callback for initializing the GAM submodule of the pipeline. For sama5d2 product, there is no special configuration at this moment, thus this function is a noop. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drive

[PATCH v2 23/30] media: atmel: atmel-isc: create callback for RLP submodule product specific

Create a product specific callback for initializing the RLP submodule of the pipeline Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/media/platform/atmel/atmel-isc-base.c| 6 ++ drivers/media/platform/atmel/atmel-isc.h

[PATCH v2 24/30] media: atmel: atmel-isc: move the formats list into product specific code

The list of input and output formats has to be product specific. Move this list into the product specific code. Have pointers to these arrays inside the device struct. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 167 ++ drivers/media/platform/

[PATCH v2 25/30] media: atmel: atmel-isc: create an adapt pipeline callback for product specific

Once the pipeline is set in the base code, create a callback that will adapt the ISC pipeline to each product. Create the adapt_pipeline callback that will be used in this fashion. Signed-off-by: Eugen Hristev --- Changes in v2: - addded function prototype to avoid warning with W=1 drivers/medi

[PATCH v2 26/30] media: atmel: atmel-isc-regs: add additional fields for sama7g5 type pipeline

Add additional fields for registers present in sama7g5 type pipeline. Extend register masks for additional bits in sama7g5 type pipeline registers. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-regs.h | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(

[PATCH v2 27/30] media: atmel: atmel-isc-base: add support for more formats and additional pipeline modules

Add support for additional formats supported by newer pipelines, and for additional pipeline modules. Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-isc-base.c | 48 +++ 1 file changed, 38 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/at

Re: [PATCH v3] sched/debug: Use sched_debug_lock to serialize use of cgroup_path[] only

On Sun, 4 Apr 2021 21:27:00 -0400 Waiman Long wrote: > Thanks for the suggestion, but it also sound complicated. It's not that complicated. Similar tricks have been used elsewhere in the kernel. > > I think we can fix this lockup problem if we are willing to lose some It's not a lockup probl

[PATCH v2 28/30] dt-bindings: media: atmel: add microchip-xisc binding

Add bindings for the microchip xisc, a driver based on atmel-isc. It shares common code with atmel-isc, but the xisc is the next generation ISC which is present on sama7g5 product. It has an enhanced pipeline, additional modules, formats, and it supports not only parallel sensors, but also serial s

[PATCH v2 29/30] media: atmel: atmel-isc-sama5d2: remove duplicate define

Remove a duplicate definition of clock max divider Signed-off-by: Eugen Hristev --- drivers/media/platform/atmel/atmel-sama5d2-isc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/platform/atmel/atmel-sama5d2-isc.c b/drivers/media/platform/atmel/atmel-sama5d2-isc.c index b2a

[PATCH v2 30/30] media: atmel: atmel-isc: add microchip-xisc driver

Add driver for the extended variant of the isc, the microchip XISC present on sama7g5 product. Signed-off-by: Eugen Hristev --- Changes in v2: - adapted to new fwnode subdev style API, as in kernel 5.12. my old code was based on 5.10 style API. drivers/media/platform/Makefile |

Re: [PATCH 3/5] crypto: ccp: Play nice with vmalloc'd memory for SEV command structs

On 4/5/21 10:06 AM, Sean Christopherson wrote: > On Sun, Apr 04, 2021, Christophe Leroy wrote: >> Le 03/04/2021 à 01:37, Sean Christopherson a écrit : >>> @@ -152,11 +153,21 @@ static int __sev_do_cmd_locked(int cmd, void *data, >>> int *psp_ret) >>> sev = psp->sev_data; >>> buf_len = se

Re: [PATCH 1/2] mtd: spi-nor: sfdp: save a copy of the SFDP data

Am 2021-04-05 17:42, schrieb tudor.amba...@microchip.com: On 4/5/21 6:07 PM, Michael Walle wrote: EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe Hi, Am 2021-04-05 15:11, schrieb tudor.amba...@microchip.com: On 3/18/21 11:24 AM, Michael Walle wrote:

<    3   4   5   6   7   8   9   10   11   12   >