I'm the above named person Ms. Siena Ross, It is the situation of
things surrounding me has made me to cry to you because I never knew
things would turn this way after a painful death of my beloved husband
during the Italian corona virus and I became sick since and very
unwell up to the dates so do
On Sat, Mar 06, 2021 at 01:18:38PM +0530, Aditya wrote:
> On 6/3/21 11:55 am, Lukas Bulwahn wrote:
> > I agree. That might be a suitable clean-up to keep the code for
> > functions and struct/union parsing similar in style/spirit.
> >
> > Aditya, would you like to create a patch for that?
>
> Sur
On 2/17/21 10:40 PM, Lizhi Hou wrote:
> Add clock frequence counter driver. Clock frequence counter is
> a hardware function discovered by walking xclbin metadata. A platform
> device node will be created for it. Other part of driver can read the
> actual clock frequence through clock frequence c
On 2/17/21 10:40 PM, Lizhi Hou wrote:
> Add DDR calibration driver. DDR calibration is a hardware function
> discovered by walking firmware metadata. A platform device node will
> be created for it. Hardware provides DDR calibration status through
> this function.
>
> Signed-off-by: Sonal Santan
On Thu, Feb 04, 2021 at 01:13:13PM +0100, Luca Ceresoli wrote:
> The current code produces an error message on devm_gpiod_get() errors even
> when the error is -EPROBE_DEFER, which should be silent.
>
> This has been observed producing a significant amount of messages like:
>
> xlnx-slave-spi
On Thu, Feb 04, 2021 at 02:36:11PM +0100, Michal Simek wrote:
> Use already prepared dev_err_probe() introduced by commit a787e5400a1c
> ("driver core: add device probe log helper").
> It simplifies EPROBE_DEFER handling.
>
> Signed-off-by: Michal Simek
> ---
>
> drivers/fpga/xilinx-pr-decouple
Signed-off-by: Ramkumar Ramachandra
---
.mailmap | 1 +
1 file changed, 1 insertion(+)
diff --git a/.mailmap b/.mailmap
index 85b93cdefc87..78bff5f1e881 100644
--- a/.mailmap
+++ b/.mailmap
@@ -282,6 +282,7 @@ Rafael J. Wysocki
Rajesh Shah
Ralf Baechle
Ralf Wildenhues
+Ramkumar Ramachand
On 2/17/21 10:40 PM, Lizhi Hou wrote:
> Add partition isolation platform driver. partition isolation is
> a hardware function discovered by walking firmware metadata.
> A platform device node will be created for it. Partition isolation
> function isolate the different fpga regions
>
> Signed-off-
First of all, I've based this on the patches sent by Jonas Gorski back in
2016:
https://www.spinics.net/lists/linux-gpio/msg15983.html
http://patchwork.ozlabs.org/project/linux-gpio/patch/1471604025-21575-2-git-send-email-jonas.gor...@gmail.com/
I've tried to address all coments from Linus Walleij
This is needed for properly registering GPIO regmap as a child of a regmap
pin controller.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Michael Walle
---
v5: switch to fwnode
v4: fix documentation
v3: introduce patch needed for properly parsing gpio-range
drivers/gpio/gpio-regmap.c |
Add a pincontrol driver for BCM6328. BCM6328 supports muxing 32 pins as
GPIOs, as LEDs for the integrated LED controller, or various other
functions. Its pincontrol mux registers also control other aspects, like
switching the second USB port between host and device mode.
Signed-off-by: Jonas Gorsk
Add a helper for registering BCM63XX pin controllers.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: add changes suggested by Andy Shevchenko
v4: drop IRQ selects from Kconfig and add missing of_node_put()
v3: add new patch with shared
Add binding documentation for the pincontrol core found in BCM6328 SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove interrupts
.
The current code doesn't check if GPIOLIB_IRQCHIP is enabled, which results in
a compilation error when trying to build gpio-regmap if CONFIG_GPIOLIB_IRQCHIP
isn't enabled.
Fixes: 6a45b0e2589f ("gpiolib: Introduce gpiochip_irqchip_add_domain()")
Suggested-by: Michael Walle
Signed-off-by: Álvaro F
Add binding documentation for the pincontrol core found in BCM6358 SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove interrupts
.
Add binding documentation for the pincontrol core found in BCM6362 SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove interrupts
.
Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
functions onto the GPIO pins. It does not support configuring individual
pins but only whole groups. These groups may overlap, and still require
the directions to be set correctly in the GPIO register. In addition the
functions
Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
GPIO pins to the LED controller, to be available by the integrated
wifi, or other functions. It also supports overlay groups, of which
only NAND is documented.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-of
Add binding documentation for the pincontrol core found in BCM6368 SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove interrupts
.
Add binding documentation for the pincontrol core found in the BCM63268
family SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove in
Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
GPIOs onto alternative functions. Not all are documented.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: add changes suggested by Andy Shevchenko
v4: no changes
v3
Add binding documentation for the pincontrol core found in BCM6318 SoCs.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: change Documentation to dt-bindings in commit title
v4: no changes
v3: add new gpio node
v2: remove interrupts
.
Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
to different functions. Depending on the mux, these are either single
pin configurations or whole pin groups.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Signed-off-by: Álvaro Fernández Rojas
---
v5: add changes s
Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
to different functions. BCM6318 is similar to BCM6328 with the addition
of a pad register, and the GPIO meaning of the mux register changes
based on the GPIO number.
Signed-off-by: Jonas Gorski
Co-developed-by: Jonas Gorski
Si
Hi James,
> On 05.02.21 01:34, James Bottomley wrote:
>> The reporter went silent before we could get this tested, but could you
>> try, please, because your patch is still hand rolling the ops get/put,
>> just slightly better than it had been done previously.
>
> I tested your patch and it fixes
On 06/03/2021 15:21, Christophe JAILLET wrote:
> Since commit 188db4435ac6 ("usb: gadget: s3c: use platform resources"),
> 'request_mem_region()' and 'ioremap()' are no more used, so they don't need
> to be undone in the error handling path of the probe and in the removre
You ignored my comment ab
On Fri, Mar 05, 2021 at 06:54:24PM -0800, Asutosh Das (asd) wrote:
> Now during my testing I see a weird issue sometimes (1 in 7).
> Scenario - bootups
>
> Issue:
> The supplier 'ufs_device_wlun 0:0:0:49488' goes into runtime suspend even
> when one/more of its consumers are in RPM_ACTIVE state.
On 06/03/2021 15:21, Christophe JAILLET wrote:
> Some 'clk_prepare_enable()' and 'clk_get()' must be undone in the error
> handling path of the probe function, as already done in the remove
> function.
>
> Fixes: 3fc154b6b813 ("USB Gadget driver for Samsung s3c2410 ARM SoC")
> Signed-off-by: Chris
On 23.02.21 10:26, Ross Lagerwall wrote:
On 2021-02-19 15:40, Juergen Gross wrote:
An event channel should be kept masked when an eoi is pending for it.
When being migrated to another cpu it might be unmasked, though.
In order to avoid this keep three different flags for each event channel
to b
Those are fixes for XSA-332.
The rest of the V3 patches have been applied already. There is one
additional fix in patch 2 which addresses network outages when a guest
is doing reboot loops.
Juergen Gross (3):
xen/events: reset affinity of 2-level event when tearing it down
xen/events: don't u
An event channel should be kept masked when an eoi is pending for it.
When being migrated to another cpu it might be unmasked, though.
In order to avoid this keep three different flags for each event channel
to be able to distinguish "normal" masking/unmasking from eoi related
masking/unmasking an
When creating a new event channel with 2-level events the affinity
needs to be reset initially in order to avoid using an old affinity
from earlier usage of the event channel port. So when tearing an event
channel down reset all affinity bits.
The same applies to the affinity when onlining a vcpu:
When changing the cpu affinity of an event it can happen today that
(with some unlucky timing) the same event will be handled on the old
and the new cpu at the same time.
Avoid that by adding an "event active" flag to the per-event data and
call the handler only if this flag isn't set.
Cc: sta...
On Sat, Mar 06, 2021 at 08:06:44PM +0800, zhangkun...@163.com wrote:
> From: Zhang Kun
>
> The value assigned to len by sg_pcopy_from_buffer() never used for
> anything, so remove it.
>
> Signed-off-by: Zhang Kun
> ---
> drivers/usb/host/xhci.c | 3 +--
> 1 file changed, 1 insertion(+), 2 dele
On Sat, Mar 6, 2021 at 5:57 PM Álvaro Fernández Rojas wrote:
>
> This is needed for properly registering GPIO regmap as a child of a regmap
> pin controller.
Thanks for an update!
...
> chip->parent = config->parent;
> + if (config->fwnode)
This...
> + chip->of_no
On Fri, Mar 05, 2021 at 01:22:29PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.260 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
As pointed by Lars, this doesn't require a zero-check. Also, while looking
at this a little closer at it (again), the masking can be done later, as
there is a zero-check for 'mode_flags' anyway, which returns -EINVAL. And
we only need the 'mode_flags' later in the logic.
This change is more of a t
On Fri, Mar 05, 2021 at 01:22:07PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.260 release.
> There are 41 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Fri, Mar 05, 2021 at 01:22:07PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.260 release.
> There are 41 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Fri, Mar 05, 2021 at 01:21:59PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.224 release.
> There are 39 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me kno
On Fri, Mar 05, 2021 at 01:22:29PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.260 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Fri, Mar 05, 2021 at 01:21:31PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.179 release.
> There are 52 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me kno
On Fri, Mar 05, 2021 at 01:21:02PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.4.103 release.
> There are 72 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Fri, Mar 05, 2021 at 01:20:05PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.11.4 release.
> There are 104 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know
On Fri, 5 Mar 2021 07:05:36 +
LI Qingwu wrote:
> Add support for STMicroelectronics digital magnetic sensors,
> LSM303AH,LSM303AGR,LIS2MDL,ISM303DAC,IIS2MDC.
>
> The patch tested with IIS2MDC instrument.
>
> Signed-off-by: LI Qingwu
Hi,
Given that at least two parts in here is supported
Thanks to Lars for finding this.
The free of the 'attached_buffers' array should be done as late as
possible. This change moves it to iio_buffers_put(), which looks like
the best place for it, since it takes place right before the IIO device
data is free'd.
The free of this array will be handled by
On Tue, 2 Mar 2021 23:56:46 +0900
William Breathitt Gray wrote:
> On Tue, Mar 02, 2021 at 03:43:55PM +0100, Fabrice Gasnier wrote:
> > The ceiling value isn't checked before writing it into registers. The user
> > could write a value higher than the counter resolution (e.g. 16 or 32 bits
> > indi
On Thu, 4 Mar 2021 08:42:03 +0900
William Breathitt Gray wrote:
> On Wed, Mar 03, 2021 at 06:49:49PM +0100, Fabrice Gasnier wrote:
> > Ceiling value may be miss-aligned with what's actually configured into the
> > ARR register. This is seen after probe as currently the ARR value is zero,
> > wher
On Fri, Mar 05, 2021 at 01:20:19PM +0100, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.10.21 release.
> There are 102 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me kno
Hello,
On Wed, Feb 17, 2021 at 12:02:47PM +0100, Enrico Weigelt, metux IT consult
wrote:
> On 16.02.21 14:30, Andreas Eberlein wrote:
> > The DMI_PRODUCT_NAME entry on current firmware of PC Engines APU1 changed
> > from "APU" to "apu1"
> >
> > This modification adds the missing DMI data and the
On Sat, Mar 06, 2021 at 07:42:30AM +0100, Sedat Dilek wrote:
> No, with Debian-Kernel 5.10.19-1 there are no xhci-resets:
Is the kernel the only thing that is different? The rest of the
operating system and environment is exactly the same?
> But I see there is already a quirk enabled and matche
On Sun, Feb 28, 2021 at 9:00 PM Jonathan Cameron
wrote:
>
> On Sun, 28 Feb 2021 16:51:51 +0100
> Lars-Peter Clausen wrote:
>
> > On 2/28/21 3:34 PM, Jonathan Cameron wrote:
> > > On Sun, 28 Feb 2021 09:51:38 +0100
> > > Lars-Peter Clausen wrote:
> > >
> > >> On 2/15/21 11:40 AM, Alexandru Ardele
On Wed, 3 Mar 2021 13:47:24 +0100
Sean Nyekjaer wrote:
> It will be easier to configure various device registers.
What do you mean by this? I'm not against regmap, but I think
a stronger rational for the change is needed.
A few specific comments inline, but nothing major.
Jonathan
>
> No fu
On Wed, 3 Mar 2021 14:36:12 +0800
Ye Xiang wrote:
> This patch ensures that, there is sufficient space and correct
> alignment for the timestamp.
>
> Fixes: d7ed89d5aadf ("iio: hid: Add humidity sensor support")
> Signed-off-by: Ye Xiang
ouch. I guess we were trampling over the next few eleme
Hi Mark-PK,
I'm trying to understand the logic behind the changes.
It seems like the polarity of interrupts is always the same between
the MStar intc and the GIC? Low level interrupts are handled in the
mstar intc and become high level interrupts to the GIC?
I think for the Mstar MSC313(e) and Sig
On Wed, 3 Mar 2021 14:36:14 +0800
Ye Xiang wrote:
> This patch fixes 2 issues of timestamp channel:
> 1. This patch ensures that there is sufficient space and correct
> alignment for the timestamp.
> 2. Correct the timestamp channel scan index.
This isn't technically a bug because channel index
On Tue, 2 Mar 2021 01:50:01 +0200
Andy Shevchenko wrote:
> On Monday, March 1, 2021, wrote:
>
> > From: Alexandru Tachici
> >
Nothing to add to Andy's comment, but curious at this being 0/1
that should be the cover letter, not a second copy of the patch.
> > Currently AD7124-8 driver cannot
On Tue, 2 Mar 2021 16:45:10 +0100
Linus Walleij wrote:
> On Mon, Mar 1, 2021 at 9:04 AM Dinghao Liu wrote:
>
> > There is one regmap_bulk_read() call in mpu3050_trigger_handler
> > that we have caught its return value bug lack further handling.
> > Check and terminate the execution flow just li
On Fri, Mar 05, 2021 at 04:57:36PM +0100, Nirmoy wrote:
>
> On 3/5/21 4:40 PM, Deucher, Alexander wrote:
> > [AMD Public Use]
> >
> > > -Original Message-
> > > From: Koenig, Christian
> > > Sent: Friday, March 5, 2021 10:35 AM
> > > To: Sasha Levin ; Deucher, Alexander
> > >
> > > Cc:
On Mon, 1 Mar 2021 16:16:22 +0800
Dinghao Liu wrote:
> There is one vadc_poll_wait_eoc() call in vadc_do_conversion
> that we have caught its return value but lack further handling.
> Check and jump to err_disable label just like the other
> vadc_poll_wait_eoc() in this function.
>
> Signed-off
On Mon, Mar 01, 2021 at 06:48:46AM +, Sonal Santan wrote:
> Hello Tom,
>
> > -Original Message-
> > From: Tom Rix
> > Sent: Friday, February 19, 2021 2:26 PM
> > To: Lizhi Hou ; linux-kernel@vger.kernel.org
> > Cc: Lizhi Hou ; linux-f...@vger.kernel.org; Max Zhen
> > ; Sonal Santan ;
On Sat, Mar 06, 2021 at 10:54:40AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Mar 05, 2021 at 07:24:28PM -0800, Guenter Roeck wrote:
> > On Fri, Mar 05, 2021 at 01:20:19PM +0100, Greg Kroah-Hartman wrote:
> > > This is the start of the stable review cycle for the 5.10.21 release.
> > > There are 10
On Mon, 1 Mar 2021 16:32:54 +0200
Eugen Hristev wrote:
> The hw_init hardware init call must happen after the clock is prepared and
> enabled. Otherwise, writing to the registers might lead to a block or
> external abort.
Fix for existing parts or something only needed for the new devices?
If it
Le 06/03/2021 à 17:16, Krzysztof Kozlowski a écrit :
On 06/03/2021 15:21, Christophe JAILLET wrote:
Some 'clk_prepare_enable()' and 'clk_get()' must be undone in the error
handling path of the probe function, as already done in the remove
function.
Fixes: 3fc154b6b813 ("USB Gadget driver for Sa
On Mon, 1 Mar 2021 16:32:56 +0200
Eugen Hristev wrote:
> Add support to sama7g5 ADC which is similar with sama5d2/sam9x60 device.
> Differences are highlighted by compatible.
> Main differences include 16 channels instead of 12 and missing
> resistive touchscreen.
>
> Signed-off-by: Eugen Hriste
On Fri, 5 Mar 2021 08:57:08 +
"Hennerich, Michael" wrote:
> Hi Jonathan and others,
>
> With output/dac buffer support the semantics of the scan_element type may
> change.
>
> Today the Format is [be|le]:[s|u]bits/storagebitsXrepeat[>>shift].
>
> While shift (if specified) is the shift th
On Mon, 1 Mar 2021 09:00:28 +0100
Sean Nyekjaer wrote:
> Improve readability by fixing indentation.
>
> Signed-off-by: Sean Nyekjaer
Applied.
Thanks,
Jonathan
> ---
> v2: removed fixing of register values indentation
>
> drivers/iio/accel/mma8452.c | 46 ++-
On Sat, Mar 06, 2021 at 12:38:02AM +0100, Pali Rohár wrote:
On Thursday 04 March 2021 17:33:01 Sasha Levin wrote:
On Thu, Feb 25, 2021 at 08:03:06PM +0100, Pali Rohár wrote:
> On Wednesday 24 February 2021 07:49:34 Sasha Levin wrote:
> > From: Pali Rohár
> >
> > [ Upstream commit f0b4f847673299
Hi Bjorn,
On 06/03/2021 3:37 am, Bjorn Andersson wrote:
> On Fri 05 Mar 15:35 CST 2021, Caleb Connolly wrote:
>
> Please add "qcom: " to $subject as well.
>
>> Add a minimal devicetree capable of booting on the Pixel 2 XL MSM8998
>> device.
>>
>> It's currently possible to boot the device into pos
Commit 6ac9b61786cc ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.
But as ioread/iowrite accessors are now equivale
Commit 6ac9b61786cc ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.
But as ioread/iowrite accessors are now equivale
Commit 6ac9b61786cc ("soc: fsl: qe: introduce qe_io{read,write}*
wrappers") added specific I/O accessors for qe because at that
time ioread/iowrite functions were sub-optimal on powerpc/32
compared to the architecture specific in_/out_ IO accessors.
But as ioread/iowrite accessors are now equivale
This reverts commit 6ac9b61786cc64ae5cbfb69413137656f72e8204.
This commit was required because at that time, ioread/iowrite
functions were sub-optimal on powerpc/32 compared to the
architecture specific in_/out_ IO accessors.
But there are now equivalent since
commit 894fa235eb4c ("powerpc: inlin
On 3/5/21 7:14 AM, John Garry wrote:
> @@ -2296,10 +2296,14 @@ void blk_mq_free_rqs(struct blk_mq_tag_set *set,
> struct blk_mq_tags *tags,
>
> for (i = 0; i < tags->nr_tags; i++) {
> struct request *rq = tags->static_rqs[i];
> + int j;
>
Add the version of the EC in the Tolino Shine 2 HD
to the supported versions. It seems not to have an RTC
and does not ack data written to it.
The vendor kernel happily ignores write errors, using
I2C via userspace i2c-set also shows the error.
So add a quirk to ignore that error.
PWM can be succe
On 06/03/2021 18:22, Christophe JAILLET wrote:
> Le 06/03/2021 à 17:16, Krzysztof Kozlowski a écrit :
>> On 06/03/2021 15:21, Christophe JAILLET wrote:
>>> Some 'clk_prepare_enable()' and 'clk_get()' must be undone in the error
>>> handling path of the probe function, as already done in the remove
On Sat, 06 Mar 2021 17:06:51 +,
Daniel Palmer wrote:
>
> Hi Mark-PK,
>
> I'm trying to understand the logic behind the changes.
> It seems like the polarity of interrupts is always the same between
> the MStar intc and the GIC? Low level interrupts are handled in the
> mstar intc and become
Hi Konrad,
On 06/03/2021 10:49 am, Konrad Dybcio wrote:
>
> On 05.03.2021 22:35, Caleb Connolly wrote:
>> Add a minimal devicetree capable of booting on the Pixel 2 XL MSM8998
>> device.
>>
>> It's currently possible to boot the device into postmarketOS with USB
>> networking, however the display
On Fri, 05 Mar 2021 12:09:30 +,
Mark-PK Tsai wrote:
>
> Support irq polarity configuration and save and restore the config
> when system suspend and resume.
>
> Signed-off-by: Mark-PK Tsai
> ---
> drivers/irqchip/irq-mst-intc.c | 87 --
> 1 file changed, 84
On 3/6/21 3:31 PM, Arnaldo Carvalho de Melo wrote:
I see, it works only when pressing on source code lines:
Hey.
Yes, I forgot to explicitly mention that.
Source file location:
/usr/src/debug/kernel-5.10.fc33/linux-5.10.19-200.fc33.x86_64/./arch/x86/include/asm/msr.h:205
So we better impr
Em Sat, Mar 06, 2021 at 09:55:32AM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Fri, Mar 05, 2021 at 10:54:03AM +0200, James Clark escreveu:
> > I've tested this patchset on a few different applications and have seen it
> > significantly improve
> > quality of frame pointer stacks on aarch64. Fo
Hi All,
Here is a patch series for reporting to user space jack and button events and
add the support for Capture. With some cleanups and fixes along the way.
Regards,
Lucas Tanure
Lucas Tanure (12):
ASoC: cs42l42: Fix Bitclock polarity inversion
ASoC: cs42l42: Fix channel width support
A
The driver was setting bit clock polarity opposite to intended polarity.
Also simplify the code by grouping ADC and DAC clock configurations into
a single field.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 20
On Fri, Mar 05, 2021 at 08:56:25AM +0800, Jin Yao wrote:
> A raw PMU event (eventsel+umask) in the form of rNNN is supported
> by perf but lacks of checking for the validity of raw encoding.
>
> For example, bit 16 and bit 17 are not valid on KBL but perf doesn't
> report warning when encoding wit
Report the Jack events to the user space through ALSA.
Also moves request_threaded_irq() to component_probe so it don't get
interrupts before the initialization the struct snd_soc_jack.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- Don't move the code around
- Remo
This delay is part of the power-up sequence defined in the datasheet.
A runtime_resume is a power-up so must also include the delay.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 3 ++-
sound/soc/codecs/cs42l42.h | 1 +
2 f
From: Richard Fitzgerald
There must be a delay of at least 150us after writing SCLK_PRESENT
before issuing another I2C write.
This is done using struct reg_sequence because it can specify a delay
after the write and the whole sequence is written atomically.
Signed-off-by: Richard Fitzgerald
Si
Move the enable/disable of clocks to cs42l42_mute_stream so the record
path also get clocks.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- Add missing cs42l42_private struct pointer
sound/soc/codecs/cs42l42.c | 86 +-
sound/soc
dev_pm_ops already enable/disable the codec if not in use
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 38 --
1 file changed, 38 deletions(-)
diff --git a/sound/soc/codecs/cs42l42.c b/s
Removing cs42l42_hpdrv_evt that enables the entire chain and replace by
a set of widgets that can better define the codec
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 65 +-
sound/soc/co
Add support for reading the source clock from snd_soc_params_to_bclk
so the machine driver is not required to call cs42l42_set_sysclk
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 17 +
sound/soc/codecs/cs42
From: Richard Fitzgerald
The PLL is only needed for sclk < 11289600 Hz and cs42l42_pll_config()
will not configure it for higher rates. So it must only be enabled
when it is needed.
Signed-off-by: Richard Fitzgerald
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
-
In case of cs42l42_i2c_probe() fail, the regulators were left enabled.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/sound/soc/codecs/cs42l42.c
Add support for capture path on headseat pins
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 39 ++
sound/soc/codecs/cs42l42.h | 12
2 files changed, 51 insertions(+)
diff --
From: Richard Fitzgerald
The PLL should have locked before using it to supply MCLK.
Signed-off-by: Richard Fitzgerald
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- Lucas signed-off added
sound/soc/codecs/cs42l42.c | 12 +++-
sound/soc/codecs/cs42l42.h
Ensure the power supplies are turned off when removing the driver
Signed-off-by: Lucas Tanure
---
Changes in v3:
- Free IRQ before pm_suspend
Changes in v2:
- Use PM functions to shutdown the codec
- Disable IRQ before pm_suspend
sound/soc/codecs/cs42l42.c | 6 --
1 file changed, 4 inserti
The minimum value is 0x3f (-63dB), which also is mute
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42
Remove the hard coded 32 bits width and replace with the correct width
calculated by params_width.
Signed-off-by: Lucas Tanure
---
Changes in v3:
- No changes
Changes in v2:
- No changes
sound/soc/codecs/cs42l42.c | 47 ++
sound/soc/codecs/cs42l42.h | 1 -
On Fri, Mar 05, 2021 at 10:09:20AM +, nakamura.s...@fujitsu.com wrote:
> Hi, John
>
> > > From: Shunsuke Nakamura
> > >
> > > Add the lexical definition of event name so that the numbers are
> > > recognizable.
> > >
> >
> > Sorry for the hassle, but it's not clear that we got a definitiv
Hi,
(Cc'ing Mark Brown because of the regmap related questions)
On Sat, Mar 06, 2021 at 07:13:14PM +0100, Andreas Kemnade wrote:
> Add the version of the EC in the Tolino Shine 2 HD
> to the supported versions. It seems not to have an RTC
> and does not ack data written to it.
> The vendor kernel
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