On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
[...]
/**
* iio_buffer_wakeup_poll - Wakes up the buffer waitqueue
* @indio_dev: The IIO device
@@ -1343,6 +1371,96 @@ static void
iio_buffer_unregister_legacy_sysfs_groups(struct iio_dev *indio_dev)
kfree(iio_dev_opaque->legacy_scan
On Wed, Feb 24, 2021 at 10:00:53AM -0800, James Bottomley wrote:
> On Sat, 2021-02-20 at 01:32 +, Matthew Garrett wrote:
> > Under certain circumstances it might be desirable to enable the
> > creation of TPM-backed secrets that are only accessible to the
> > kernel. In an ideal world this coul
On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
+int devm_iio_kfifo_buffer_setup(struct device *dev,
+ struct iio_dev *indio_dev,
+ int mode_flags,
+ const struct iio_buffer_setup_ops *setup_ops)
+{
+ s
On Sat, 27 Feb 2021 01:15:27 +0100,
Colin King wrote:
>
> From: Colin Ian King
>
> Currently the mask operation on variable conf is just 3 bits so
> the switch statement case value of 8 is unreachable dead code.
> The function daio_mgr_dao_init can be passed a 4 bit value,
> function dao_rsc_ini
On Fri, 26 Feb 2021 02:04:40 +0100,
chris.c...@canonical.com wrote:
>
> From: Chris Chiu
>
> The Acer SWIFT Swift SF314-54/55 laptops with ALC256 cannot detect
> both the headset mic and the internal mic. Introduce new fixup
> to enable the jack sense and the headset mic. However, the internal
>
On Fri, 26 Feb 2021 10:23:55 +0100,
Heinz Diehl wrote:
>
> On 25.02.2021, Takashi Iwai wrote:
>
> > Check which streams are running when you get the unexpected sample
> > rate by inspecting /proc/asound/card*/pcm* entries.
>
> I see, thanks for explaining! Pulseaudio no longer works properly fo
On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
static ssize_t iio_show_scan_index(struct device *dev,
struct device_attribute *attr,
char *buf)
@@ -1451,11 +1465,13 @@ static void __iio_buffer_free_sysfs_and_mask(struct
iio_
Hi!
> >> drivers/leds/blink/leds-lgm-sso.c:263:3: error: implicit declaration of
> >> function 'gpiod_set_value' [-Werror,-Wimplicit-function-declaration]
>gpiod_set_value(led->gpiod, val);
>^
>drivers/leds/blink/leds-lgm-sso.c:263:3: note: did you mean
date: 7 months ago
config: parisc-randconfig-s031-20210228 (attached as .config)
compiler: hppa64-linux-gcc (GCC) 9.3.0
reproduce:
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get inst
On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
With this change, an ioctl() call is added to open a character device for a
buffer. The ioctl() number is 'i' 0x91, which follows the
IIO_GET_EVENT_FD_IOCTL ioctl.
The ioctl() will return an FD for the requested buffer index. The indexes
are the sam
Hi Florian,
On Sat, Feb 27, 2021 at 08:18:47PM -0800, Florian Fainelli wrote:
>
> On 12/17/2020 12:12 PM, Roman Gushchin wrote:
> > With kaslr the kernel image is placed at a random place, so starting
> > the bottom-up allocation with the kernel_end can result in an
> > allocation failure and a w
Hello!
On 22.02.2021 18:12, Romain Perier wrote:
The strlcpy() reads the entire source buffer first, it is dangerous if
the source buffer lenght is unbounded or possibility non NULL-terminated.
Length. Possibly?
It can lead to linear read overflows, crashes, etc...
As recommended in the
> On Feb 26, 2021, at 9:47 AM, Sean Christopherson wrote:
>
> On Fri, Feb 26, 2021, Nadav Amit wrote:
>>
>>> On Feb 25, 2021, at 1:16 PM, Sean Christopherson wrote:
>>> It's been literally years since I wrote this code, but I distinctly
>>> remember the
>>> addresses being relative to the ba
-r026-20210228 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
e0b1df924ae06d6d88582334087d2eacc6702e8f)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod
On Sun, Feb 28, 2021 at 11:07 AM Andy Shevchenko
wrote:
> On Friday, February 26, 2021, Rasmus Villemoes
> wrote:
>>
>> The only purpose of this driver is to serve as a consumer of the input
>> clock, to prevent it from being disabled by clk_disable_unused().
>
> We have a clock API to do the sa
The use of wait() in tpm_inf_recv() is almost the same. It's odd that
we only check the return value and terminate execution flow of one call.
Signed-off-by: Dinghao Liu
---
drivers/char/tpm/tpm_infineon.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tp
On Sun, Feb 28, 2021 at 11:29 AM Andy Shevchenko
wrote:
>
> On Sun, Feb 28, 2021 at 11:07 AM Andy Shevchenko
> wrote:
> > On Friday, February 26, 2021, Rasmus Villemoes
> > wrote:
> >>
> >> The only purpose of this driver is to serve as a consumer of the input
> >> clock, to prevent it from bei
On Sat, Feb 27, 2021 at 11:21:25AM +0100, Jiri Olsa wrote:
> On Fri, Feb 26, 2021 at 08:41:26AM +0800, Jin, Yao wrote:
>
> SNIP
>
> > > + SET_SYMBOL(prefix, PMU_EVENT_SYMBOL);
> > > len++;
> > > }
> > >
There is one e1e_wphy() call in e1000_set_d0_lplu_state_82571
that we have caught its return value but lack further handling.
Check and terminate the execution flow just like other e1e_wphy()
in this function.
Signed-off-by: Dinghao Liu
---
drivers/net/ethernet/intel/e1000e/82571.c | 2 ++
1 fil
Hello,
syzbot found the following issue on:
HEAD commit:3b9cdafb Merge tag 'pinctrl-v5.12-1' of git://git.kernel.o..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=114ac832d0
kernel config: https://syzkaller.appspot.com/x/.config?x=22008533485b2c35
das
Hello,
syzbot found the following issue on:
HEAD commit:29c395c7 Merge tag 'x86-entry-2021-02-24' of git://git.ker..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=11cd05cad0
kernel config: https://syzkaller.appspot.com/x/.config?x=c581c545cb4ffac7
das
Hi Marc,
> Il 26/02/2021 09:33 Marc Kleine-Budde ha scritto:
>
>
> On 25.02.2021 22:51:54, Dario Binacchi wrote:
> > As pointed by commit c0a9f4d396c9 ("can: c_can: Reduce register access")
> > the "driver casts the 16 message objects in stone, which is completely
> > braindead as contemporary
Hi Marc,
> Il 26/02/2021 09:44 Marc Kleine-Budde ha scritto:
>
>
> On 25.02.2021 22:51:52, Dario Binacchi wrote:
> > According to commit 640916db2bf7 ("can: c_can: Make it SMP safe") let RX use
> > IF1 (i.e. IF_RX) and TX use IF2 (i.e. IF_TX).
>
> Is this a fix?
>
I think that If I consider
The D_CAN controller supports up to 128 messages. Until now the driver
only managed 32 messages although Sitara processors and DRA7 SOC can
handle 64.
The series was tested on a beaglebone board.
Note:
I have not changed the type of tx_field (belonging to the c_can_priv
structure) to atomic64_t
Commit 9d23a9818cb1 ("can: c_can: Remove unused inline function") left
behind C_CAN_MSG_OBJ_TX_LAST constant.
Commit fa39b54ccf28 ("can: c_can: Get rid of pointless interrupts") left
behind C_CAN_MSG_RX_LOW_LAST and C_CAN_MSG_OBJ_RX_SPLIT constants.
The removed code also made a comment useless an
As pointed by commit c0a9f4d396c9 ("can: c_can: Reduce register access")
the "driver casts the 16 message objects in stone, which is completely
braindead as contemporary hardware has up to 128 message objects".
The patch prepares the module to extend the number of message objects
beyond the 32 cur
Commit 524369e2391f ("can: c_can: remove obsolete STRICT_FRAME_ORDERING Kconfig
option")
left behind wrong indentation, fix it.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/net/can/c_can/c_can.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net
The arbitration register is already set up with 32-bit writes in the
other parts of the code except for this point.
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/net/can/c_can/c_can.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/can/c_can/
According to commit 640916db2bf7 ("can: c_can: Make it SMP safe") let RX use
IF1 (i.e. IF_RX) and TX use IF2 (i.e. IF_TX).
Signed-off-by: Dario Binacchi
---
(no changes since v1)
drivers/net/can/c_can/c_can.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/can/c
D_CAN controller supports 16, 32, 64 or 128 message objects, comparing
to 32 on C_CAN.
AM335x/AM437x Sitara processors and DRA7 SOC all instantiate a D_CAN
controller with 64 message objects, as described in the "DCAN features"
subsection of the CAN chapter of their technical reference manuals.
Th
On Sat, 27 Feb 2021 09:59:50 +0100,
Anton Yakovlev wrote:
>
> --- a/sound/virtio/virtio_card.c
> +++ b/sound/virtio/virtio_card.c
> @@ -11,6 +11,10 @@
>
> #include "virtio_card.h"
>
> +int msg_timeout_ms = MSEC_PER_SEC;
> +module_param(msg_timeout_ms, int, 0644);
> +MODULE_PARM_DESC(msg_timeo
From: kernel test robot
Use BUG_ON instead of a if condition followed by BUG.
Generated by: scripts/coccinelle/misc/bugon.cocci
Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
CC: Guo Ren
Reported-by: kernel test robot
Signed-off-by: kernel test robot
Signed-off-by: Julia Lawall
---
t
On 2021/2/8 19:22, Yanan Wang wrote:
When KVM needs to coalesce the normal page mappings into a block mapping,
we currently invalidate the old table entry first followed by invalidation
of TLB, then unmap the page mappings, and install the block entry at last.
It will cost a long time to unmap
On Sat, 27 Feb 2021 09:59:51 +0100,
Anton Yakovlev wrote:
> +static int virtsnd_pcm_build_hw(struct virtio_pcm_substream *vss,
> + struct virtio_snd_pcm_info *info)
> +{
> + for (i = 0; i < ARRAY_SIZE(g_v2a_format_map); ++i)
> + if (values & (1ULL <<
On Fri, Feb 26, 2021 at 06:23:02PM +0200, Andy Shevchenko wrote:
> On Fri, Feb 26, 2021 at 11:50:53PM +0800, Dejin Zheng wrote:
> > Introduce pcim_alloc_irq_vectors(), a device-managed version of
> > pci_alloc_irq_vectors(). Introducing this function can simplify
> > the error handling path in many
On Fri, Feb 26, 2021 at 08:20:55PM +0100, Robert Richter wrote:
> On 26.02.21 23:50:52, Dejin Zheng wrote:
> > Introduce pcim_alloc_irq_vectors(), a device-managed version of
> > pci_alloc_irq_vectors(), In some i2c drivers, If pcim_enable_device()
> > has been called before, then pci_alloc_irq_vec
On Sat, 27 Feb 2021 09:59:52 +0100,
Anton Yakovlev wrote:
> +/**
> + * virtsnd_pcm_event() - Handle the PCM device event notification.
> + * @snd: VirtIO sound device.
> + * @event: VirtIO sound event.
> + *
> + * Context: Interrupt context.
OK, then nonatomic PCM flag is invalid...
> +/**
> + *
On Sat, 27 Feb 2021 09:59:53 +0100,
Anton Yakovlev wrote:
>
> +static int virtsnd_pcm_trigger(struct snd_pcm_substream *substream, int
> command)
> +{
> + struct virtio_pcm_substream *vss = snd_pcm_substream_chip(substream);
> + struct virtio_snd *snd = vss->snd;
> + struct virtio_snd
On 28.02.2021, Takashi Iwai wrote:
> The fix I merged today can also work around your problem.
> Please give it a try.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git/commit/?id=5f5e6a3e8b1df52f79122e447855cffbf1710540
Applied on top of 5.11.2 - now pulseaudio works perfec
On Mon, 2021-02-22 at 07:46 -0800, Guenter Roeck wrote:
> On 2/22/21 7:12 AM, Romain Perier wrote:
> > The strlcpy() reads the entire source buffer first, it is dangerous if
> > the source buffer lenght is unbounded or possibility non NULL-terminated.
>
> length
>
> > It can lead to linear read o
When vsi->type == I40E_VSI_FDIR, we have caught the return value of
i40e_vsi_request_irq() but without further handling. Check and execute
memory clean on failure just like the other i40e_vsi_request_irq().
Fixes: 8a9eb7d3cbcab ("i40e: rework fdir setup and teardown")
Signed-off-by: Dinghao Liu
-
Hi, Michael,
On 2/16/21 6:28 PM, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> SPI flashes sometimes have a special OTP area, which can (and is) used to
> store immutable properties like board serial number or vendor assig
On Sat, 27 Feb 2021 09:59:56 +0100,
Anton Yakovlev wrote:
>
> All running PCM substreams are stopped on device suspend and restarted
> on device resume.
>
> Signed-off-by: Anton Yakovlev
> ---
> sound/virtio/virtio_card.c| 56 +++
> sound/virtio/virtio_pcm.c
There is one il_set_tx_power() call in this function without
return value check. Print error message and return error code
on failure just like the other il_set_tx_power() call.
Signed-off-by: Dinghao Liu
---
drivers/net/wireless/intel/iwlegacy/4965.c | 6 +-
1 file changed, 5 insertions(+),
While passing the A530-specific lm_setup func to A530 and A540
to !A530 was fine back when only these two were supported, it
certainly is not a good idea to send A540 specifics to smaller
GPUs like A508 and friends.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a5xx_power.c | 2 +-
Document the newly added PMI8994 compatible.
Signed-off-by: Konrad Dybcio
---
Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml
b/Documentation/devicetree/bindings/l
Add a compatible for PMI8994 WLED. It uses the V4 of WLED IP.
Signed-off-by: Konrad Dybcio
---
drivers/video/backlight/qcom-wled.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/backlight/qcom-wled.c
b/drivers/video/backlight/qcom-wled.c
index 3bc7800eb0a9..497b9035a908 10064
From: AngeloGioacchino Del Regno
The MSM8996 core_mmss clock was commented out due to some
strange issues that others were experiencing.
At least SONY Tone family is working perfectly fine with this clock
declared and gets it up and running without any error.
Signed-off-by: AngeloGioacchino Del
Set the tcsr_mutex_regs size to 0x4 to allow for accessing
all required registers that will be needed to support modem.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.
In order to prepare for feature development, the DTs
have to be workable with.. To achieve that:
- Rename msmgpio to tlmm (consistency with newer DTs)
- Rid msm8996-pins.dtsi and add the contents to msm8996.dtsi
- Modernize the pin nodes, make them more concise
- Add generic pin configuration for
QUP and UART names start from 1. There are 6 QUPs and 2 UARTs
per BLSP. Let's not further confuse programmers by stating
otherwise.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 36 ++--
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts | 4 +--
arch
Add the fifth and sixth I2C host on the second BLSP, used for
various board-specific peripherals.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 29 +++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/
Add required nodes to support DSI displays connected to the
primary interface.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 78 +++
1 file changed, 78 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom
Add SDHCI1 device to allow for usage of (more often than not) eMMC.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
i
Disable them by default to allow for booting without a display
and proprietary firmware. Then, enable them on boards that didn't
previously disable them. Hence, this commit brings no functional
difference.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4
ar
Add and configure WLED node to enable backlight
control on WLED-enabled devices.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/pmi8994.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/pmi8994.dtsi
b/arch/arm64/boot/dts/qcom/pmi8994.dts
Add a RESIN node to support RESIN-connected buttons on some
devices.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 19 +--
arch/arm64/boot/dts/qcom/pm8994.dtsi | 8 +++-
2 files changed, 12 insertions(+), 15 deletions(-)
diff --git
Disable Venus by default to allow booting without closed firmware and
enable it on the boards that didn't previously disable it. This commit
brings no functional difference.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4
arch/arm64/boot/dts/qcom/apq8096-i
Fix the indentation, add pinctrl and move status="disabled"
down.
Signed-off-by: Konrad Dybcio
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 33 +++
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/
On Sat, 13 Feb 2021 at 08:03, Hillf Danton wrote:
>
> The comment below shows a race instance, though I failed to put things
> together to see how within two hours. Cut it and see what will come up.
>
> --- a/mm/z3fold.c
> +++ b/mm/z3fold.c
> @@ -1129,19 +1129,22 @@ retry:
> page = NULL;
>
On Fri, Feb 26, 2021 at 01:46:21PM +0100, Michal Hocko wrote:
> Well, I will leave it to others. I do not feel strongly about this but
> to me it makes the code harder to think about because the situation is
> unstable and any of those condition can change as they are evaluated. So
> an explicit ch
Some TI keystone C667X devices do no support bus/hot reset. Its PCIESS
automatically disables LTSSM when secondary bus reset is received and
device stops working. Prevent bus reset by adding quirk_no_bus_reset to
the device. With this change device can be assigned to VMs with VFIO,
but it will leak
Hey Manivannan, Jakub & all,
>
> So please let us know the path forward on this series. We are open to
> any suggestions but you haven't provided one till now.
>
I just found out that Sierra Wireless also provides their own version
of mhi-net and mhi-uci in precompiled binaries for several Ubuntu
>
> From: Nitin Rawat
>
> Disable interrupt in reset path to flush pending IRQ handler in order to
> avoid possible NoC issues.
>
> Signed-off-by: Nitin Rawat
> Signed-off-by: Can Guo
> ---
> drivers/scsi/ufs/ufs-qcom.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/dr
On Sat, 27 Feb 2021 at 04:29, Julian Braha wrote:
>
> When EFI_EMBEDDED_FIRMWARE is enabled, and CRYPTO is not enabled,
> Kbuild gives the following warning:
>
> WARNING: unmet direct dependencies detected for CRYPTO_LIB_SHA256
> Depends on [n]: CRYPTO [=n]
> Selected by [y]:
> - EFI_EMBEDDE
On Sun, 28 Feb 2021 09:51:38 +0100
Lars-Peter Clausen wrote:
> On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
> > With this change, an ioctl() call is added to open a character device for a
> > buffer. The ioctl() number is 'i' 0x91, which follows the
> > IIO_GET_EVENT_FD_IOCTL ioctl.
> >
> > The
On Sat, 27 Feb 2021 17:26:38 -0800
Ronald Tschalär wrote:
> This patch set provides Touch Bar and ALS support on MacBook Pro's
> 13,*, 14,*, and 15,*.
>
> Some time a go an earlier version of these were posted to the list;
> all code comments from there have been incorporated. In addition the
>
On Sat, 27 Feb 2021 17:26:40 -0800
Ronald Tschalär wrote:
> Recent MacBook Pro's specify the usage of the change sensitivity field
> as illuminance (with a change sensitivity modifier) rather than as
> light.
>
> Signed-off-by: Ronald Tschalär
This looks fine to me though it the hid sensors spe
On Fri, 26 Feb 2021 19:30:06 +0100
Borislav Petkov wrote:
> On Sat, Feb 27, 2021 at 12:45:06AM +0900, Masami Hiramatsu wrote:
> > OK, but I think it should return -EINVAL or -EILSEQ for bad instruction.
>
> It does return -EINVAL when insn_complete() returns 0.
>
> > Here you return 1 for a bad
On Sat, 27 Feb 2021 17:26:42 -0800
Ronald Tschalär wrote:
> The iBridge device provides access to several devices, including:
> - the Touch Bar
> - the iSight webcam
> - the light sensor
> - the fingerprint sensor
>
> This driver provides the core support for managing the iBridge device
> and th
From: Tianyu Lan
Add visibility parameter for vmbus_establish_gpadl() and prepare
to change host visibility when create gpadl for buffer.
Signed-off-by: Sunil Muthuswamy
Co-Developed-by: Sunil Muthuswamy
Signed-off-by: Tianyu Lan
---
arch/x86/include/asm/hyperv-tlfs.h | 9 +
drivers
From: Tianyu Lan
Add new hvcall guest address host visibility support. Mark vmbus
ring buffer visible to host when create gpadl buffer and mark back
to not visible when tear down gpadl buffer.
Signed-off-by: Sunil Muthuswamy
Co-Developed-by: Sunil Muthuswamy
Signed-off-by: Tianyu Lan
---
arc
From: Tianyu Lan
Hyper-V provides two kinds of Isolation VMs. VBS(Virtualization-based
security) and AMD SEV-SNP unenlightened Isolation VMs. This patchset
is to add support for these Isolation VM support in Linux.
The memory of these vms are encrypted and host can't access guest
memory directly
From: Tianyu Lan
Hyper-V exposes GHCB page via SEV ES GHCB MSR for SNP guest
to communicate with hypervisor. Map GHCB page for all
cpus to read/write MSR register and submit hvcall request
via GHCB. Hyper-V also exposes shared memory boundary via
cpuid HYPERV_CPUID_ISOLATION_CONFIG and store it i
From: Tianyu Lan
Hyper-V provides GHCB protocol to write Synthetic Interrupt
Controller MSR registers and these registers are emulated by
Hypervisor rather than paravisor.
Hyper-V requests to write SINTx MSR registers twice(once via
GHCB and once via wrmsr instruction including the proxy bit 21)
From: Tianyu Lan
Hyper-V provides ghcb hvcall to handle VMBus
HVCALL_SIGNAL_EVENT and HVCALL_POST_MESSAGE
msg in SNP Isolation VM. Add such support.
Signed-off-by: Tianyu Lan
---
arch/x86/hyperv/ivm.c | 69 +
arch/x86/include/asm/mshyperv.h | 1 +
dri
From: Tianyu Lan
Initialize/free bounce buffer resource when add/delete
vmbus channel in Isolation VM.
Signed-off-by: Sunil Muthuswamy
Co-Developed-by: Sunil Muthuswamy
Signed-off-by: Tianyu Lan
---
drivers/hv/Makefile | 2 +-
drivers/hv/channel_mgmt.c | 29 +--
From: Tianyu Lan
VMbus ring buffer are shared with host and it's need to
be accessed via extra address space of Isolation VM with
SNP support. This patch is to map the ring buffer
address in extra address space via ioremap(). HV host
visibility hvcall smears data in the ring buffer and
so reset t
From: Tianyu Lan
The physical address of monitor pages in the CHANNELMSG_INITIATE_CONTACT
msg should be in the extra address space for SNP support and these
pages also should be accessed via the extra address space inside Linux
guest and remap the extra address by ioremap function.
Signed-off-by
From: Tianyu Lan
Add Isolation VM support for netvsc driver. Map send/receive
ring buffer in extra address space in SNP isolation VM, reserve
bounce buffer for packets sent via vmbus_sendpacket_pagebuffer()
and release bounce buffer via hv_pkt_bounce() when get send
complete response from host.
From: Tianyu Lan
Add new parameter io_type and struct bounce_pkt for
vmbus_sendpacket_pagebuffer()
and vmbus_sendpacket_mpb_desc() in order to add bounce buffer support
later.
Signed-off-by: Sunil Muthuswamy
Co-Developed-by: Sunil Muthuswamy
Signed-off-by: Tianyu Lan
---
drivers/hv/channel.
From: Tianyu Lan
Hyper-V provides two kinds of Isolation VMs. VBS(Virtualization-based
security) and AMD SEV-SNP base Isolation VMs. The memory of these vms
are encrypted and host can't access guest memory directly. The
guest needs to call hv host visibility hvcall to mark memory visible
to host
From: Tianyu Lan
Storvsc driver needs to reverse additional bounce
buffers to receive multipagebuffer packet and copy
data from brounce buffer when get response messge
from message.
Signed-off-by: Sunil Muthuswamy
Co-Developed-by: Sunil Muthuswamy
Signed-off-by: Tianyu Lan
---
drivers/scsi/s
On Sun, Feb 28, 2021 at 12:10:22PM +0100, Julia Lawall wrote:
> From: kernel test robot
>
> Use BUG_ON instead of a if condition followed by BUG.
>
> Generated by: scripts/coccinelle/misc/bugon.cocci
>
> Fixes: c22b0bcb1dd0 ("riscv: Add kprobes supported")
> CC: Guo Ren
> Reported-by: kernel t
Hi Linus,
Please pull some Kbuild fixes.
Thanks.
The following changes since commit 3fb6d0e00efc958d01c2f109c8453033a2d96796:
Merge tag 'docs-5.12-2' of git://git.lwn.net/linux (2021-02-26 14:21:18 -0800)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/g
On Sun, Feb 28, 2021 at 4:16 PM Eric Gao wrote:
>
> Hi Arnd:
>
> Thanks for your kindly reply.
>
> I want to prove you and all of others that these syscalls are
> very useful and necessary. Actually, I add these syscalls
>
> when I try to implement the local rpc by sy
On Thu, 2021-02-25 at 21:01 +0800, Pu Wen wrote:
> Enable Hygon Fam18h RAPL support for the power capping framework.
>
If this patch is tested and works on this processor, not sure why this
is RFC?
Thanks,
Srinivas
> Signed-off-by: Pu Wen
> ---
> drivers/powercap/intel_rapl_common.c | 1 +
> d
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
7" OF is a capacitive touch 7" Open Frame panel solutions.
MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for cr
This is the initial series to support Engicam MicroGEA STM32MP1 and
i.Core STM32MP1 SoM and it's associated carrier board dts(i) support.
Changes for v3:
- fixed v2 comments
- updated commit messages
Changes for v2:
- fixed v1 comments
- add i.Core STM32MP1 SoM
Any inputs?
Jagan.
Jagan Teki (10
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
MicroGEA STM32MP1 needs to mount
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
Add bindings for it.
Si
MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
Add bindin
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.
Add support for it.
Signed-off-by: Matteo Lis
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)
MicroGEA STM32MP1 is a STM32MP157A based Micro
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Carrie
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation
Board from Engicam.
i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
Add bindings fo
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core STM32MP1 is an EDIM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features
i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating com
On 2/28/21 3:34 PM, Jonathan Cameron wrote:
On Sun, 28 Feb 2021 09:51:38 +0100
Lars-Peter Clausen wrote:
On 2/15/21 11:40 AM, Alexandru Ardelean wrote:
With this change, an ioctl() call is added to open a character device for a
buffer. The ioctl() number is 'i' 0x91, which follows the
IIO_GET
On Sun, Feb 28, 2021 at 03:12:42PM +0100, Aleksander Morgado wrote:
> Hey Manivannan, Jakub & all,
>
> >
> > So please let us know the path forward on this series. We are open to
> > any suggestions but you haven't provided one till now.
> >
>
> I just found out that Sierra Wireless also provides
1 - 100 of 362 matches
Mail list logo
